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1. 发明公开

EP3793160A1 WIRELESS PERIPHERALS COMMUNICATION 有权
公开(公告)号：EP3793160A1
公开(公告)日：2021-03-17
申请号：EP19196955.9
申请日：2019-09-12
申请人： Catena Holding bv
发明人： WEINANS, Geert Henrik
IPC分类号： H04L29/06 , H04W4/80 , H04W84/20
摘要： The disclosure relates to a wireless peripheral for wireless communication with a master device. Example embodiments disclosed include a wireless peripheral (500) for wireless communication with a master device (100) and comprising a first peripheral device (500a) and a second peripheral device (500b), wherein: at least one of the first peripheral device (500a) and the second peripheral device (500b) is arranged to communicate with the master device (100) by transmitting and receiving first wireless signals (104) conveying first packets (304, 304a, 304b, 304c, 304d) occupying transmit and receive time slots (300, 302) comprising inter-frame space (306); and the first peripheral device (500a) and the second peripheral device (500b) are arranged to communicate with each other by transmitting and receiving second wireless signals (502) conveying second packets (606, 608, 610) within said inter-frame space (306).

2. 发明公开

EP3155719A1 METHOD FOR USING AN ACCURATE ADJUSTABLE HIGH-FREQUENCY PHASE-DETECTOR 有权
标题翻译： VERFAHREN ZUR VERWENDUNG EINESPRÄZISEEINSTELLBAREN HOCHFREQUENZ-PHASENDETEKTORS
公开(公告)号：EP3155719A1
公开(公告)日：2017-04-19
申请号：EP15806097.0
申请日：2015-05-18
申请人： Catena Holding bv
发明人： VAN DER CAMMEN, Peter
IPC分类号： H03D7/14 , G01R25/00 , H03D13/00
CPC分类号： G01R25/00 , G01R25/02 , G01R25/04 , H03D7/14 , H03D7/1433 , H03D7/1458 , H03D13/00 , H03K5/26
摘要： The method determines an input phase differential (Δφ) between two input signals. A phase detector is provided that has pairs of transistors and a first impedance (R1) connected to a first branch carrying a first signal (Iout_left) and a second impedance (R2) connected to a second branch carrying a second signal (Iout_right). The first signal (Iout_left) in the first branch is set as a first sum of a common mode output signal (Icm) and a differential mode output signal (Idm). The second signal (Iout_right) in the second branch is set as a second sum of the common mode output signal (Icm) minus the differential mode output signal (Idm). A relationship between the first impedance (R1) and the second impedance (R2) is adjusted until a differential mode output voltage (Vdm) of the phase detector is zero. The input phase differential (Δφ) is determined when the differential mode output voltage (Vdm) is zero.
摘要翻译：该方法确定两个输入信号之间的输入相位差（Δφ）。提供一种相位检测器，其具有成对的晶体管和连接到承载第一信号（Iout_left）的第一分支和连接到承载第二信号（Iout_right）的第二分支的第二阻抗（R2））的第一阻抗（R1）。第一分支中的第一信号（Iout_left）被设置为共模输出信号（Icm）和差模输出信号（Idm）的第一和。第二分支中的第二信号（Iout_right）被设置为共模输出信号（Icm）减去差模输出信号（Idm）的第二和。调整第一阻抗（R1）和第二阻抗（R2）之间的关系，直到相位检测器的差模输出电压（Vdm）为零为止。当差分模式输出电压（Vdm）为零时，确定输入相位差（Δφ）。

3. 发明公开

EP3142250A1 AMPLIFIER LINEARIZATION 审中-公开
标题翻译： VERSTÄRKERLINEARISIERUNG
公开(公告)号：EP3142250A1
公开(公告)日：2017-03-15
申请号：EP15184887.6
申请日：2015-09-11
申请人： Catena Holding bv
发明人： Jansson, Lars Gustaf
IPC分类号： H03F1/32
CPC分类号： H03F1/3205 , H03F1/223 , H03F2200/213 , H03F2200/261 , H03F2200/432
摘要： An amplifier (150) comprising a first transistor (101) and a second transistor (102) connected in parallel. The second transistor (102) is configured to linearize the amplifier (150) by reducing third order non-linearity from the first transistor (101) by operating in the sub-threshold mode when the first transistor is biased in a saturation mode. A programmable voltage divider (120) is provided connecting an input node (111, 112) to the gate of the first transistor (101) or the gate of the second transistor (102) for tuning an amount of input signal applied at the gate of the first transistor (101) relative to an amount of the input signal applied at the gate of the second transistor (102).
摘要翻译：一种包括并联连接的第一晶体管（101）和第二晶体管（102）的放大器（150）。第二晶体管（102）被配置为当第一晶体管偏置在饱和模式时，通过在亚阈值模式下工作来减小来自第一晶体管（101）的三阶非线性来使放大器（150）线性化。提供了可编程分压器（120），其将输入节点（111,112）连接到第一晶体管（101）的栅极或第二晶体管（102）的栅极，用于调谐施加在栅极处的输入信号量第一晶体管（101）相对于施加在第二晶体管（102）的栅极处的输入信号的量。

4. 发明公开

EP3806331A1 RC OSCILLATOR 有权
公开(公告)号：EP3806331A1
公开(公告)日：2021-04-14
申请号：EP19202634.2
申请日：2019-10-11
申请人： Catena Holding bv
发明人： VAN DER CAMMEN, Peter
IPC分类号： H03K3/03 , H03K4/02
摘要： The disclosure relates to a square wave RC oscillator circuit, example embodiments of which include an oscillator circuit (500) for generating an output square wave signal (OUT) having first and second voltage output levels (L, H), the oscillator circuit (500) comprising: a comparator (505) having an output (509) and first and second inputs (510, 511); a switching circuit (530) configured to provide an oscillatory waveform at the first input (510) of the comparator (505); and a feedback circuit (531) arranged to sample the first input (510) of the comparator (505) each time the output square wave signal (OUT) switches between the first and second voltage output levels (L, H) and to compare this sampled voltage with first and second reference voltages (V A , V B ) to adjust a voltage provided to the second input (511) of the comparator (505).

5. 发明公开

EP3800788A1 METHOD FOR USING AN ACCURATE ADJUSTABLE HIGH-FREQUENCY PHASE-DETECTOR FOR SETTING A PHASE DIFFERENTIAL BETWEEN TWO DIFFERENTIAL INPUT VOLTAGE SIGNALS 审中-公开
公开(公告)号：EP3800788A1
公开(公告)日：2021-04-07
申请号：EP20187796.6
申请日：2015-05-18
申请人： Catena Holding bv
发明人： VAN DER CAMMEN, Peter
IPC分类号： H03D7/14 , G01R25/04 , H03D13/00 , G01R25/02 , H03K5/26
摘要： The method determines an input phase differential (Δϕ) between two input signals. A phase detector (116, 118) is provided that has pairs of transistors and a first impedance (R1) connected to a first branch carrying a first signal (Iout_left) and a second impedance (R2) connected to a second branch carrying a second signal (Iout_right). The first signal (Iout_left) in the first branch is set as a first sum of a common mode output signal (Icm) and a differential mode output signal (Idm). The second signal (Iout_right) in the second branch is set as a second sum of the common mode output signal (Icm) minus the differential mode output signal (Idm). A relationship between the first impedance (R1) and the second impedance (R2) is adjusted until a differential mode output voltage (Vdm) of the phase detector is zero. The input phase differential (Δϕ) is determined when the differential mode output voltage (Vdm) is zero.

6. 发明公开

EP3155719A4 METHOD FOR USING AN ACCURATE ADJUSTABLE HIGH-FREQUENCY PHASE-DETECTOR 有权
公开(公告)号：EP3155719A4
公开(公告)日：2018-04-25
申请号：EP15806097
申请日：2015-05-18
申请人： CATENA HOLDING BV
发明人： VAN DER CAMMEN PETER
IPC分类号： H03D7/14 , G01R25/02 , G01R25/04 , H03D13/00 , H03K5/26
CPC分类号： G01R25/00 , G01R25/02 , G01R25/04 , H03D7/14 , H03D7/1433 , H03D7/1458 , H03D13/00 , H03K5/26
摘要： The method determines an input phase differential (Δφ) between two input signals. A phase detector is provided that has pairs of transistors and a first impedance (R1) connected to a first branch carrying a first signal (Iout_left) and a second impedance (R2) connected to a second branch carrying a second signal (Iout_right). The first signal (Iout_left) in the first branch is set as a first sum of a common mode output signal (Icm) and a differential mode output signal (Idm). The second signal (Iout_right) in the second branch is set as a second sum of the common mode output signal (Icm) minus the differential mode output signal (Idm). A relationship between the first impedance (R1) and the second impedance (R2) is adjusted until a differential mode output voltage (Vdm) of the phase detector is zero. The input phase differential (Δφ) is determined when the differential mode output voltage (Vdm) is zero.

7. 发明公开

EP3157220A1 PEAK TO AVERAGE POWER REDUCTION METHOD 审中-公开
标题翻译： SPITZENLEISTUNG-ZU-DURCHSCHNITTSLEISTUNG-VERRINGERUNGSVERFAHREN
公开(公告)号：EP3157220A1
公开(公告)日：2017-04-19
申请号：EP15189549.7
申请日：2015-10-13
申请人： Catena Holding bv
发明人： VAN HOUTUM, Wilhelmus Johannes
IPC分类号： H04L27/26
CPC分类号： H04L27/2618
摘要： An apparatus (500) and method (100) of reducing a peak to average power ratio of a multi-carrier signal (200, 300) having at least some carriers for carrying a data payload and at least some non-payload carriers, the method (100) including: detecting (102) a location and value of a maximum amplitude peak (210, 306a) in the multi-carrier signal (200, 300) in the time domain; and processing the signal (200, 300) in order to reduce the value of the maximum amplitude peak (210, 306a) below an amplitude threshold (304), to form a modified multi-carrier signal (204, 308) in the time domain, the modified multi-carrier signal (204, 308) having a lower peak to average power ratio than the original multi-carrier signal (200, 300), wherein the processing generates signal artefacts in the non-payload carriers.
摘要翻译：一种降低具有至少一些用于承载数据有效载荷的载波和至少一些非有效负载载波的多载波信号（200,300）的峰均功率比的装置（500）和方法（100），所述方法（100）包括：在时域中检测（102）多载波信号（200,300）中的最大幅度峰值（210,306a）的位置和值; 以及处理所述信号（200,300）以便将所述最大幅度峰值（210,306a）的值减小到低于振幅阈值（304），以在所述时域中形成修改的多载波信号（204,308），所述修改的多载波信号（204,308）具有比原始多载波信号（200,300）更低的峰均功率比，其中所述处理在所述非有效载荷载波中产生信号伪影。

8. 发明授权

EP3155719B1 METHOD FOR USING AN ACCURATE ADJUSTABLE HIGH-FREQUENCY PHASE-DETECTOR 有权
公开(公告)号：EP3155719B1
公开(公告)日：2020-08-05
申请号：EP15806097.0
申请日：2015-05-18
申请人： Catena Holding bv
发明人： VAN DER CAMMEN, Peter
IPC分类号： H03D7/14 , G01R25/04 , H03D13/00 , G01R25/02 , H03K5/26

9. 发明授权

EP3142258B1 RADIO TRANSCEIVER CIRCUIT 有权
公开(公告)号：EP3142258B1
公开(公告)日：2018-08-15
申请号：EP15188612.4
申请日：2015-10-06
申请人： Catena Holding bv
发明人： Carlsson, Mats Lennart , Esmaeilzadeh Najari, Omid
IPC分类号： H04B1/00 , H04B1/525
CPC分类号： H04B1/48 , H04B1/006 , H04B1/525 , H04W4/80 , H04W84/12
摘要： The disclosure relates to transceivers incorporating a transmit-receive switching circuit, embodiments of which include a radio transceiver circuit (600) comprising: a first amplifier (601) for amplifying signals received from an antenna via an antenna connection (603); a second amplifier (602) for amplifying signals to be transmitted by the antenna via the antenna connection; and a switching circuit (605) connected between an input of the first amplifier (601) and the antenna connection (603), the switching circuit (605) comprising a capacitor (606), a switching element (607) and an impedance matching element (608), wherein the switching element (607) is configured to connect a node (609) between the capacitor (606) and the impedance matching element (608) to a signal ground (610) when the transceiver (600) is in a transmit mode.

10. 发明公开

EP3142258A1 RADIO TRANSCEIVER CIRCUIT 有权
标题翻译： SCHALTUNG EINESFUNKSENDEEMPFÄNGERS
公开(公告)号：EP3142258A1
公开(公告)日：2017-03-15
申请号：EP15188612.4
申请日：2015-10-06
申请人： Catena Holding bv
发明人： Carlsson, Mats Lennart , Esmaeilzadeh Najari, Omid
IPC分类号： H04B1/00 , H04B1/525
CPC分类号： H04B1/48 , H04B1/006 , H04B1/525 , H04W4/80 , H04W84/12
摘要： The disclosure relates to transceivers incorporating a transmit-receive switching circuit, embodiments of which include a radio transceiver circuit (600) comprising: a first amplifier (601) for amplifying signals received from an antenna via an antenna connection (603); a second amplifier (602) for amplifying signals to be transmitted by the antenna via the antenna connection; and a switching circuit (605) connected between an input of the first amplifier (601) and the antenna connection (603), the switching circuit (605) comprising a capacitor (606), a switching element (607) and an impedance matching element (608), wherein the switching element (607) is configured to connect a node (609) between the capacitor (606) and the impedance matching element (608) to a signal ground (610) when the transceiver (600) is in a transmit mode.
摘要翻译：本公开涉及包含发射 - 接收切换电路的收发器，其实施例包括无线电收发器电路（600），其包括：第一放大器（601），用于经由天线连接（603）放大从天线接收的信号; 第二放大器（602），用于经由天线连接放大由天线发射的信号; 以及连接在第一放大器（601）的输入端和天线连接部（603）之间的开关电路（605），切换电路（605）包括电容器（606），开关元件（607）和阻抗匹配元件（608），其中所述开关元件（607）被配置为当所述收发器（600）处于（608）中时将所述电容器（606）和所述阻抗匹配元件（608）之间的节点（609）连接到信号地传输模式。

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