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1. 发明公开

EP1940017A2 An integrated circuit distributed oscillator 审中-公开
标题翻译： Auf einer integrierten Schaltung verteilter Oszillator
公开(公告)号：EP1940017A2
公开(公告)日：2008-07-02
申请号：EP07386031.4
申请日：2007-12-20
申请人： Analogies S.A.
发明人： Bilionis, George P. , Birbas, Alexios N. , Birbas, Michael K. , Kikidis, John C.
IPC分类号： H03B5/18
CPC分类号： H03B5/1847
摘要： An integrated circuit distributed radio frequency oscillator comprises a semiconductor chip which includes a differential input transmission line (14), a differential output transmission line (16) and, coupled in parallel between these transmission lines at spaced apart portions, a number of differential amplifier cells (18-1, 18-2, 18-3, 18-4) with adjustable delay. The output end of the output transmission line (16) is coupled back to the input end of the input transmission line (14) by a feedback link (20) with a pair of on-chip capacitors (22A, 22B). The delay introduced by the amplifier cells (18-1, 18-2, 18-3, 18-4) is variable in response to a tuning voltage applied to a differential tuning input (30), making the oscillator suitable for use as a distributed VCO in, e.g. a phase-locked loop circuit. The layout of the oscillator on a semiconductor chip includes the series-connected arrangement of the differential transmission lines (14, 16) in a rectilinear spiral path.
摘要翻译：集成电路分布式射频振荡器包括半导体芯片，该半导体芯片包括差分输入传输线（14），差分输出传输线（16），并且在间隔分开的这些传输线之间并联耦合多个差分放大器单元（18-1,18-2,18-3,18-4），延时可调。输出传输线（16）的输出端通过具有一对片上电容器（22A，22B）的反馈链路（20）耦合回输入传输线（14）的输入端。由放大器单元（18-1,18-2,18-3,18-4）引入的延迟响应于施加到差分调谐输入（30）的调谐电压而变化，使得振荡器适合用作分布式VCO在，例如一个锁相环电路。半导体芯片上的振荡器的布局包括在直线螺旋路径中的差分传输线（14,16）的串联连接的布置。

2. 发明公开

EP1940017A3 An integrated circuit distributed oscillator 审中-公开
标题翻译：上的集成电路分布式振荡器
公开(公告)号：EP1940017A3
公开(公告)日：2008-07-09
申请号：EP07386031.4
申请日：2007-12-20
申请人： Analogies S.A.
发明人： Bilionis, George P. , Birbas, Alexios N. , Birbas, Michael K. , Kikidis, John C.
IPC分类号： H03B5/18
CPC分类号： H03B5/1847
摘要： An integrated circuit distributed radio frequency oscillator comprises a semiconductor chip which includes a differential input transmission line (14), a differential output transmission line (16) and, coupled in parallel between these transmission lines at spaced apart portions, a number of differential amplifier cells (18-1, 18-2, 18-3, 18-4) with adjustable delay. The output end of the output transmission line (16) is coupled back to the input end of the input transmission line (14) by a feedback link (20) with a pair of on-chip capacitors (22A, 22B). The delay introduced by the amplifier cells (18-1, 18-2, 18-3, 18-4) is variable in response to a tuning voltage applied to a differential tuning input (30), making the oscillator suitable for use as a distributed VCO in, e.g. a phase-locked loop circuit. The layout of the oscillator on a semiconductor chip includes the series-connected arrangement of the differential transmission lines (14, 16) in a rectilinear spiral path.

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