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81. 发明授权

EP2782246B1 Pseudo-envelope following power management system 有权转让
公开(公告)号：EP2782246B1
公开(公告)日：2018-06-13
申请号：EP14162658.0
申请日：2011-04-19
申请人： Qorvo US, Inc.
发明人： Khlat, Nadim , Kay, Michael, R.
IPC分类号： H03F1/02 , H02M3/07 , H03F3/189 , H03F3/24
CPC分类号： H03F1/0238 , H02M3/07 , H03F1/0244 , H03F1/025 , H03F3/189 , H03F3/19 , H03F3/21 , H03F3/24 , H03F2200/102 , H03F2200/375 , H03F2200/451 , H03F2200/555 , H03G3/004
摘要： Embodiments disclosed in the detailed description relate to a pseudo-envelope follower power management system used to manage the power delivered to a linear RF power amplifier.

82. 发明公开

EP3321924A1 LOW POWER LCD DRIVER CIRCUIT 有权
公开(公告)号：EP3321924A1
公开(公告)日：2018-05-16
申请号：EP17188454.7
申请日：2017-08-30
申请人： The Swatch Group Research and Development Ltd
发明人： Ruiz Donate, Alberto Ramon
IPC分类号： G09G3/36 , H02M3/07
摘要： The present invention relates in one aspect to a driver circuit for an electronic display, comprising:
- a power supply system (12) configured to provide a reference voltage (Vref),
- a DC-DC converter (15) having an input (16) connected to the power supply system and having at least a first output (17) configured to provide a first driving voltage (VL1), a second output (18) configured to provide a second driving voltage (VL2) and a third output (19) configured to provide a third output voltage (VL3), wherein the second output voltage is higher than the first output voltage and wherein the third output voltage is higher than the second output voltage,
- wherein the DC-DC converter comprises at least a first charge pump (20), and wherein the input is directly connectable to the second output to provide the reference voltage as the second output voltage.

83. 发明公开

EP3321923A1 LOW POWER LCD DRIVER CIRCUIT 审中-公开
标题翻译：低功耗LCD驱动器电路
公开(公告)号：EP3321923A1
公开(公告)日：2018-05-16
申请号：EP16197902.6
申请日：2016-11-09
申请人： The Swatch Group Research and Development Ltd
发明人： Ruiz Donate, Alberto Ramon
IPC分类号： G09G3/36 , H02M3/07
CPC分类号： G09G3/3696 , G09G3/20 , G09G3/36 , G09G2310/0289 , G09G2330/02 , G09G2330/021 , G09G2330/028 , H02J7/0063 , H02M3/07
摘要： The present invention relates in one aspect to a driver circuit for an electronic display, comprising:
- a power supply system (12) configured to provide a reference voltage (Vref),
- a DC-DC converter (15) having an input (16) connected to the power supply system and having at least a first output (17) configured to provide a first driving voltage (VL1), a second output (18) configured to provide a second driving voltage (VL2) and a third output (19) configured to provide a third output voltage (VL3), wherein the second output voltage is higher than the first output voltage and wherein the third output voltage is higher than the second output voltage,
- wherein the DC-DC converter comprises at least a first charge pump (20), and wherein the input is directly connectable to the second output to provide the reference voltage as the second output voltage.
摘要翻译：本发明一方面涉及一种用于电子显示器的驱动器电路，包括： - 电源系统（12），其被配置为提供参考电压（Vref）; - 具有输入端（16）的DC-DC转换器）连接到所述电源系统并且具有被配置为提供第一驱动电压（VL1）的第一输出（17），被配置为提供第二驱动电压（VL2）的第二输出（18）以及第三输出（19）），其被配置为提供第三输出电压（VL3），其中所述第二输出电压高于所述第一输出电压，并且其中所述第三输出电压高于所述第二输出电压，其中所述DC-DC转换器包括至少第一电荷泵（20），并且其中输入端可直接连接到第二输出端以提供参考电压作为第二输出电压。

84. 发明公开

EP3282451A1 SAMPLE AND HOLD CIRCUIT 有权
标题翻译：采样和保持电路
公开(公告)号：EP3282451A1
公开(公告)日：2018-02-14
申请号：EP17182442.8
申请日：2017-07-20
申请人： NXP USA, Inc.
发明人： Zanetta, Pedro Barbosa , Pelicia, Marcos Mauricio
IPC分类号： G11C27/02 , H02M3/07
CPC分类号： H03K17/6872 , G11C27/024
摘要： Aspects of various embodiments of the present disclosure are directed to applications utilizing voltage sampling. In certain embodiments, a sample and hold circuit is configured to sample voltages that exceed a tolerance voltage of components. The circuit includes a first and a second capacitors. In a first mode, a voltage difference between an input node and a first reference voltage is sampled using the first capacitor. Also in the first mode, a voltage stored by the second capacitor is referenced to a second reference voltage and provided to a first output node. In a second mode, a voltage difference between an input node and a first reference voltage is sampled using the second capacitor. Also in the second mode, a voltage stored by the first capacitor is referenced to the second reference voltage and provided to a second output node.
摘要翻译：本公开的各种实施例的方面涉及利用电压采样的应用。在某些实施例中，采样和保持电路被配置为对超过部件的容差电压的电压进行采样。该电路包括第一和第二电容器。在第一模式中，使用第一电容器对输入节点与第一参考电压之间的电压差进行采样。同样在第一模式中，由第二电容器存储的电压以第二参考电压为基准并被提供给第一输出节点。在第二模式中，使用第二电容器对输入节点与第一参考电压之间的电压差进行采样。同样在第二模式中，由第一电容器存储的电压以第二参考电压为基准并被提供给第二输出节点。

85. 发明公开

EP3270498A1 CHARGE PUMP APPARATUS 审中-公开
标题翻译：电荷泵装置
公开(公告)号：EP3270498A1
公开(公告)日：2018-01-17
申请号：EP17152953.0
申请日：2017-01-25
申请人： eMemory Technology Inc.
发明人： Shao, Chi-Yi
IPC分类号： H02M3/07
CPC分类号： G11C5/145 , G11C16/0433 , G11C16/12 , H02M3/073 , H02M2001/007 , H03K3/0315 , H03K17/28 , H03K19/20
摘要： A charge pump apparatus is provided. A two-phase clock signal and a four-phase clock signal for respectively driving a two-phase charge pump circuit and a four-phase charge pump circuit are generated according to delay signals of coupling nodes between delay circuits of a ring oscillator circuit.
摘要翻译：提供了一种电荷泵装置。根据环形振荡器电路的延迟电路之间的耦合节点的延迟信号产生用于分别驱动两相电荷泵电路和四相电荷泵电路的两相时钟信号和四相时钟信号。

86. 发明公开

EP3084916A4 APPARATUS FOR CHARGE RECOVERY DURING LOW POWER MODE 审中-公开
公开(公告)号：EP3084916A4
公开(公告)日：2018-01-17
申请号：EP13899423
申请日：2013-12-20
申请人： INTEL CORP
发明人： KULKARNI JAYDEEP P , MEINERZHAGEN PASCAL A , SOMASEKHAR DINESH , TSCHANZ JAMES W , DE VIVEK K
IPC分类号： H02J7/00 , G06F3/041 , H02M3/07 , H03K3/037 , H03K19/21
CPC分类号： H02M3/073 , G06F3/041 , H02J7/00 , H03K3/0377 , H03K19/21
摘要： Described is an apparatus for power management. The apparatus comprises: a first power supply node; a second power supply node; a controllable device coupled to the first power supply node and to the second power supply node, the controllable device operable to short the first power supply node to the second power supply node; a load coupled to the second power supply node; and a charge recovery pump (CRP) coupled to the first and second power supply nodes.

87. 发明授权

EP3032729B1 CONVERTISSEUR CONTINU-CONTINU À DÉMARRAGE À FROID 有权
公开(公告)号：EP3032729B1
公开(公告)日：2018-01-10
申请号：EP15198109
申请日：2015-12-04
申请人： COMMISSARIAT À L'ÉNERGIE ATOMIQUE ET AUX ÉNERGIES ALTERNATIVES
发明人： PILLONNET GAËL , MARTINEZ THOMAS
IPC分类号： H02M3/07
CPC分类号： H02M3/07 , H02M1/36 , H02M3/073

88. 发明公开

EP2518876A4 HIGH-VOLTAGE POWER SUPPLY 有权
公开(公告)号：EP2518876A4
公开(公告)日：2018-01-10
申请号：EP09852598
申请日：2009-12-26
申请人： CANON KK
发明人： NAGASAKI OSAMU , IIDA MASAMICHI
IPC分类号： H02M3/07 , H02M3/155 , H02M7/10
CPC分类号： H02M7/103 , H02M3/155
摘要： In a high voltage power supply that does not use a transformer. An output voltage can be appropriately adjusted in accordance with a load change. A switching element; a voltage resonant circuit that includes an inductor, to which a voltage is applied when the switching element is driven, and a capacitor; a rectifier circuit that includes a capacitor and a diode that output a high voltage in accordance with a resonance operation of the voltage resonant circuit; and a high voltage power supply that performs control in such a manner that a driving frequency of the switching element can be changed in accordance with an output from the rectifier circuit and a control signal used to set an output voltage.

89. 发明公开

EP3224937A1 ADAPTIVE CONTROLLER FOR VOLTAGE CONVERTER 审中-公开
标题翻译：电压转换器的自适应控制器
公开(公告)号：EP3224937A1
公开(公告)日：2017-10-04
申请号：EP14904536.1
申请日：2014-10-24
申请人： Texas Instruments Incorporated
发明人： XIE, Jianzhang
IPC分类号： H02M3/07
CPC分类号： H02M3/158 , H02M1/08 , H02M3/1588 , H02M2001/0054 , Y02B70/1466 , Y02B70/1491
摘要： A DC-to-DC converter includes an input voltage node, an inductor, and a switch coupled to the inductor and the input voltage node. More specifically, the switch has an on state and off state, wherein during the on state, current flowing through the inductor increases and the off state results in a decrease of the current flowing through the inductor via a driver coupled to the switch. The driver comprises a plurality of transistors and an adaptive voltage node, wherein a voltage level at the adaptive voltage node is to vary in accordance with the current flowing through the inductor so as to decrease a variation of the amount of time to turn off the switch.
摘要翻译： DC-DC转换器包括输入电压节点，电感器以及耦合到电感器和输入电压节点的开关。更具体地说，开关具有导通状态和关断状态，其中在导通状态期间，流过电感器的电流增加，并且截止状态导致经由耦合到开关的驱动器流过电感器的电流减小。所述驱动器包括多个晶体管和自适应电压节点，其中自适应电压节点处的电压电平根据流过电感器的电流而变化，以便减少关断开关的时间量的变化。

90. 发明公开

EP3210288A1 CIRCUITS AND METHODS PROVIDING THREE-LEVEL SIGNALS AT A SYNCHRONOUS BUCK CONVERTER 有权
标题翻译：在同步降压转换器上提供三电平信号的电路和方法
公开(公告)号：EP3210288A1
公开(公告)日：2017-08-30
申请号：EP15781795.8
申请日：2015-09-24
申请人： Qualcomm Incorporated
发明人： ZHANG, Chuang , DOYLE, James, Thomas , MAHMOUDI, Farsheed , SHAYAN ARANI, Amirali
IPC分类号： H02M1/12 , H02M3/07 , H02M7/483 , H03H7/01
CPC分类号： H02M3/158 , H02M1/14 , H02M7/483 , H02M2003/072
摘要： A circuit including: a three-level buck converter having: a plurality of input switches and an inductor configured to receive a voltage from the plurality of input switches, the plurality of input switches coupled with a first capacitor and configured to charge and discharge the first capacitor; a second capacitor at an output of the buck converter; and a switched capacitor at an input node of the inductor, wherein the switched capacitor is smaller than either the first capacitor or the second capacitor.
摘要翻译：一种电路，包括：三电平降压转换器，具有：多个输入开关和电感器，所述多个输入开关和电感器被配置为从所述多个输入开关接收电压，所述多个输入开关与第一电容器耦合并且被配置为对所述第一电容器电容器; 在降压转换器的输出处的第二电容器; 以及在所述电感器的输入节点处的开关电容器，其中所述开关电容器小于所述第一电容器或所述第二电容器。

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