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71. 发明公开

EP1293035A2 LEVEL SHIFTER FOR SWITCHING POWER AMPLIFIER 有权
标题翻译：层滑动切换功率升压
公开(公告)号：EP1293035A2
公开(公告)日：2003-03-19
申请号：EP01945080.8
申请日：2001-05-03
申请人： Koninklijke Philips Electronics N.V.
发明人： BERKHOUT, Marco
IPC分类号： H03F1/00
CPC分类号： H03F3/2171 , H03F2200/513
摘要： The invention relates to a push-pull amplifier having a level shift circuit to generate different control signals to a driver of a switch. The amplifier has to cope with the voltage limitations of the device. To reduce standby power the level shifter is used. The solution of the invention has as one of the great advantages that only during transitions a current will flow.

72. 发明公开

EP1290785A2 VORRICHTUNGEN UND VERFAHREN ZUR KALIBRIERUNG VON VERSTÄRKERSTUFEN UND ZUR KOMPENSIERUNG VON FEHLERN IN VERSTÄRKERSTUFEN VORGESCHALTETEN KOMPONENTEN 有权
标题翻译：用于校准的放大器级和放大器定位误差补偿装置和方法中的阶段的上游部件
公开(公告)号：EP1290785A2
公开(公告)日：2003-03-12
申请号：EP01909504.1
申请日：2001-01-19
申请人： Infineon Technologies AG
发明人： ENGL, Bernhard
IPC分类号： H03F1/00
CPC分类号： H03M1/1014 , G11C27/026 , H03F3/45753 , H03F3/45771 , H03F2200/331 , H03F2203/45048 , H03M1/141
摘要： The inventive amplifier stage calibration comprises the following steps: creating conditions that are suitable for calibrating the amplifier stage; comparing signals output by the amplifier stage or comparing electrical quantities occurring inside the amplifier stage with one another or with assigned reference values, and; modifying the attributes of the amplifier stage based on the result of the comparison. The described compensation of errors in amplifier stages of series-connected components is effected by correspondingly calibrating the amplifier stage. The inventive devices and methods enable the calibration of amplifier stages and the compensation for errors in amplifier stages of series-connected components to be carried out rapidly and precisely in an astonishingly simple manner.

73. 发明授权

EP0777318B1 Frequency self-compensated operational amplifier 失效
标题翻译：频率自补偿运算放大器
公开(公告)号：EP0777318B1
公开(公告)日：2003-03-12
申请号：EP95830497.4
申请日：1995-11-30
申请人： STMicroelectronics S.r.l.
发明人： Tomasini, Luciano , Castello, Rinaldo , Clerici, Giancarlo , Bietti, Ivan
IPC分类号： H03F1/00 , H03F1/08
CPC分类号： H03F1/086

74. 发明授权

EP0840442B1 A two-stage fully differential operational amplifier with efficient common-mode feed back circuit 失效
标题翻译：用更有效的共模反馈电路全差分两级运算放大器
公开(公告)号：EP0840442B1
公开(公告)日：2003-01-29
申请号：EP96830555.7
申请日：1996-10-30
申请人： STMicroelectronics S.r.l.
发明人： Nicollini, Germano , Senderowicz, Daniel
IPC分类号： H03F1/00 , H03F3/45
CPC分类号： H03F3/45192 , H03F3/45654 , H03F3/45659 , H03F2203/45421 , H03F2203/45631 , H03F2203/45711

75. 发明公开

EP1275198A2 CONCURRENT MULTI-BAND LOW NOISE AMPLIFIER ARCHITECTURE 审中-公开
标题翻译：低噪声多级多波段放大器架构
公开(公告)号：EP1275198A2
公开(公告)日：2003-01-15
申请号：EP01922989.7
申请日：2001-03-28
申请人： CALIFORNIA INSTITUTE OF TECHNOLOGY
发明人： HASHEMI, Hossein , HAJIMIRI, Seyed-Ali
IPC分类号： H03F1/00
CPC分类号： H03F1/223 , H03F3/191 , H03F3/193 , H03F3/72 , H03F2200/111 , H03F2200/294 , H03F2200/372 , H03F2200/429 , H03F2203/7236
摘要： The present invention relates to a monolithic, concurrent multi-band low noise amplifier (LNA). The inventive LNA includes a three-terminal active device, such as a transistor with a characteristic transconductance, gm, disposed on a semiconductor substrate. The active device has a control input terminal, an output terminal, and a current source terminal. The amplifier also includes an input impedance matching network system, Zin, and an output load network. Zin simultaneously and independently matches the frequency-dependent input impedance of the three-terminal active device to a predetermined characteristic impedance at two or more discrete frequency bands. The output load network simultaneously provides a voltage gain, Av, to an input signal at the amplifier input at each of the two or more discrete frequency bands.

76. 发明公开

EP1262017A1 SPECTRAL DISTORTION MONITOR FOR CONTROLLING PRE-DISTORTION AND FEED-FORWARD LINEARIZATION OF RF POWER AMPLIFIER 有权
标题翻译：监控装置进行光谱失真控制RF功率放大器的重点和前向耦合线性化
公开(公告)号：EP1262017A1
公开(公告)日：2002-12-04
申请号：EP01912738.0
申请日：2001-02-14
申请人： Spectrian Corporation
发明人： GOMEZ, Jason, N.
IPC分类号： H03F1/00 , H03F1/26
CPC分类号： H03F1/3229 , H03F1/3247
摘要： A carrier cancellation combiner (60), and pre-distortion and feed-forward loops of an RF power amplifier (20) are controlled to minimize IMD components at the output of the RF amplifier (20), by a spectral distortion measurement scheme that performs Fast Fourier Transform (FFT)-based spectral power measurements at a 'reference' signal port (SRC) (associated with the RF input signal (11)), and a plurality of 'test' signal ports (BPM, EAMP, OUT) (associated with various monitoring locations of the amplifier). Signals extracted from the control and test ports are downconverted to baseband, bandpass filtered, digitized and stored as a spectral 'snapshot' of the entire band of the signal infrastructure of the amplifier. A digital signal processor-based controller (15) processes the buffered data to produce averaged FFT's of the data extracted from the reference (SRC) and test ports (BPM, EAMP, OUT) and thereby provide spectral information for each sampled signal set. The FFT for the control data is processed to establish a baseline, with which the FFTs for the test data are compared, to generate adjustment signals for control parameters through which IMD components introduced by the amplifier may be minimized.

77. 发明公开

EP1250751A2 ELECTRONIC CIRCUIT 有权
标题翻译：电子电路
公开(公告)号：EP1250751A2
公开(公告)日：2002-10-23
申请号：EP00985189.0
申请日：2000-12-18
申请人： TELEFONAKTIEBOLAGET LM ERICSSON
发明人： DAWES, Alan
IPC分类号： H03F1/00
CPC分类号： H03F3/45968 , H03F3/005 , H03F3/45995 , H03F2203/45212 , H03F2203/45616
摘要： A switched capacitor amplifier circuit is provided with two independent reference voltages, one which provides an appropriate bias level for the amplifiers, and one which sets a common mode input level for the amplifiers, thereby allowing the dynamic range to be maximised.

78. 发明公开

EP1186071A1 DELAY LINE FILTER 审中-公开
标题翻译：延迟线过滤器
公开(公告)号：EP1186071A1
公开(公告)日：2002-03-13
申请号：EP00944661.8
申请日：2000-06-14
申请人： K & L Microwave
发明人： HERSHTIG, Rafi , MOORE, Frederic, J.
IPC分类号： H01P1/205 , H01P9/00 , H03F1/00
CPC分类号： H01P9/00 , H01P1/205 , H03F1/3229 , H03F2200/198
摘要： A delay circuit (28) configured to include a delay compensating circuit (29) coupled in series with an integrated filter circuit (30). The delay compensating circuit (29) comprises a miniaturized 3db quadrature hybrid coupler (40) having first, second, third, and fourth ports, and a first resonator (41) and a second resonator (46) formed from lumped elements, respectively coupled to the second and third ports; and the filter circuit (30) comprises a plurality of lumped elements coupled in series with the delay compensating circuit (29) to one of the first and second ports.
摘要翻译：延迟电路（28）被配置为包括与集成滤波器电路（30）串联耦合的延迟补偿电路（29）。延迟补偿电路（29）包括具有第一，第二，第三和第四端口的小型化3db正交混合耦合器（40），以及由集总元件形成的第一谐振器（41）和第二谐振器（46）第二和第三端口; 并且滤波器电路（30）包括与延迟补偿电路（29）串联耦合到第一和第二端口之一的多个集总元件。

79. 发明公开

EP0926814A1 Feedforward structure with programmable zeros for synthesizing continuous-time filters, delay lines and the like 失效
标题翻译：前馈Strüktur可编程零用于合成连续时间滤波器，延迟线等
公开(公告)号：EP0926814A1
公开(公告)日：1999-06-30
申请号：EP97830696.7
申请日：1997-12-23
申请人： STMicroelectronics S.r.l.
发明人： Portaluri, Salvatore , Pisati, Valerio
IPC分类号： H03F1/00 , H03H11/04
CPC分类号： H03H11/04
摘要： A feedforward structure with programmable zeros for synthesizing continuous-time filters, delay lines and the like, whose particularity is that it comprises a first cell and a second cell which are cascade-connected, each one of the first and second cells comprising a first pair (1, 2) of bipolar transistors in which the emitter terminals are connected to a current source (5), the first pair of transistors being connected to a second pair of transistors (6, 7), a current source (11) being connected to the emitter terminals of the second pair of transistors, a first high-impedance element (C) being connected between the first and second pairs of transistors, a second high-impedance element (C) being connected in output to the second pair of transistors, a fifth transistor (8) being connected between the collector terminal of a first transistor (1) of the first pair of transistors and a collector terminal of a second transistor (2) of the second pair of transistors, the base terminal of the fifth transistor (8) receiving a signal which is taken from the collector terminal of the first transistor of the first pair of transistors and is taken with a positive sign in the first cell and with a negative sign in the second cell, in order to determine a transfer function with a pair of singularities at the numerator, the second transistors (2, 7) of the first and second pairs being controlled respectively by current sources (4, 9) which have mutually different values.
摘要翻译：前馈结构，具有可编程零用于合成连续时间滤波器，延迟线等，谁的特殊性是做到了包括第一单元和哪些是级联连接的第二电池，其包括一第一对中的第一和第二小区中的每一个（1，2），在该发射极端子连接到电流源（5），所述第一对晶体管中的另一个连接到第二对晶体管的双极晶体管（6,7），电流源（11）连接到所述第二对晶体管的发射极端子，连接在第一和第二对晶体管之间的第一高阻抗元件（C），第二高阻抗元件（C）被连接在输出到所述第二对晶体管的，第五晶体管（8）连接的第一晶体管的集电极端子（1）之间的第一对晶体管和第二对晶体管的第二晶体管（2）的集电极端子，的基极端的第五晶体管（8）接收信号的所有其从所述第一对晶体管的第一晶体管的集电极端子中取出，并在第一小区和与所述第二小区的负号被取正号，以确定性矿由电流源分别被控制在与分子的一对奇点的，第一和第二对的第二晶体管（2,7）的传递函数（4,9），它们具有相互不同的值。

80. 发明公开

EP0913925A1 High voltage output stage for driving an electric load 失效
标题翻译：最后一个Versㄧher her her her her chen chen chen chen chen chen chen chen
公开(公告)号：EP0913925A1
公开(公告)日：1999-05-06
申请号：EP97830559.7
申请日：1997-10-31
申请人： STMicroelectronics S.r.l.
发明人： Depetro, Riccardo , Martignoni, Fabrizio , Scian, Enrico
IPC分类号： H03F1/00 , H03K19/0185
CPC分类号： H03K19/018585
摘要： The invention relates to a high-voltage final output stage (1) for driving an electric load, of the type which comprises a complementary pair (3) of transistors connected between first (Vdd) and second (Vss) supply voltage references, and at least one PMOS pull-up transistor (MP1) connected in series with an NMOS pull-down transistor (MN). The stage (1) comprises an additional PMOS transistor (MP2) connected in parallel with the pull-up transistor (MP1) and having the body terminal in common therewith. More particularly, the body terminals of both PMOS transistors (MP1,MP2) are formed in the semiconductor within a common well which can withstand high voltages, and the additional transistor (MP2) is a thick oxide PMOS power transistor.
摘要翻译：本发明涉及用于驱动电负载的高压最终输出级（1），其包括连接在第一（Vdd）和第二（Vss）电源电压基准之间的晶体管的互补对（3），并且在与NMOS下拉晶体管（MN）串联连接的至少一个PMOS上拉晶体管（MP1）。级（1）包括与上拉晶体管（MP1）并联连接并且与其主体端子共同连接的附加PMOS晶体管（MP2）。更具体地说，两个PMOS晶体管（MP1，MP2）的主体端子形成在可承受高电压的公共阱内的半导体中，附加晶体管（MP2）是厚氧化物PMOS功率晶体管。

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