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    • 41. 发明公开
    • Amplifier with compensated gate bias voltage
    • Verstärkermit kompensierter Gatearbeitsspannung
    • EP1793491A1
    • 2007-06-06
    • EP05077761.4
    • 2005-12-02
    • Nederlandse Organisatie voor Toegepast-Natuurwetenschappelijk Onderzoek TNO
    • Busking, Erik Bertde Hek, Andries Peter
    • H03F1/30H03F3/16
    • H03F1/301H03F3/193H03F2200/18H03F2200/451
    • An amplifier circuit has an amplifier stage (10), comprising an amplifier transistor (104) with a gate coupled to an input (100) of the amplifier stage (10), a source coupled to a reference connection (gnd) and a drain coupled to a positive power supply connection (V+). A bias stage (12) is provided comprising a bias transistor (120), a drain resistance (124) and a source resistance (122), the bias transistor (120) having a gate coupled to a negative power supply connection (V-), a source coupled to the negative power supply connection (V-) via the source resistance (122) and a drain coupled to the reference connection (gnd) via the drain resistance (124) and to the gate of the amplifier transistor (104). The bias stage comprises a further resistance (20, 22), coupled from a node between the source of the bias transistor and the source resistance of the bias transistor (120) to a circuit node that carries a voltage higher than the voltage at the negative power supply connection.
    • 放大器电路具有放大器级(10),包括放大器晶体管(104),其栅极耦合到放大器级(10)的输入端(100),耦合到参考连接(gnd)和漏耦合 到正电源连接(V +)。 提供偏置级(12),其包括偏置晶体管(120),漏极电阻(124)和源极电阻(122),偏置晶体管(120)具有耦合到负电源连接(V-)的栅极, ,经由源极电阻(122)耦合到负电源连接(V-)的源极和经由漏极电阻(124)耦合到参考连接(gnd)的漏极和放大器晶体管(104)的栅极, 。 偏置级包括从偏置晶体管的源极和偏置晶体管(120)的源极之间的节点耦合到电路节点的另外的电阻(20,22),该电路节点承载的电压高于负极 电源连接。
    • 44. 发明公开
    • Multifunction floating fet circuit
    • 电路中具有多种功能的浮动安排FET。
    • EP0221632A1
    • 1987-05-13
    • EP86305973.9
    • 1986-08-01
    • HAZELTINE CORPORATION
    • Vasile, Carmine F.
    • H03F3/16H03F3/26H03C1/54
    • H03F3/265
    • A transistor circuit is provided with a symmetrical floating configuration for attaining multi-­function operation of a transistor (20) having symmetrical source and drain characteristics, preferably a GaAs MESFET. The circuit includes a balun (30) which may be configured as a transformer, a differential amplifier, or a magic-tee waveguide depending on the frequency of signals to be processed by the circuit. Balanced terminals of the balun may be directly or capacitively coupled to source and drain terminals of the transistor (20). Tuning circuits (70, 72) are employed for applying signals having different frequencies to the transistor and for extracting intermodulation products generated by the transistor in response to the signals at the different frequencies. With the direct connection between the balun and the transistor, alternating voltages (via E, F, G) may be impressed between the terminals of the transistor to alternate source and drain regions of the transistor. Functions of amplification, modulation, bipolar attenuation, four-­quadrant multiplication and correlation, power frequency tripling, and mixing are obtainable. The transistor may be replaced with a pair of transistors connected in series or in antiparallel connection.