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31. 发明公开

EP1710901A1 A motor drive inverter that includes III-Nitride based power semiconductor devices 审中-公开
标题翻译： WechselrichterfürMotorantrieb mit einer III-Nitrid halbleiteranordnung
公开(公告)号：EP1710901A1
公开(公告)日：2006-10-11
申请号：EP06251919.4
申请日：2006-04-05
申请人： INTERNATIONAL RECTIFIER CORPORATION
发明人： Battello, Mario , Oliver, Stephen
IPC分类号： H02M7/5387 , H01L29/74
CPC分类号： H02P6/085 , H02M7/003
摘要： An inverter for driving a motor includes one or more power stages for producing one or more power signals for energizing the motor, each power stage including first and second III-nitride based bi-directional switching devices connected in series between a DC voltage bus and ground.
摘要翻译：用于驱动电动机的逆变器包括一个或多个功率级，用于产生用于激励电动机的一个或多个功率信号，每个功率级包括串联连接在DC电压总线和地之间的第一和第二III族氮化物基双向开关装置。

32. 发明公开

EP1686616A2 Process for manufacture of mos gated device with reduced mask count 失效
标题翻译：韦尔法罕zur Herstellung eines mosengeren Bauelements mit reduzierter Maskenzahl
公开(公告)号：EP1686616A2
公开(公告)日：2006-08-02
申请号：EP06010237.3
申请日：1995-08-17
申请人： INTERNATIONAL RECTIFIER CORPORATION
发明人： The designation of the inventor has not yet been filed
IPC分类号： H01L21/336 , H01L29/78
CPC分类号： H01L29/7802 , H01L29/1095 , H01L29/41716 , H01L29/41766 , H01L29/66363 , H01L29/66727 , H01L29/7396
摘要： A reduced mask process for forming a MOS gated device such as a power MOSFET uses a first mask (33) to sequentially form a cell body (50) and a source region (51) within the cell body (50), and a second mask step to form, by a silicon etch, a central opening (80,81) in the silicon surface at each cell and to subsequently undercut the oxide (60) surrounding the central opening (80,81). A contact layer (84) then fills the openings (80,81) of each cell to connect together the body (50) and source regions (51). Only one critical mask alignment step is used in the process.
摘要翻译：用于形成诸如功率MOSFET的MOS栅控器件的减少掩模处理使用第一掩模（33）在电池体（50）内顺序地形成电池体（50）和源极区域（51），并且第二掩模通过硅蚀刻形成在每个单元处的硅表面中的中心开口（80,81），并随后对围绕中心开口（80,81）的氧化物（60）进行底切。然后，接触层（84）填充每个电池的开口（80,81）以将主体（50）和源极区域（51）连接在一起。该过程中仅使用一个关键的掩模对准步骤。

33. 发明公开

EP1685644A1 EFFICIENCY OPTIMIZATION CONTROL FOR PERMANENT MAGNET MOTOR DRIVE 审中-公开
标题翻译：有效的优化控制用于永磁电机
公开(公告)号：EP1685644A1
公开(公告)日：2006-08-02
申请号：EP03783275.5
申请日：2003-11-10
申请人： INTERNATIONAL RECTIFIER CORPORATION
发明人： HO, Eddy, Ying Yin
IPC分类号： H02P6/18
CPC分类号： H02P21/18
摘要： A method and system for modifying an estimated rotor angle for improved efficiency in a PMSM drive system. A module monitors a run command, a torque command, and an estimated speed; and in response thereto, generates an output correction angle for modifying the estimated rotor angle. The output correction angle may be added to the estimated rotor angle. The output correction angle may be generated only for predetermined conditions of said run command, torque command, and speed. In particular, the output correction angle may be generated (1) when the run command is asserted, (2) when the torque command is above a predetermined level, and (3) when variations in the speed are within predetermined limits.

34. 发明公开

EP1685514A2 BOOTSTRAP DIODE EMULATOR WITH DYNAMIC BACK-GATE BIASING 审中-公开
标题翻译：具有动态后门偏置的自举二极管仿真器
公开(公告)号：EP1685514A2
公开(公告)日：2006-08-02
申请号：EP04800980.7
申请日：2004-11-10
申请人： INTERNATIONAL RECTIFIER CORPORATION
发明人： WILHELM, Dana
IPC分类号： G06F19/00 , G05F1/40
CPC分类号： H03K17/6871 , H03F2200/31 , H03K17/063 , H03K2217/0018
摘要： A bootstrap diode emulator circuit (302) for use in a half-bridge switching circuit (300) employing transistors (105a, 105b) connected to one another in a totem pole configuration, a driver circuit for driving the transistors, and a bootstrap diode emulator circuit (302) includes an LDMOS transistor having a gate, a back-gate, a source and a drain, the drain of the LDMOS transistor being coupled to the low-side supply node; a gate control circuit electrically coupled to the gate of the LDMOS transistor, and a dynamic back-gate biasing circuit electrically coupled to the back-gate of the LDMOS transistor. The dynamic back-gate biasing circuit is operable to dynamically bias the back-gate of the LDMOS of the LDMOS transistor when the LDMOS is turned on by applying a voltage to the back-gate of the LDMOS transistor that is close to but slightly lower than a voltage of the drain of the LDMOS transistor.
摘要翻译：一种自举二极管仿真器电路（302），用于采用图腾柱配置相互连接的晶体管（105a，105b）的半桥开关电路（300），用于驱动晶体管的驱动器电路以及自举二极管仿真器电路（302）包括具有栅极，背栅极，源极和漏极的LDMOS晶体管，所述LDMOS晶体管的漏极耦合到所述低侧电源节点; 电耦合到LDMOS晶体管的栅极的栅极控制电路以及电耦合到LDMOS晶体管的背栅极的动态背栅偏置电路。当LDMOS通过向LDMOS晶体管的背栅极施加电压而导通时，动态背栅极偏置电路可操作以动态偏置LDMOS晶体管的LDMOS的背栅极，该LDMOS晶体管的背栅极接近但略低于 LDMOS晶体管的漏极电压。

35. 发明公开

EP1576436A1 ONE CYCLE CONTROL CONTINUOUS CONDUCTION MODE PFC BOOST CONVERTER INTEGRATED CIRCUIT WITH INTEGRATED POWER SWITCH AND BOOST CONVERTER 审中-公开
标题翻译：集成PFC升压KONVERTERSCHALTUNGMIT连续一个周期一行规则模式INTEGRIERTEMLEISTUNGSSCHALTER和升压转换器
公开(公告)号：EP1576436A1
公开(公告)日：2005-09-21
申请号：EP03797025.8
申请日：2003-12-15
申请人： INTERNATIONAL RECTIFIER CORPORATION
发明人： ATHARI, Frank , BROWN, Ron , ADAMS, Jonathan
IPC分类号： G05F1/10 , G05F1/40
CPC分类号： H02M1/4225 , Y02B70/126 , Y02P80/112
摘要： An integrated circuit for a continuous conduction mode (CCM) power factor corrected boost converter circuit, the boost converter circuit including a rectifier connectable to an ac input and having a rectified dc output provided across a dc bus; an inductor having first and second terminals connected in one leg of the dc bus, a first terminal of the inductor coupled to the output of said rectifier; a boost rectifier diode having a first terminal coupled to the second terminal of the inductor and having a second terminal; and a storage capacitor connected to the second terminal of the diode; the integrated circuit comprising a control circuit and a switch controlled by the control circuit, the integrated circuit comprising a housing enclosing the control circuit and switch, the integrated circuit having a power terminal, a ground terminal, a first control input terminal for coupling to an output of the converter circuit, and a second control input terminal for coupling to a sensor for sensing current in the dc bus and further having an output terminal connected to the switch for coupling to the second terminal of the inductor, wherein the control circuit comprises a one cycle control circuit having an integrator reset by a clock signal for each cycle of the clock signal, the integrator receiving as an input a signal provided on said first control input terminal.

36. 发明公开

EP1540806A1 GLOBAL CLOSED LOOP CONTROL SYSTEM WITH DV/DT CONTROL AND EMI/SWITCHING LOSS REDUCTION 审中-公开
标题翻译：与DV / DT控制和EMI /开关损耗REDUCTION闭环全球控制系统
公开(公告)号：EP1540806A1
公开(公告)日：2005-06-15
申请号：EP03771906.9
申请日：2003-07-25
申请人： INTERNATIONAL RECTIFIER CORPORATION
发明人： HO, Eddy, Ying-Yin , LI, Yong, Perry , HONDA, Jun , TAM, David , TAKAHASHI, Toshio
IPC分类号： H02M7/5387 , H02M7/12
CPC分类号： H02M1/44 , H02M5/458 , H02M2001/0029 , H02M2001/123 , H03K17/163 , H03K17/168
摘要： A motor drive system (10) control provides global closed loop feedback to cooperatively operate system components to adaptively reduce noise and provide noise cancellation feedback. An active EMI filter (12) reduces differential and common mode noise on an input and provides a noise level indication to a system controller (11). Power switches in both a power converter (14) and power inverter (16) are cooperatively controlled with dynamic dv/dt control to reduce switching noise according to a profile specified by the controller 11). The dv/dt control is provided as an analog signal to a high voltage IC and codified as a pulse width for a level shifting circuit supplying control signals to the high voltage gate drive (18). A noise extraction circuit and technique obtain fast noise sampling to permit noise cancellation and adaptive noise reduction.

37. 发明公开

EP1488504A2 MOTOR CURRENT RECONSTRUCTION VIA DC BUS CURRENT MEASUREMENT 有权
标题翻译： GLEICHSTROMBUSSTROMMESSUNG发动机功率的重构
公开(公告)号：EP1488504A2
公开(公告)日：2004-12-22
申请号：EP03745679.5
申请日：2003-03-28
申请人： INTERNATIONAL RECTIFIER CORPORATION
发明人： HO, Eddy, Ying Yin , TAKAHASHI, Toshio
IPC分类号： H02P5/34 , H02P7/32
CPC分类号： H02P8/12 , G01R19/0092 , H02M7/5395 , H02M2001/0009 , H02P23/14 , H02P2205/01
摘要： A technique for reconstructing phase currents based on measurements of a DC bus current. Non-observable regions of DC bus current samples to reconstruct phase currents are reduced in size by using two phase space vector modulation. The non-observable regions can be further reduced by omitting deadtime insertions for switch actuations when output current is higher than a given threshold. Voltage command vectors in non-observable areas can be constructed by two time averaged vectors one of which is constructed to obtain an observable DC bus current reflecting motor phase current. The additive vectors have the same combined time average value as that of the voltage command vector in order to preserve volt-seconds. Current samples may also be averaged to provide a more accurate reconstruction of phase current. Current samples are time delayed to avoid transients for more accurate readings. When three phase PWM inverter modulation results in inability to determine the motor phase current from the DC bus measurement, the technique includes dynamically switching to two phase PWM modulation to reduce the time interval when the motor phase current is not determinable through the DC bus current measurement.

38. 发明公开

EP1481426A2 H-BRIDGE WITH SINGLE LEAD FRAME 审中-公开
标题翻译：通过单次连接COMB H-BRIDGE
公开(公告)号：EP1481426A2
公开(公告)日：2004-12-01
申请号：EP03702113.6
申请日：2003-01-13
申请人： INTERNATIONAL RECTIFIER CORPORATION
发明人： NADD, Bruno, C. , THIERY, Vincent , DE FRUTOS, Xavier , LEE, Chik Yam
IPC分类号： H01L29/94 , H01L23/52 , H02H5/04 , H02H9/04
CPC分类号： H02H7/0838 , H01L2224/48091 , H01L2224/48137 , H01L2224/73265 , H01L2924/13055 , H01L2924/13091 , H02P7/04 , H02P2203/07 , H01L2924/00014 , H01L2924/00
摘要： A block diagram of circuitry, including control circuits contained within package (33). Thus, MOSFETS (31) and (33) are provided with respective shoot-thru protection circuits (61) AND (62) respectively and with over current shut down circuits (63) and (64) respectively.

39. 发明公开

EP1471626A2 Fault protected self-oscillating full-bridge driver 审中-公开
标题翻译： FehlergeschützterselbstschwingenderVollbrückentreiber
公开(公告)号：EP1471626A2
公开(公告)日：2004-10-27
申请号：EP04009676.0
申请日：2004-04-23
申请人： INTERNATIONAL RECTIFIER CORPORATION
发明人： Cheng, Xiao-chang , Abdoulin, Edgar
IPC分类号： H02M3/338
CPC分类号： H02M1/096 , H02M1/32 , H02M1/36 , H02M3/33592 , Y02B70/1475
摘要： A driver circuit (19) for a transistor provides a soft start feature where pulses provided to the transistor are varied in duration during startup. The driver also provides an overcurrent protection feature (29B,31) for disabling a driver output for a safe period of time when an overcurrent condition is detected. The driver circuit includes an oscillator (26) that produces a saw tooth wave and a narrow width pulse train for determining pulse width and dead time, respectively. The driver circuit may be used in half-bridge or full-bridge drivers.
摘要翻译：软启动电路（28）接收脉冲振荡器（26）的输出，并产生脉冲长度修改信号，以选择性地修改输出脉冲信号。驱动电路（19）接收修改的脉冲以产生用于驱动桥接电路的晶体管的输出（HO1，HO2，LO1，LO2）。还包括以下独立权利要求：（1）半桥司机; （2）全桥驾驶员; （3）提供晶体管驱动电路的软启动操作的方法; （4）用于驱动晶体管的驱动电路; （5）用于增加传送到晶体管驱动器的脉冲长度的软启动电路; 和（6）可从锯齿波形得到的脉冲序列上的比较器的输出，以改变脉冲宽度。

40. 发明公开

EP1454408A1 RESONANT CONVERTER WITH PHASE DELAY CONTROL 审中-公开
标题翻译：有相位延迟的控制谐振变换器
公开(公告)号：EP1454408A1
公开(公告)日：2004-09-08
申请号：EP02787005.4
申请日：2002-12-11
申请人： INTERNATIONAL RECTIFIER CORPORATION
发明人： RIBARICH, Thomas, J.
IPC分类号： H02M7/5387
CPC分类号： H02M7/53871 , H02M3/3376 , H02M2007/4815 , H02M2007/53878 , Y02B70/1433 , Y02B70/1441
摘要： A phase delay control for a power converter operates with a phase locked loop and current sense feedback to provide improved control stability and dynamic output range. The phase lock loop includes a voltage controlled oscillator that is controlled based on an error signal derived from a phase of the power converter output. The error signal applied to the voltage controlled oscillator produces a shift in switching frequency for the converter to drive the error to zero. The power converter includes an LCC resonant circuit to manipulate resonant electrical energy to improve switching speed and power density.

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