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21. 发明公开

EP0596650A1 Apparatus & method for accommodating cable length delays using isochronous fifoing 失效
标题翻译： Vorrichtung und Verfahren zur Anpassung vonKabellängenverzögerungendurch isochrone FIFO'。
公开(公告)号：EP0596650A1
公开(公告)日：1994-05-11
申请号：EP93308570.6
申请日：1993-10-27
申请人： NATIONAL SEMICONDUCTOR CORPORATION
发明人： Edem, Brian C. , Evans, Michael S. , Worlsey, Debra J.c/o National Semiconductor Corp.
IPC分类号： H04L12/44 , H04L12/64 , H04J3/06
CPC分类号： H04L12/6418 , H04J3/0629 , H04L12/44 , H04L2012/6437 , H04L2012/644 , H04L2012/6448 , H04L2012/6459 , H04L2012/6489
摘要： A data communication system, such as a local area network, is provided with a capability of transmitting isochronous data. The system conveys both isochronous data and non-isochronous data by time-multiplexing the data into a recurring frame structure on a four-bit nibble basis. The arriving data is de-multiplexed at the hub into separate channels for handling the separate streams by appropriate hardware.
To compensate for skew between data transmitted and data received by the hub, a buffer is used in the hub's received data stream to accurately align the data cycles.
摘要翻译：诸如局域网的数据通信系统被提供有传输等时数据的能力。该系统通过以四位半字节的方式将数据进行时分复用为循环帧结构来传送同步数据和非同步数据。到达的数据在集线器处被解复用为单独的信道，以通过适当的硬件来处理单独的流。为了补偿发送的数据和集线器接收的数据之间的偏差，在集线器的接收数据流中使用缓冲区以精确对准数据周期。

22. 发明授权

EP2115963B1 METHODS AND APPARATUS FOR CONTROLLING LATENCY VARIATION IN A PACKET TRANSFER NETWORK 有权
标题翻译：用于控制分组传输网络中的延迟变化的方法和设备
公开(公告)号：EP2115963B1
公开(公告)日：2017-07-19
申请号：EP07757048.9
申请日：2007-02-15
申请人： Intel Corporation
发明人： BECK, Juergen , SONNIER, David, P.
IPC分类号： H04L12/64 , H04L12/801 , H04L12/841 , H04J3/06
CPC分类号： H04L47/10 , H04J3/0632 , H04L47/28 , H04L2012/6481 , H04L2012/6489

23. 发明公开

EP2328091A3 Network media playout 有权转让
标题翻译：网络媒体播出
公开(公告)号：EP2328091A3
公开(公告)日：2012-03-28
申请号：EP11156611.3
申请日：2002-10-03
申请人： Global IP Solutions (GIPS) AB , Global IP Solutions, Inc.
发明人： Enbom Nicklas , Galschiodt, Fredrik
IPC分类号： G06F13/00 , H04L12/26 , H04L12/64 , H04L29/06
CPC分类号： H04L65/604 , H04L12/6418 , H04L29/06 , H04L29/06027 , H04L65/80 , H04L2012/6472 , H04L2012/6481 , H04L2012/6489
摘要： A method and a device for processing a media stream received as a plurality of packets from a packet communication network are provided. The received packets are stored in a first buffer. According to the method, a fill level of a second buffer is compared with a threshold and, if the fill level is below the threshold, a portion of the media stream is retrieved from the first buffer. The retrieved portion is then loaded in the second buffer.

24. 发明公开

EP2328091A2 Network media playout 有权转让
标题翻译： Netzwerk媒体播放
公开(公告)号：EP2328091A2
公开(公告)日：2011-06-01
申请号：EP11156611.3
申请日：2002-10-03
申请人： Global IP Solutions (GIPS) AB , Global IP Solutions, Inc.
发明人： Enbom Nicklas , Galschiodt, Fredrik
IPC分类号： G06F13/00 , H04L12/26 , H04L12/64
CPC分类号： H04L65/604 , H04L12/6418 , H04L29/06 , H04L29/06027 , H04L65/80 , H04L2012/6472 , H04L2012/6481 , H04L2012/6489
摘要： A method and a device for processing a media stream received as a plurality of packets from a packet communication network are provided. The received packets are stored in a first buffer. According to the method, a fill level of a second buffer is compared with a threshold and, if the fill level is below the threshold, a portion of the media stream is retrieved from the first buffer. The retrieved portion is then loaded in the second buffer.
摘要翻译：提供了一种用于处理从分组通信网络作为多个分组接收的媒体流的方法和设备。所接收的分组被存储在第一缓冲器中。根据该方法，将第二缓冲器的填充级别与阈值进行比较，并且如果填充级别低于阈值，则从第一缓冲器检索一部分媒体流。然后将检索到的部分加载到第二缓冲器中。

25. 发明公开

EP2140637A2 METHOD OF TRANSMITTING DATA IN A COMMUNICATION SYSTEM 有权转让
标题翻译：在通信系统中传输数据的方法
公开(公告)号：EP2140637A2
公开(公告)日：2010-01-06
申请号：EP07870467.3
申请日：2007-12-20
申请人： Skype Limited
发明人： RODBRO, Christoffer , JENSEN, Soren Skak , LINDBLOM, Jonas , VAFIN, Renat , ANDERSEN, Soren Vang
IPC分类号： H04L12/64
CPC分类号： H04L12/6418 , H04L12/66 , H04L2012/6489
摘要： A method of processing a signal received at a node in a network, comprising the steps of; receiving the signal at the node; determining characteristics of a first part of the signal; determining characteristics of a second part of the signal that is subsequent to the first part of the signal; quantifying an effect on the signal caused by applying an action to the first part of the signal, based on characteristics of the first part of the signal; quantifying an effect on the signal caused by not applying the action on the first part of the signal, based on characteristics of the second part of the signal; applying the action to the first part of the signal if it is determined that the effect on the signal caused by applying the action to the first part of the signal is less detrimental to at least one measure of the signal quality than the effect on the signal caused by not applying the action to the first part of the signal.
摘要翻译：一种处理在网络中的节点处接收的信号的方法，包括以下步骤：在节点处接收信号; 确定所述信号的第一部分的特性; 确定信号的第一部分之后的信号的第二部分的特性; 基于所述信号的所述第一部分的特性来量化由于对所述信号的所述第一部分应用动作而引起的对所述信号的影响; 基于所述信号的所述第二部分的特性，量化由于未对所述信号的所述第一部分应用所述动作而导致的对所述信号的影响; 如果确定对信号的第一部分施加动作对信号的影响对信号质量的至少一个测量的影响比对信号的影响的影响更小，则将该动作应用于信号的第一部分由于未将动作应用于信号的第一部分而导致。

26. 发明授权

EP1525725B1 SWITCHING ARCHITECTURE WITH PACKET ENCAPSULATION 有权转让
标题翻译：交换架构与数据包封装
公开(公告)号：EP1525725B1
公开(公告)日：2009-08-05
申请号：EP03724433.2
申请日：2003-05-05
申请人： Cedar Point Communications, Inc.
发明人： ENGLISH, Daniel, W. , DOUCETTE, John , MILLER, Paul , SAAB, Hicham
IPC分类号： H04L12/66 , H04L12/64
CPC分类号： H04J3/16 , H04L12/6418 , H04L2012/6459 , H04L2012/6475 , H04L2012/6489 , H04M7/0003 , H04M7/0075 , H04M7/0078 , H04M7/1215 , H04M7/128
摘要： The invention includes, among other things, a system for passing TDM traffic through a packet switch. In one embodiment, the system includes a packet switch (500) that has a plurality of data ports (510) and is capable of routing FSDU packets between the plurality of data ports (510). A TDM encapsulation circuit (512) process a TDM data flow that is incoming to the switch (500). A circuit demultiplexer processes the incoming data flow to buffer data associated with different TDM circuits into different buffer locations. A timer monitors the amount of time available to fill the FSDU, and when the time period reaches the frame boundary, an FSDU generator generates an FSDU that is filled with data associated with the TDM circuits. Header information is added for allowing the packet switch (500) to route the generated FSDU to a port (510) associated with the respective TDM circuit.

27. 发明授权

EP0942556B1 Synchronizing method and bridge 有权
标题翻译：同步方法和网桥
公开(公告)号：EP0942556B1
公开(公告)日：2006-10-25
申请号：EP99301812.6
申请日：1999-03-10
申请人： SONY CORPORATION
发明人： Sugita, Takehiro, c/o Sony Corporation , Maeshima, Yasunori, c/o Sony Corporation
IPC分类号： G06F13/40 , H04J3/06 , H04L12/40
CPC分类号： H04L12/40091 , H04J3/0655 , H04L12/6418 , H04L2012/6489

28. 发明公开

EP1655911A3 Audio receiver having adaptive buffer delay 审中-公开
标题翻译：音频接收器的自适应缓冲延迟
公开(公告)号：EP1655911A3
公开(公告)日：2006-06-07
申请号：EP05256493.7
申请日：2005-10-20
申请人： Zultys Technologies
发明人： Talalai, Alexander
IPC分类号： H04L12/56 , H04L12/64
CPC分类号： H04L47/10 , H04J3/0632 , H04L12/6418 , H04L47/28 , H04L49/90 , H04L49/9031 , H04L2012/6489
摘要： Generally speaking, there are provided systematic techniques for increasing and decreasing jitter buffer delay. The disclosed techniques typically utilize various combinations of: evaluating received data over a specified interval, increasing a recommended buffer delay if the interval delay exceeds a first threshold and decreasing the recommended buffer delay if the interval delay is less than a second threshold, causing the recommended buffer delay to decrease over time until an underflow condition is identified, and/or increasing the recommended buffer delay in response to identifying the underflow condition.

29. 发明授权

EP1097551B1 MIDDLEWARE-BASED REAL-TIME COMMUNICATION SYSTEM 有权
标题翻译：中间件为基础的实时通信系统
公开(公告)号：EP1097551B1
公开(公告)日：2006-04-26
申请号：EP99930557.6
申请日：1999-06-22
申请人： HONEYWELL INC.
发明人： HUANG, Jiandong , CHEN, Donghui
IPC分类号： H04L12/64 , H04L12/413
CPC分类号： H04L47/626 , H04L12/417 , H04L12/6418 , H04L47/50 , H04L47/522 , H04L47/6215 , H04L49/90 , H04L2012/6454 , H04L2012/6464 , H04L2012/6489
摘要： A middleware approach to implementation of real-time Ethernet that provides deterministic, i.e. predictable, communication services over the conventional Ethernet network is described. The invention resides above the network interface device and the device driver, yet below the system transport services and/or user applications. The middleware schedules and controls admission of data packets onto the network and guarantees the real-time constraints of the data packets once they are admitted. The invention prohibits collision of data streams during transmission of real-time data, yet may allow collisions during transmission of soft- or non-real-time data for improved utilization of bandwidth. The invention may further optimize bandwidth utilization by incorporating a quality of service definition into the scheduling determination.

30. 发明公开

EP1527570A1 COMMUNICATIONS SWITCHING ARCHITECTURE 有权转让
标题翻译：通信交换架构
公开(公告)号：EP1527570A1
公开(公告)日：2005-05-04
申请号：EP03747650.4
申请日：2003-05-02
申请人： Cedar Point Communications, Inc.
发明人： DEVINE, Geoffrey , DOUCETTE, John , ENGLISH, Daniel, W. , FITZGERALD, Jeffrey, J. , MILLER, Paul , QUIGLEY, Patrick
IPC分类号： H04L12/56
CPC分类号： H04J3/16 , H04L12/6418 , H04L2012/6459 , H04L2012/6475 , H04L2012/6489 , H04M7/0003 , H04M7/0075 , H04M7/0078 , H04M7/1215 , H04M7/128
摘要： Presently described is a system (200) and method for switching multimedia data communications, including but not limited to Voice over IP (VoIP) telephony, cable TV, digital audio and video. The system utilizes a single, integrated device (210) to provide all Packet Cable-compliant functionality, including enhanced user privacy, compliance with CALEA, E911 and other mandated services not available in conventional distributed Packet Cable systems. High speed and efficient, low cost operation are provided by means of an optimized data unit encapsulation scheme for internal switching and routing. A proprietary fiber optic backplane and removable optical connectors are used to enable lightspeed internal communications hot-swapping of components. Furthermore, the present system (200) is extensible to all forms of digital data switching and is secure, resistant to Denial of Service attacks, and fault-resilient.

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