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11. 发明公开

EP0522079A4 EP0522079A4 - 失效
标题翻译： EP0522079A4 - Google专利
公开(公告)号：EP0522079A4
公开(公告)日：1994-02-16
申请号：EP91908025
申请日：1991-03-29
申请人： NEW YORK INSTITUTE OF TECHNOLOGY
发明人： DHEIN, ROBERT , GLASS, GREGORY , CERULLO, ALBERT , SCHURE, LOUIS
IPC分类号： H04N7/015 , H04N7/08 , H04N7/12 , H04N7/26 , H04N11/06 , H04N11/24
CPC分类号： H04N7/0806 , H04N7/015 , H04N19/30
摘要： A method and an apparatus are set forth for encoding and decoding video to achieve bandwidth compression. In one form of the disclosure, two video signals (810, 850), representative of different images, can be transmitted using only the bandwidth (880) generally allocated to a single video signal, with little or no perceived degradation of image quality. In another form of the disclosure, motion indicative signals (970) are used in a technique that dynamically modifies the frequency band information to be stored and/or transmitted.
摘要翻译：阐述了一种用于编码和解码视频以实现带宽压缩的方法和设备。在本公开的一种形式中，可以仅使用一般分配给单个视频信号的带宽（880）来发送代表不同图像的两个视频信号（810,850），而几乎没有感知到图像质量的下降。在本公开的另一种形式中，运动指示信号（970）被用于动态地修改要被存储和/或发送的频带信息的技术中。

12. 发明公开

EP0532667A4 TWO STAGE INTERPOLATION SYSTEM 失效
标题翻译：两阶段插值系统
公开(公告)号：EP0532667A4
公开(公告)日：1993-12-22
申请号：EP91912116
申请日：1991-05-29
申请人： THOMSON CONSUMER ELECTRONICS, INC.
发明人： CHRISTOPHER, TODD, J. , HORLANDER, KARL, FRANCIS , SAEGER, TIMOTHY, WILLIAM
IPC分类号： H04N5/46 , G06F3/00 , G06T3/40 , G09G5/00 , G09G5/14 , G09G5/377 , G09G5/391 , H04N3/223 , H04N3/227 , H04N3/27 , H04N5/073 , H04N5/14 , H04N5/262 , H04N5/265 , H04N5/44 , H04N5/45 , H04N7/00 , H04N7/01 , H04N7/015 , H04N7/26 , H04N9/64 , H04N11/06 , H04N11/20 , H04N11/24 , H04N7/12
CPC分类号： H04N9/641 , G06T3/0012 , G06T3/4007 , H04N3/223 , H04N3/227 , H04N3/27 , H04N5/2624 , H04N5/45 , H04N7/007 , H04N7/01 , H04N7/0105 , H04N7/0122 , H04N7/015 , H04N9/64 , H04N19/90
摘要： A two stage interpolation system provides greater bandwidth for signals compressed and expanded by interpolation, such as video signals displayed in a zoom or enlarged mode. A finite impulse response filter (391) generates from a first signal of digital samples a second signal of digital samples representing signal points between the samples of the first signal. The first signal is delayed. The second signal and the delayed first signal are interleaved by a multiplexer (393) to produce a third signal of digital values having a sample density twice that of the first signal. A compensated variable interpolator (394) derives from the third signal a fourth signal of digital samples in which the frequency content of information represented by the first signal has been changed. In the case of enlarging the picture represented by a video signal, the video signal can be truncated in a FIFO line memory (395), prior to being delayed and processed by the finite impulse response filter (391). The compensated variable interpolator (394) can be controlled to provide selected ratios of compression or expansion.

13. 发明公开

EP0533748A4 FIELD SYNCHRONIZATION SYSTEM MAINTAINING INTERLACE INTEGRITY 失效
标题翻译：维护内部完整性的现场同步系统
公开(公告)号：EP0533748A4
公开(公告)日：1993-11-24
申请号：EP91910878
申请日：1991-05-29
申请人： THOMSON CONSUMER ELECTRONICS, INC.
发明人： ERSOZ, NATHANIEL, HALUK , CANFIELD, BARTH, ALAN
IPC分类号： H04N5/46 , G06F3/00 , G06T3/40 , G09G5/00 , G09G5/14 , G09G5/377 , G09G5/391 , H04N3/223 , H04N3/227 , H04N3/27 , H04N5/073 , H04N5/14 , H04N5/262 , H04N5/265 , H04N5/44 , H04N5/45 , H04N7/00 , H04N7/01 , H04N7/015 , H04N7/26 , H04N9/64 , H04N11/06 , H04N11/20 , H04N11/24
CPC分类号： H04N9/641 , G06T3/0012 , G06T3/4007 , H04N3/223 , H04N3/227 , H04N3/27 , H04N5/2624 , H04N5/45 , H04N7/007 , H04N7/01 , H04N7/0105 , H04N7/0122 , H04N7/015 , H04N9/64 , H04N19/90
摘要： First and second field type detectors (702, 710) for first and second video signals have outputs indicating whether the video signals have first or second field types. The first video signal is synchronized with the second video signal for a combined display by a synchronous field memory (350) and an asynchronous multiple line memory (354). The field type of the second video signal is changed when necessary to match the field type of the first video signal to maintain interlace integrity in the combined display. A field type changing circuit (712, 714, 718) which controls the synchronizing, has a first mode of operation which delays writing a current field of the first field type by one horizontal line period, a second mode of operation which advances writing a current field of the second field type by one horizontal line period and a third mode of operation which maintains a current field type. A plurality of selectable interlace correction signals are generated, each being appropriate for one of the plurality of comparison outcomes.

14. 发明公开

EP0532665A4 LUMINANCE PROCESSING SYSTEM 失效
标题翻译：发光处理系统
公开(公告)号：EP0532665A4
公开(公告)日：1993-11-24
申请号：EP91912104
申请日：1991-05-30
申请人： THOMSON CONSUMER ELECTRONICS, INC.
发明人： ERSOZ, NATHANIEL, HALUK , HORLANDER, KARL, FRANCIS , SAEGER, TIMOTHY, WILLIAM
IPC分类号： H04N5/46 , G06F3/00 , G06T3/40 , G09G5/00 , G09G5/14 , G09G5/377 , G09G5/391 , H04N3/223 , H04N3/227 , H04N3/27 , H04N5/073 , H04N5/14 , H04N5/262 , H04N5/265 , H04N5/44 , H04N5/45 , H04N7/00 , H04N7/01 , H04N7/015 , H04N7/26 , H04N9/64 , H04N11/06 , H04N11/20 , H04N11/24 , H04N7/12
CPC分类号： H04N9/641 , G06T3/0012 , G06T3/4007 , H04N3/223 , H04N3/227 , H04N3/27 , H04N5/2624 , H04N5/45 , H04N7/007 , H04N7/01 , H04N7/0105 , H04N7/0122 , H04N7/015 , H04N9/64 , H04N19/90
摘要： A circuit for compressing and expanding video data comprises a FIFO line memory (356) and an interpolator (337). A timing circuit (339) generates control signals for writing data into the line memory (356) and for reading data from the line memory (356) to compress and expand the data. The interpolator (337) smooths the data compressed or expanded in the FIFO line memory (356). A switching network (325, 327, 353) selectively establishes a first signal path in which the line memory (356) precedes the interpolator (337) for implementing the data expansion and a second signal path in which the interpolator (337) precedes the line memory (356) for implementing the data compression. The switching network (325, 327, 333) is controlled according to selected display formats requiring compression or expansion, for example by a microprocessor.

15. 发明公开

EP0532653A4 FIELD SYNCHRONIZATION SYSTEM WITH WRITE/READ POINTER CONTROL 失效
标题翻译：具有写/读指针控制的现场同步系统
公开(公告)号：EP0532653A4
公开(公告)日：1993-11-24
申请号：EP91911605
申请日：1991-05-29
申请人： THOMSON CONSUMER ELECTRONICS, INC.
发明人： ERSOZ, NATHANIEL, HALUK , CANFIELD, BARTH, ALAN
IPC分类号： H04N5/46 , G06F3/00 , G06T3/40 , G09G5/00 , G09G5/14 , G09G5/377 , G09G5/391 , H04N3/223 , H04N3/227 , H04N3/27 , H04N5/073 , H04N5/14 , H04N5/262 , H04N5/265 , H04N5/44 , H04N5/45 , H04N7/00 , H04N7/01 , H04N7/015 , H04N7/26 , H04N9/64 , H04N11/06 , H04N11/20 , H04N11/24 , H04N5/06
CPC分类号： H04N9/641 , G06T3/0012 , G06T3/4007 , H04N3/223 , H04N3/227 , H04N3/27 , H04N5/2624 , H04N5/45 , H04N7/007 , H04N7/01 , H04N7/0105 , H04N7/0122 , H04N7/015 , H04N9/64 , H04N19/90
摘要： A field synchronization system for asynchronous video signals, comprises a video display synchronized with a first video signal having a first line rate component and a first field rate component. A second video signal having a second line rate component is first stored in a field memory, having synchronous write and read ports. The second video signal is thereafter speeded up in a multiple line memory (354) having asynchronous write and read ports and independently resettable write and read pointers. The second video signal may be subsampled, written and read into and out of the field memory respectively and written into the multiple line memory, all synchronously with the second line rate component. The second video signal is read out of the multiple line memory (354) synchronously with the first line rate component. The write pointer is reset by a circuit (320) which samples the first field rate component with the second line rate component. The read pointer is reset by a circuit which samples the first field rate component with the first line rate component.

16. 发明授权

EP0071745B1 Composite video color signal generation from digital color signals 失效
标题翻译：复合视频彩色信号从数字彩色信号中产生
公开(公告)号：EP0071745B1
公开(公告)日：1988-08-31
申请号：EP82105769.2
申请日：1982-06-29
申请人： International Business Machines Corporation
发明人： Dean, Mark Edward , Kummer, David Allen , Saenz, Jesus Andres
IPC分类号： H04N11/06 , H04N9/64
CPC分类号： G09G1/285

17. 发明公开

EP0243687A2 Farbfernsehsystem zur Aufnahme, Übertragung und Wiedergabe von Farbfernsehbildern 失效
标题翻译： Farbfernsehsystem zur Aufnahme，Übertragungund Wiedergabe von Farbfernsehbildern。
公开(公告)号：EP0243687A2
公开(公告)日：1987-11-04
申请号：EP87104512.6
申请日：1987-03-26
申请人： ERNO Raumfahrttechnik Gesellschaft mit beschränkter Haftung
发明人： Röh, Gerhard, Dipl.-Ing.
IPC分类号： H04N11/06 , H04N11/22 , H04N11/08
CPC分类号： H04N11/06
摘要： Die Erfindung bezieht sich auf ein Farbfernsehsystem zur Aufnahme, Übertragung und Wiedergabe von Farbfernsehbildern. Das System ist besonders geeignet zur Aufnahme von Farbbilder im Weltraum und Wiedergabe auf Erden. Das System arbeitet ohne Farbhilfsträger und ist der Lage die Farben ohne Beeinträchtigung der Qualität auf dem Übertragungsweg und störende Nachzieheffekte bei der Wiedergabe zu erzeugen.
摘要翻译：该系统特别适用于拍摄空间中的彩色图像并在地球上再现。该系统在没有辅助色彩载体的情况下运行，并且能够产生颜色而不损害传输路径上的质量并且在再现期间干扰涂抹效果。

18. 发明公开

EP0223689A1 Système pour la transmission de signaux de télévision en couleurs sur canaux ou lignes de transmission à bande étroite 失效
标题翻译：系统的彩色电视信号对窄带通道或导管传输。
公开(公告)号：EP0223689A1
公开(公告)日：1987-05-27
申请号：EP86402463.3
申请日：1986-11-04
申请人： THOMSON VIDEO EQUIPEMENT
发明人： Cavro, Philippe , Rychembusch, René
IPC分类号： H04N11/02 , H04N11/06
CPC分类号： H04N11/02 , H04N11/06
摘要： Le système se compose d'un transmetteur et d'un récepteur. Le transmetteur comprend, un dispositif de matriçage (1), deux convertisseurs analogique-numérique (2), des moyens de mémorisation constitués par une mémoire de luminance (3) et une mémoire de chrominance (4), une logique de mise au format (5), des moyens de conversion numérique-analogique constitués d'un synthétiseur programmable (6) et d'un convertisseur fréquence-tension (7). Il comprend également un compteur d'adressage rapide (8), un compteur d'adressage lent (9), un maitre oscillateur (10), un dispositif de synchronisation des signaux de chrominance et de luminance (11) et un dispositif de filtrage (12). Des suites de signaux de luminance séparées de suites de signaux de chrominance par des signaux de repérage sont engendrées par le transmetteur pour permettre au récepteur de retrouver sans ambiguité les signaux de luminance et de chrominance en s'affranchissant des variations de la position de l'angle de phase de la sous-porteuse couleur.
Application : transmission de signaux vidéo sur canaux à bande étroite et enregistrement et lecture sur bande magnétique de ces signaux.
摘要翻译：一个发射机和一个接收机的系统besteht。该发射机包括一个矩阵化装置（1），两个模拟/数字转换器（2），存储器是指由亮度存储器（3）和色度存储器（4），一个格式化逻辑单元（5），数字/模拟转换装置由可编程频率合成器（6）和一个频率/电压转换器（7）的。因此，它包括一快速寻址计数器（8），一个缓慢的寻址计数器（9），一个主振荡器（10），用于同步伊辛色度和亮度信号的装置（11），以及过滤装置（12）。通过标记信号从色度信号的序列中分离出来的亮度信号的序列是由发射机产生以使接收器能够明确地恢复亮度和色度信号，而在彩色副载波的相位角的位置克服变化。应用：在窄带信道和记录及在磁带上合成信号的读出的视频信号的传输。

19. 发明授权

EP0116424B1 Television receivers 失效
公开(公告)号：EP0116424B1
公开(公告)日：1987-04-22
申请号：EP84300448.2
申请日：1984-01-25
申请人： SONY CORPORATION
发明人： Matsuura, Katsuji , Evans, Christopher Neil
IPC分类号： H04N11/06
CPC分类号： H04N9/642

20. 发明公开

EP0116424A1 Television receivers 失效
标题翻译：电视接收机
公开(公告)号：EP0116424A1
公开(公告)日：1984-08-22
申请号：EP84300448.2
申请日：1984-01-25
申请人： SONY CORPORATION
发明人： Matsuura, Katsuji , Evans, Christopher Neil
IPC分类号： H04N11/06
CPC分类号： H04N9/642
摘要： A television receiver comprises a sawtooth .generator (11) for generating sawtooth waves in dependence on a synchronizing'signal in an incoming positively or negatively modulated (such as SECAM or PAL respectively) composite video signal, a voltage detector (12) capable of generating an output waveform in response to the peak voltage of the sawtooth wave, during the field response period, the output waveform having a relatively high level or a relatively low level depending on the modulation polarity of the incoming video signal composite video signal, a smoothing circuit (13) for generating an output in response to the output waveform over the field period of the incoming video signal, and a switch driver (14) for effecting a control, such as video modulation polarity switching, in dependence on the output of the smoothing circuit (C13).
摘要翻译：一种电视接收机包括一个锯齿波发生器（11），用于根据输入正或负调制（例如SECAM或PAL）复合视频信号中的同步信号产生锯齿波，电压检测器（12），能够产生响应于锯齿波的峰值电压的输出波形，在场响应周期期间，取决于输入视频信号复合视频信号的调制极性，输出波形具有相对高的电平或相对低的电平;平滑电路（13），用于响应输入视频信号的场周期内的输出波形产生输出;以及开关驱动器（14），用于根据平滑的输出实现诸如视频调制极性切换的控制电路（C13）。

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