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11. 发明公开

EP4293718A1 POWER MODULE AND MOTOR DRIVE SYSTEM USING THE SAME 审中-公开
公开(公告)号：EP4293718A1
公开(公告)日：2023-12-20
申请号：EP22208045.9
申请日：2022-11-17
申请人： HYUNDAI MOTOR COMPANY , Kia Corporation
发明人： YOU, Myung Ill , LEE, Hyun Koo
IPC分类号： H01L25/18 , H01L23/538 , H01L23/498 , H01L25/07 , H01L23/373
摘要： An embodiment is power module including a plurality of first switching elements of a first type semiconductor on a first substrate, a plurality of second switching elements of a second type semiconductor and a third switching element of the first type semiconductor or the second type semiconductor on a second substrate, wherein the first substrate has a different thermal conductivity than the second substrate, and a connection spacer configured to electrically connect the first substrate and the second substrate.

12. 发明公开

EP4283671A2 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开
公开(公告)号：EP4283671A2
公开(公告)日：2023-11-29
申请号：EP23170173.1
申请日：2023-04-26
申请人： MediaTek Inc.
发明人： PENG, Tai-Hao , HUANG, Yao-Tsung
IPC分类号： H01L25/065 , H01L25/18 , H01L21/60
摘要： A semiconductor device (100) includes a first layer structure (110), a second layer structure (120), a bridge die (130), a first SoC (140) and a second SoC (150). The bridge die is disposed between the first layer structure and the second layer structure. The first SoC and the second SoC are disposed on the second layer structure. The first SoC and the second SoC are electrically connected through the bridge die.

13. 发明授权

EP3928353B1 THREE-DIMENSIONAL MEMORY DEVICE WITH THREE-DIMENSIONAL PHASE-CHANGE MEMORY 审中-实审
公开(公告)号：EP3928353B1
公开(公告)日：2023-11-08
申请号：EP19927061.2
申请日：2019-09-11
发明人： LIU, Jun
IPC分类号： H01L25/18 , H01L21/98 , H01L21/60 , H01L23/485 , H01L27/06 , G11C13/00 , H10B43/40 , G11C16/04 , G11C11/00 , G11C11/56 , G11C11/40 , H01L23/31 , H10B63/10 , H10N70/20 , H10B12/00 , G11C11/401 , H10B63/00

14. 发明公开

EP4270478A1 MEMORY AND PREPARATION METHOD THEREFOR 审中-公开
公开(公告)号：EP4270478A1
公开(公告)日：2023-11-01
申请号：EP22792732.4
申请日：2022-06-09
申请人： Changxin Memory Technologies, Inc.
发明人： YANG, Mengmeng , BAI, Jie , XIAO, Deyuan
IPC分类号： H01L25/18 , H01L27/108 , H01L21/8242 , H01L21/60
摘要： A memory and a method for manufacturing a memory are provided. The memory includes a plurality of semiconductor structures stacked onto one another. Each of the plurality of semiconductor structures include: a first base including a peripheral circuit structure; a first integrated circuit layer disposed on the first base and electrically connected to the peripheral circuit structure; and a second base disposed on the first integrated circuit layer. A first dielectric layer is disposed between the first integrated circuit layer and the second base. The second base includes a storage circuit structure. Each of the first base and the second base includes a semiconductor layer. Compared with a conventional structure, the provided memory has higher integration and array efficiency, and has a smaller dimension.

15. 发明公开

EP4235785A3 ARTIFICIAL REALITY SYSTEM HAVING SYSTEM-ON-A-CHIP (SOC) INTEGRATED CIRCUIT COMPONENTS INCLUDING STACKED SRAM 审中-公开
公开(公告)号：EP4235785A3
公开(公告)日：2023-10-11
申请号：EP23171134.2
申请日：2021-05-30
申请人： Meta Platforms Technologies, LLC
发明人： PENDSE, Rajendra D.
IPC分类号： G02B27/01 , G02B27/00 , H01L25/065 , H01L25/00 , H01L21/768 , H01L23/48 , H01L23/00 , H01L25/18
摘要： Three-dimensional integrated circuit component(s) are described including a System-on-a-Chip (SoC) die and a separate static random-access memory (SRAM) subcomponent in a vertically stacked arrangement. Such stacked SoC/SRAM integrated circuit components may form part of a system to render artificial reality images.

16. 发明公开

EP4235784A3 MICROELECTRONIC ASSEMBLIES WITH COMMUNICATION NETWORKS 审中-公开
公开(公告)号：EP4235784A3
公开(公告)日：2023-10-04
申请号：EP23170301.8
申请日：2017-12-29
申请人： INTEL Corporation
发明人： ELSHERBINI, Adel A. , ELSHAZLY, Amr , CHANDRASEKHAR, Arun , LIFF, Shawna M. , SWAN, Johanna M.
IPC分类号： H01L25/065 , H01L23/12 , H01L23/48 , H01L23/13 , H01L23/14 , H01L23/367 , H01L23/538 , H01L23/00 , H01L25/16 , H01L25/18 , H01L25/00
摘要： Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate, a first die coupled to the package substrate with first interconnects, and a second die coupled to the first die with second interconnects, wherein the second die is coupled to the package substrate with third interconnects, a communication network is at least partially included in the first die and at least partially included in the second die, and the communication network includes a communication pathway between the first die and the second die.

17. 发明公开

EP4246578A1 PACKAGING MODULE, AND ELECTRONIC APPARATUS 审中-公开
公开(公告)号：EP4246578A1
公开(公告)日：2023-09-20
申请号：EP21896255.3
申请日：2021-06-02
申请人： Huawei Technologies Co., Ltd.
发明人： JI, Zhongli , XU, Wei
IPC分类号： H01L25/18 , H01L23/498 , H01L23/488
摘要： This application provides a packaging module and an electronic device. The packaging module includes substrate layers disposed in a stacking manner, and a plurality of chip layers stacked on the substrate layer. The substrate layer serves as a supporting structure to support the plurality of chip layers. The plurality of chip layers include a top chip layer, and the top chip layer is a chip layer furthest from the substrate layer in the plurality of chip layers. The top chip layer includes a first chip, a connection surface of the first chip faces the substrate layer, and the connection surface of the first chip is conductively connected to a chip of an adjacent chip layer by using a first conductor. In the foregoing technical solution, all chips are supported by one substrate (the substrate layer), to reduce a quantity of used substrates, and further reduce a thickness of the packaging module. In addition, the connection surface of the first chip faces the substrate layer, so that the first conductor connected to the first chip and another chip does not occupy additional space, to reduce the thickness of the packaging module, and facilitate miniaturization of the packaging module.

18. 发明授权

EP3690930B1 SUBSTRATE FOR MOUNTING ELECTRONIC ELEMENT, AND ELECTRONIC DEVICE 审中-实审
公开(公告)号：EP3690930B1
公开(公告)日：2023-09-13
申请号：EP18861408.5
申请日：2018-09-26
发明人： MORITA,Yukio , KITAZUMI,Noboru
IPC分类号： H01L23/12 , H01L23/02 , H01L23/36 , H01L25/04 , H01L25/18 , H01S5/024 , H05K3/46 , H01L23/373 , H01L23/15 , H05K1/02 , H05K1/03 , H05K1/11 , H01L23/40 , H01L33/64

19. 发明公开

EP4227993A1 HALBLEITERBAUELEMENT 审中-公开
公开(公告)号：EP4227993A1
公开(公告)日：2023-08-16
申请号：EP22156634.2
申请日：2022-02-14
申请人： Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
发明人： Heinig, Andy
IPC分类号： H01L25/065 , H01L23/00 , H01L25/18 , H01L27/06 , H01L25/00
摘要： Halbleiterbauelement (10, 10', 10") mit folgenden Merkmalen: erster Schaltungslage (12) mit zumindest einer integrierten Schaltung; und zweiter Schaltungslage (14, 14', 14") mit zumindest einer Stromversorgung (14s), die ausgebildet ist, die integrierte Schaltung (12i) mit elektrischer Energie zu versorgen; wobei eine zweite Hauptoberfläche (12h2) der ersten Schaltungslage (12) mit einer ersten oder zweiten Hauptoberfläche (14h2) der zweiten Schaltungslage (14, 14', 14") verbunden ist.

20. 发明授权

EP3961694B1 ELECTRONIC COMPONENT MODULE AND SILICON NITRIDE CIRCUIT SUBSTRATE 有权
公开(公告)号：EP3961694B1
公开(公告)日：2023-08-09
申请号：EP20794557.7
申请日：2020-03-27
发明人： YAMAGATA, Toshitaka , TERANO, Katsunori
IPC分类号： H01L23/373 , H01L23/15 , H01L23/28 , H01L25/07 , H01L25/18 , H05K1/02 , H05K1/03 , H01L23/495 , H01L23/498 , H01L23/36 , H01L23/31 , H05K3/00 , H05K3/28

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