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    • 12. 发明公开
    • Analog-to-digital conversion
    • 模拟到数字转换
    • EP0167412A3
    • 1988-03-30
    • EP85304837
    • 1985-07-05
    • BRITISH AEROSPACE
    • Geen, John AlbertJohnson, Brian
    • H03M01/20H03M01/06
    • H04J3/10H03M1/0641H03M1/1019H03M1/1225
    • Analog-to-digital converters are subject to various error inducing factors such as offset errors, scale factor instability, quantisation errors, bit weighting errors, and particularly where samples from two or more multiplexed input signal channels are to be digitized, cross-talk errors in the form of signal residues from one channel which affect subsequent channels. The analog-to-digital conversion apparatus described herein comprises a multiplexer for sampling a series of input channels in a sequence which repeats several times over a predetermined digital value update interval, an analog-to-digital converter which digitizes the samples, and an adder/memory combination for summing the samples of each signal during the update interval. To reduce the scale factor errors, a reference voltage signal is applied as one of the channels so that a digitized value of the reference, the digitization being subject to the same instabilities as occur in relation to the other signals, becomes available for correcting the digital values of the other signals. To ensure that this does not just lead to proper scale factor correction at a single point in the converter range, all the input signal samples are combined with a dither signal in the form of a ramp signal which extends over one half of that range and repeats twice during each update interval. The dither signal also includes a pseudo-random or noise component to reduce the quatisa- tion errors. The dithering also reduces the bit-weighting errors. Offset errors are reduced by an auto-zeroing technique in which half the samples taken in each update interval are inverted prior to digitization and re-inverted after digitization. Preferably, to reduce cross-talk, the auto-zeroing does not just comprise inverting and re-inverting for one complete half of the update interval - rather the auto-zeroing 'on' signal comprises a chosen binary sequence with one bit for each sample. The auto-zero 'on' periods still sum to half the update interval but are distributed over that interval, in effect, so as to decorrelate the channels. By making the update interval equal the period of some dominant noise component which may appear in the input channels, ie the gyro wheel noise in the case of an inertial navigation system, this noise component can be averaged out by the auto-zeroing and sample summation.
    • 19. 发明公开
    • DATA TRANSMISSION COORDINATION OVER DIGITAL SUBSCRIBER LINES
    • DATENÜBERTRAGUNGSKOORDINATIONÜBERDIGITALE TEILNEHMERLEITUNGEN
    • EP2912775A1
    • 2015-09-02
    • EP13785699.3
    • 2013-10-14
    • Huawei Technologies Co., Ltd.
    • LUO, YuanqiuEFFENBERGER, Frank
    • H04B3/32H04L5/00H04Q11/08
    • H04B10/27H04B3/32H04J3/10H04J3/1694H04L25/085H04L25/14H04L2012/6478
    • An optical management node comprising a memory comprising instructions, a processor coupled to the memory and configured execute the instructions, wherein executing the instructions causes the processor to schedule data transmissions across an electrical network between a plurality of user terminals and an optoelectrical interface by using time division multiplexing or time division multiple access based on optimization of crosstalk performance of electrical lines of the electrical network, and a transmitter coupled to the processor and configured to transmit schedule information to the optoelectrical interface via an optical network. Also disclosed is a method implemented in a management node comprising scheduling data transmissions with a plurality of user terminals across a Digital Subscriber Line (DSL) network using time division scheduling based on optimization of crosstalk performance of DSL lines of the DSL network, and transmitting schedule information to the user terminals via an optical network.
    • 一种光学管理节点,包括包括指令的存储器,耦合到所述存储器并被配置为执行所述指令的处理器,其中执行所述指令使得所述处理器通过使用时间来调度跨多个用户终端和光电接口之间的电网络的数据传输 基于电网的电线的串扰性能的优化的分段多路复用或时分多址,以及耦合到处理器并被配置为经由光网络将调度信息发送到光电接口的发射机。 还公开了一种在管理节点中实现的方法,包括:使用基于DSL网络的DSL线路的串扰性能的优化的时分调度来跨数字用户线路(DSL)网络来调度与多个用户终端的数据传输,以及发送时间表 通过光网络向用户终端发送信息。