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12. 发明公开

EP3329585A1 HYBRID MODULAR MULTI-LEVEL CONVERTER 有权
公开(公告)号：EP3329585A1
公开(公告)日：2018-06-06
申请号：EP16741322.8
申请日：2016-07-21
申请人： ABB Schweiz AG
发明人： SCHWEIZER, Mario , STEIMER, Peter , DIJKHUIZEN, Frans
IPC分类号： H02M7/487
CPC分类号： H02M7/487 , H02M2007/4835
摘要： A modular multi-level converter (10) for converting a DC voltage into an AC voltage comprises a first row (14) and a second row (18) of converter cells (16, 20), each converter cell (16, 20) comprising a cell capacitor (Ccell, Ccell') and semiconductor switches (34, 36, 34', 36') adapted for connecting the cell capacitor to an output of the converter cell (16, 20) and for bypassing the cell capacitor. The first row (14) of converter cells (16) interconnects a positive DC link connection point (22a) and a negative DC link connection point (22c), wherein the first row (14) of converter cells (16) comprises an upper pair and a lower pair of series-connected strings (24a, 24b, 24c, 24d) of series-connected converter cells (16), wherein the upper pair of strings (24a, 24b) connects the positive DC link connection point (22a) with a neutral DC link connection point (22b) and provides an upper intermediate connection point (26a) between the strings (24a, 24b) and the lower pair of strings (24c, 24d) connects the negative DC link connection point (22c) with the neutral DC link connection point (22b) and provides a lower intermediate connection point (26b) between the strings (24c, 24d). The second row (18) of converter cells (20) comprises a pair of strings (28a, 28b) of series-connected converter cells (20) interconnecting the upper intermediate connection point (26a) and the lower intermediate connection point (26b) and provides an AC connection point between the strings (28a, 28b). The converter cells (16) of the first row (14) have a first cell capacity (Ccell') and the converter cells (20) of the second row (18) have a second cell capacity (Ccell) higher than the first cell capacity (Ccell'). The converter cells (16) of the first row (14) have a capacitor switch (36'), which interconnects the cell capacitor (Ccell') with the outputs (38) and which has a lower current rating than a main switch (34') of the converter cells (16) of the first row (14) connected in parallel to the cell capacitor (Ccell'). The converter cells (20) of the second row (18) have a capacitor switch (36) and the current rating of the capacitor switch (36') of a converter cell (16) of the first row (14) is smaller than a current rating of the capacitor switch (36) of a converter cell (20) of the second row (18).

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