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    • 101. 发明公开
    • Analog-to-digital encoder and digital-to-analog decoder
    • 模拟数字编码器和数字到模拟解码器
    • EP0138548A3
    • 1988-01-27
    • EP84306849
    • 1984-10-08
    • DOLBY LABORATORIES LICENSING CORPORATION
    • Todd, Craig C.Gundry, Kenneth James
    • H04B14/06
    • H03G9/005H03G5/16H03G9/025H03M3/022H04B1/62H04B14/064
    • In the encoder an audio input signal is firstly given an adaptive pre-emphasis characteristic by a pre-processing circuit (16) and is then converted to a digital signal for transmission by a delta-modulator (22). In order to minimise the digital bit rate the delta-modulator (22) is rendered adaptive by deriving a step-size control signal in a circuit (18) responsive to the slope of the input signal, and applying the control signal to vary the step-size of the delta-modulator (22). The bandwidth of the control signal is limited to say 50 Hz by the step-size circuit (18) itself or a subsequent low pass filter (24) in order to render the encoder insensitive to random step-size errors. The slow response of the control signal is compensated for by a delay circuit (20) preceding the delta-modulator (22). The corresponding decoder comprises an adaptive delta-modulator and a circuit complementary to the pre-processing circuit (16). In order to keep the decoder as simple as possible it has no step-size derivation circuit. Instead, the step-size control signal is transmitted in conjunction with the main digital signal by way of an analog to digital converter (26). In the encoder a complementary digital to analog converter is followed by another bandwidth limiting filter to reduce the effect of transmission bit errors. The slow response of the decoder control signal is compensated for by transmitting the step-size information from the , encoder with a time advance relative to the main digital signal.
    • 在编码器中,首先通过预处理电路(16)给音频输入信号赋予自适应预加重特性,然后将其转换为数字信号,以由Δ调制器(22)传输。 为了使数字比特率最小化,增量调制器(22)通过响应于输入信号的斜率导出电路(18)中的步长控制信号而变为自适应,并且施加控制信号以改变步骤 Δ调制器(22)的尺寸。 为了使编码器对随机步长误差不敏感,控制信号的带宽被步进电路本身或随后的低通滤波器(24)限制为50Hz。 控制信号的缓慢响应由在delta调制器(22)之前的延迟电路(20)补偿。 相应的解码器包括自适应增量调制器和与预处理电路(16)互补的电路。 为了使解码器尽可能简单,它没有步长推导电路。 相反,步进大小控制信号通过模数转换器(26)与主数字信号一起发送。 在编码器中,互补数模转换器之后是另一个带宽限制滤波器,以减少传输位错误的影响。 解码器控制信号的缓慢响应是通过以相对于主数字信号的时间提前从编码器发送步长信号来补偿的。
    • 102. 发明公开
    • Digital encoder and decoder synchronization in the presence of data dropouts
    • 同步eine digitalen Kodierers und eines Dekodierers Anwesenheit vonDatenausfällen。
    • EP0240123A2
    • 1987-10-07
    • EP87301412.0
    • 1987-02-19
    • AT&T Corp.
    • Tomasevich, George Richard
    • H04B14/06
    • H04B14/068
    • Recovery from transmission errors is facilitated by initializing state variables to prescribed values in both a digital encoder used in transmitting a signal and a corresponding digital decoder used in receiving the signal when the transmission channel becomes inactive. Additionally, the values of the encoder and decoder state variables are held constant (via 2706, 2709, 2710, 2711) for up to a prescribed interval upon the transmission channel becoming inactive. The state variables are held constant until either the prescribed holding interval elapses or the transmission channel becomes active. If the prescribed holding interval elapses before the transmission channel becomes active the state variables are initialized to the prescribed values (via 2711). However, if the encoder or decoder transmission channel becomes active before the prescribed holding interval has elapsed, the encoder or decoder, respectively, returns to its normal operative state (via 2709) and the state variables are allowed to adapt.
    • 来自接收接入模块的分组分解器的样本(I'(k))被提供给可变速率逆量化器(2702,2703)和量化器适配单元(2701),该量化器适配单元选择用于生成其比例因子的适当电路。 当在特定时隙中不存在分组时,量化差分样本与来自自适应预测器(2705)的样本估计相加(2704,2707)以产生具有噪声信号(2714)的多路复用重构样本(2708)。 在传输通道不活动的情况下,编码器和解码器状态变量(2706)在被初始化之前保持恒定的规定间隔(2711),除非在恢复时间限制内(2709)恢复正常自适应操作。
    • 109. 发明公开
    • FEEDBACK CONTROL SYSTEMS WITH PULSE DENSITY SIGNAL PROCESSING CAPABILITIES
    • 具有脉冲密度信号处理能力的反馈控制系统
    • EP3273600A1
    • 2018-01-24
    • EP17176672.8
    • 2017-06-19
    • Altera Corporation
    • JEPPESEN, Benjamin Peter
    • H03K19/177H03M3/00H04B14/06
    • H03K19/17708H03K19/00346H03K19/1778H03K19/21H04B14/026H04B14/06
    • A feedback control system may include a feedback controller for controlling a plant using pulse density signals. The feedback controller may include a pulse density signal generator and a controller logic circuit. The pulse density signal generator may receive input command signals and generate signed or unsigned pulse density input signals. The controller logic may receive the pulse density input signals from the pulse density signal generator and feedback pulse density signals from the plant and may generate corresponding pulse density control signals for controlling the plant based on the input command signals. The controller logic may include a sign change logic, an addition circuit, and an optional amplifier circuit. The pulse density signal generator may also include rate transition circuits for ensuring that the pulse density input signals and the feedback pulse density signals are uncorrelated.
    • 反馈控制系统可以包括用于使用脉冲密度信号来控制工厂的反馈控制器。 反馈控制器可以包括脉冲密度信号发生器和控制器逻辑电路。 脉冲密度信号发生器可以接收输入命令信号并且生成有符号或无符号的脉冲密度输入信号。 控制器逻辑可以接收来自脉冲密度信号发生器的脉冲密度输入信号和来自设备的反馈脉冲密度信号,并且可以基于输入命令信号产生用于控制设备的对应脉冲密度控制信号。 控制器逻辑可以包括符号改变逻辑,加法电路和可选的放大器电路。 脉冲密度信号发生器还可以包括用于确保脉冲密度输入信号和反馈脉冲密度信号不相关的速率转换电路。