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    • 102. 发明公开
    • Low distortion amplifier
    • 放大器具有低失真
    • EP0766378A3
    • 1999-05-19
    • EP96306730.1
    • 1996-09-17
    • AT&T Corp.
    • Gans, Michael JamesYeh, Yu Shuan
    • H03F1/32
    • H03F1/3258H03F1/3276H03F2200/294H03F2200/372
    • Disclosed is a low distortion amplifier circuit (10) of the predistortion type that employs a cuber circuit (14) in the predistortion path to provide optimized signal energy (S2) at third order intermodulation frequencies, which cancels IMD products generated by the main power amplifier (20). The cuber circuit employs a pair of anti-parallel diodes that are biased with at least one D.C. source to produce a D.C. current flow through each diode. The input signal applied to the cuber circuit produces signal current flow in each diode to enable a third order output current (S1) to be extracted. A desired amount of third order power is thereby provided to realize minimal IMD power in the main amplifier output over a wide dynamic range of the input signal. Using a circuit analysis based on a power series approach, circuit parameters of the cuber circuit can be optimized to provide a desired amount of cancellation of third order IMD products in the main amplifier, without generating excessive higher order power, over an optimized dynamic range of the input signal.
    • 106. 发明公开
    • High frequency noise and impedance matched integrated circuits
    • Rausch- und Impedanzangepasste integrierte Hochfrequenzschaltkreise
    • EP0833442A1
    • 1998-04-01
    • EP97307266.3
    • 1997-09-18
    • NORTHERN TELECOM LIMITED
    • Voinigescu, Sorin P.Maliepaard, Michael C.
    • H03F1/56H03F1/26
    • H03F1/22H03F1/26H03F1/565H03F3/189H03F2200/294H03F2200/372H03F2200/489H03F2200/492
    • An monolithic integrated circuit comprising a transistor-inductor structure is provided having simultaneously noise matched and input impedance matched characteristics at a desired frequency. The transistor-inductor structure comprises a first transistor Q 1 which may be a common emitter bipolar transistor or common source MOSFET transistor Q 1 , a second optional transistor Q 2 , a first inductor L E in the emitter (source) of Q 1 , and a second inductor L B in the base (gate) of Q1. The emitter length l E1 , or correspondingly the gate width w g , of Q1 is designed such that the real part of its optimum noise impedance is equal to the characteristic impedance of the system, Z 0 , which is typically 50Ω. The first inductor L E , provides matching of the real part of the input impedance and the second inductor L B cancels out the noise reactance and input impedance reactance of the structure. The resulting simultaneously noise and impedance matched integrated circuit provides optimal performance. The optimized transistor-inductor structure has particular application to silicon integrated circuits, such as low noise amplifiers and mixer circuits, for wireless and RF circuit applications at 5.8 Ghz, previously reported only for GaAs based circuits. Other basic silicon integrated circuits were optimized at frequencies up to ~12 GHz.
    • 提供了包括晶体管 - 电感器结构的单片集成电路,其具有期望频率的同时噪声匹配和输入阻抗匹配特性。 晶体管 - 电感器结构包括第一晶体管Q1,其可以是公共发射极双极晶体管或公共源MOSFET晶体管Q1,第二可选晶体管Q2,Q1的发射极(源极)中的第一电感器LE和第二电感器LB Q1的基极(门)。 Q1的发射极长度lE1或相应的栅极宽度wg被设计成使得其最佳噪声阻抗的实部等于系统的特性阻抗Z0,通常为50欧姆。 第一电感器LE提供输入阻抗的实部与第二电感器LB的匹配,消除了结构的噪声电抗和输入阻抗电抗。 所产生的同时噪声和阻抗匹配集成电路提供最佳性能。 优化的晶体管 - 电感器结构特别适用于5.8Ghz的无线和RF电路应用的硅集成电路,例如低噪声放大器和混频器电路,以前仅针对基于GaAs的电路。 其他基本硅集成电路在频率高达12 GHz的频率下进行了优化。