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1. 发明公开

EP4297097A3 SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING THE SAME 审中-公开
公开(公告)号：EP4297097A3
公开(公告)日：2024-04-03
申请号：EP23207308.0
申请日：2009-03-26
申请人： Rohm Co., Ltd.
发明人： NAKANO, Yuki
IPC分类号： H01L29/78 , H01L29/12 , H01L29/06 , H01L29/10
摘要： A semiconductor device (A1) includes a semiconductor layer having a first face with a trench (3) formed thereon and a second face opposite to the first face, a gate electrode (41), and a gate insulating layer (5). The semiconductor layer includes a first n-type semiconductor layer (11), a second n-type semiconductor layer (12), a p-type semiconductor layer (13), and an n-type semiconductor region (14). The trench (3) is formed so as to penetrate through the p-type semiconductor layer (13) and to reach the second n-type semiconductor layer (12). The p-type semiconductor layer (13) includes an extended portion extending to a position closer to the second face of the semiconductor layer than the trench (3) is. Such structure allows suppressing dielectric breakdown in the gate insulating layer (5).

2. 发明公开

EP4333078A1 SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：EP4333078A1
公开(公告)日：2024-03-06
申请号：EP22907078.4
申请日：2022-11-07
申请人： Fuji Electric Co., Ltd.
发明人： KINOSHITA, Akimasa
IPC分类号： H01L29/78 , H01L29/12
摘要： N + -type source regions (4), low-concentration regions (5), and p ++ -type contact regions (6) are each selectively provided in surface regions of a semiconductor substrate (30), at a front surface thereof, and are in contact with a source electrode. The n + -type source regions (4) and the low-concentration regions (5) are in contact with a gate insulating film (8) at sidewalls of a trench (7) and are adjacent to channel portions of a p-type base region, in a depth direction (Z). The p ++ -type contact regions (6) are disposed apart from the trench (7). In surface regions of an epitaxial layer (33) constituting the p-type base region, portions left free of the n + -type source regions (4) and the p ++ -type contact regions (6) configure the low-concentration regions (5) of an n - -type or a p - -type. The low-concentration regions (5) are disposed periodically along the sidewalls of the trench (7), between the trench (7) and the p ++ -type contact regions (6). By the described structure, short-circuit withstand capability may be increased without increasing the number of processes.

3. 发明公开

EP4333073A1 SIC-BASED ELECTRONIC DEVICE WITH IMPROVED GATE DIELECTRIC AND MANUFACTURING METHOD THEREOF, DIODE 审中-公开
公开(公告)号：EP4333073A1
公开(公告)日：2024-03-06
申请号：EP23182331.1
申请日：2023-06-29
申请人： STMicroelectronics S.r.l.
发明人： FIORENZA, Patrick , ROCCAFORTE, Fabrizio , ZANETTI, Edoardo , SAGGIO, Mario Giuseppe
IPC分类号： H01L29/51 , H01L29/78 , H01L29/872 , H01L21/336 , H01L29/12
摘要： Electronic device (20; 60) comprising: a semiconductor body (48; 68), in particular of Silicon Carbide, SiC, having a first (48a; 68a) and a second face (48b; 68b), opposite to each other along a first direction (Z); and an electrical terminal (G; 82, 74) at the first face (48b; 68b), insulated from the semiconductor body (48; 68) by an electrical insulation region (52; 80). The electrical insulation region is a multilayer comprising: a first insulating layer (102), of a Silicon Oxide, in contact with the semiconductor body; a second insulating layer (104) on the first insulating layer (102), of a Hafnium Oxide; and a third insulating layer (106) on the second insulating layer (104), of an Aluminum Oxide.

4. 发明公开

EP4305672A2 SILICON-GERMANIUM ALLOY-BASED QUANTUM DOTS WITH INCREASED ALLOY DISORDER AND ENHANCED VALLEY SPLITTING 审中-公开
公开(公告)号：EP4305672A2
公开(公告)日：2024-01-17
申请号：EP22833911.5
申请日：2022-06-17
申请人： Wisconsin Alumni Research Foundation , NewSouth Innovations Pty Limited
发明人： FRIESEN, Mark G. , LOSERT, Merritt , COPPERSMITH, Susan Nan
IPC分类号： H01L29/66 , H01L29/12 , G06N10/20 , G06N10/40 , B82Y10/00

5. 发明授权

EP3103139B1 ENERGY-FILTERED COLD ELECTRON DEVICES AND METHODS 有权
公开(公告)号：EP3103139B1
公开(公告)日：2023-06-07
申请号：EP15746295.3
申请日：2015-02-03
发明人： KOH, Seong, Jin , BHADRACHALAM, Pradeep , MA, Liang-Chieh
IPC分类号： H01L29/76 , H01L29/12 , H01L29/08 , H01L29/66 , H01L29/772 , H01L29/06 , H01L29/88 , H01L21/336 , H01L29/78 , B82Y10/00 , B82Y40/00

6. 发明公开

EP4187616A1 A VERTICAL HEMT, AN ELECTRICAL CIRCUIT, AND A METHOD FOR PRODUCING A VERTICAL HEMT 审中-公开
公开(公告)号：EP4187616A1
公开(公告)日：2023-05-31
申请号：EP21210815.3
申请日：2021-11-26
申请人： Epinovatech AB
发明人： OLSSON, Martin Andreas
IPC分类号： H01L29/778 , H01L29/417 , H01L29/06 , H01L27/06 , H01L29/20 , H01L29/08 , H01L29/10 , H01L29/12 , H01L29/423 , H01L21/338
摘要： A vertical high-electron-mobility transistor, HEMT (100), comprising:
a substrate (310);
a drain contact (410), the drain contact being a metal contact via through said substrate;
a pillar layer (500) arranged above the drain contact (410) and comprising at least one vertical pillar (510) and a supporting material (520) laterally enclosing the at least one vertical pillar (510);
a heterostructure mesa (600) arranged on the pillar layer (500), the heterostructure mesa (600) comprising an AIGaN-layer (610) and a GaN-layer (620), together forming a heterojunction (630);
at least one source contact (420a, 420b) electrically connected to the heterostructure mesa (600);
a gate contact (430) arranged on said heterostructure mesa (600), and above the at least one vertical pillar (510);
wherein the at least one vertical pillar (510) is forming an electron transport channel between the drain contact (410) and the heterojunction (630).

7. 发明公开

EP4141953A1 SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：EP4141953A1
公开(公告)日：2023-03-01
申请号：EP22199701.8
申请日：2014-11-26
申请人： Rohm Co., Ltd.
发明人： NAGAO, Katsuhisa , KAWAMOTO, Noriaki
IPC分类号： H01L29/12 , H01L29/78 , H01L29/739
摘要： A semiconductor device (1) is manufactured which includes a SiC epitaxial layer (28), a plurality of transistor cells (18) that are formed in the SiC epitaxial layer (28) and that are subjected to ON/OFF control by a predetermined control voltage, a gate electrode (19) that faces a channel region (32) of the transistor cells (18) in which a channel is formed when the semiconductor device (1) is in an ON state, a gate metal (44) that is exposed at the topmost surface for electrical connection with the outside and that is electrically connected to the gate electrode (19) while being physically separated from the gate electrode (19), and a built-in resistor (21) that is made of polysilicon and that is disposed below the gate metal (44) so as to electrically connect the gate metal (44) and the gate electrode (19) together.

8. 发明公开

EP4133526A1 SUPERCONDUCTING MICROWAVE FILTERS AND FILTER ELEMENTS FOR QUANTUM DEVICES 审中-实审
公开(公告)号：EP4133526A1
公开(公告)日：2023-02-15
申请号：EP21716225.4
申请日：2021-04-07
申请人： Technische Universiteit Delft
发明人： ZHENG, Guoji , HARVEY-COLLARD, Patrick
IPC分类号： H01L27/18 , B82Y10/00 , G06N10/00 , H01L29/12 , H01L39/14 , H01L39/24 , H01P1/201

9. 发明公开

EP4100993A1 LIGHT-DRIVEN TRANSITION FROM INSULATOR TO CONDUCTOR 审中-公开
公开(公告)号：EP4100993A1
公开(公告)日：2022-12-14
申请号：EP21750329.1
申请日：2021-02-03
申请人： Bowling Green State University
发明人： SELIM, Farida
IPC分类号： H01L21/02 , H01L23/532 , H01L29/12

10. 发明公开

EP4033519A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME 审中-实审
公开(公告)号：EP4033519A1
公开(公告)日：2022-07-27
申请号：EP20864989.7
申请日：2020-06-18
申请人： Hitachi, Ltd. , Toyo Tanso Co., Ltd.
发明人： KOBAYASHI, Keisuke , KONISHI. Kumiko , SHIMA, Akio , YABUKI, Norihito , SUDOH, Yusuke , NOGAMI, Satoru , KITABATAKE, Makoto
IPC分类号： H01L21/324 , H01L29/78 , H01L29/12 , H01L21/336
摘要： To provide a technique capable of improving performance and reliability of a semiconductor device. An n - -type epitaxial layer (12) is formed on an n-type semiconductor substrate (11), and a p + -type body region (14), n + -type current spreading regions (16, 17), and a trench TR are formed in the n - -type epitaxial layer (12). A bottom surface B1 of the trench TR is located in the p + -type body region (14), a side surface S1 of the trench TR is in contact with the n + -type current spreading region (17), and a side surface S2 of the trench TR is in contact with the n + -type current spreading region (16). Here, a ratio of silicon is higher than a ratio of carbon in an upper surface T1 of the r - -type epitaxial layer (12), and the bottom surface B1, the side surface S1, and the side surface S2 of the trench. Furthermore, an angle θ1 at which the upper surface T1 of the n - -type epitaxial layer (12) is inclined with respect to the side surface S1 is smaller than an angle θ2 at which the upper surface T1 of the n - -type epitaxial layer (12) is inclined with respect to the side surface S2.

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