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1. 发明授权

US06570988B1 Simple technique for implementing a cryptographic primitive using elementary register operations 有权
标题翻译：使用基本寄存器操作来实现加密原语的简单技术
公开(公告)号：US06570988B1
公开(公告)日：2003-05-27
申请号：US09329139
申请日：1999-06-09
申请人： Ramarathnam Venkatesan , Mariusz Jakubowski
发明人： Ramarathnam Venkatesan , Mariusz Jakubowski
IPC分类号： H04L928
CPC分类号： H04L9/0643 , H04L2209/38 , H04L2209/56
摘要： A technique which implements a primitive for computing, e.g., a checksum. Specifically, this primitive replaces a mod(M) operation with a series of simple elementary register operations. These operations include mod 2n multiplications, order manipulations (e.g., byte or word swaps), and additions—all of which are extremely simple to implement and require very few processing cycles to execute. Hence, use of our inventive technique can significantly reduce the processing time to compute various cryptographic parameters, such as, e.g., a message authentication code (MAC), or to implement a stream cipher, over that conventionally required. This technique has both invertible and non-invertible variants.
摘要翻译：实现用于计算例如校验和的原语的技术。具体来说，该原语用一系列简单的基本寄存器操作替换了一个mod（M）操作。这些操作包括mod 2n乘法，顺序操纵（例如，字节或字交换）和添加 - 所有这些都非常容易实现，并且需要非常少的处理周期来执行。因此，使用本发明的技术可以显着减少计算各种加密参数（例如消息认证码（MAC））的处理时间，或者实现传统上所需要的流密码。这种技术具有可逆和非可逆变体。

2. 发明授权

US06504929B1 Encryption strength evaluation support apparatus and recording medium recording encryption strength evaluation support program 有权
标题翻译：加密强度评估支持装置和记录介质记录加密强度评估支持程序
公开(公告)号：US06504929B1
公开(公告)日：2003-01-07
申请号：US09236640
申请日：1999-01-26
申请人： Yukiyasu Tsunoo
发明人： Yukiyasu Tsunoo
IPC分类号： H04L928
CPC分类号： H04L9/00
摘要： An encryption strength evaluation support apparatus includes a statistical data sampling program executing means for statistically obtaining correlations between individual bits of input and output data of an encryption device to be evaluated, a statistical result storage means for storing the bit correlations obtained by the statistical data sampling program executing means, and a statistical result edit/output means for editing and outputting the bit correlations stored in the statistical result storage means in the form of a table or a two- or three-dimensional graph. A mechanically readable recording medium recording an encryption strength evaluation support program for the above apparatus is also disclosed.
摘要翻译：一种加密强度评估支持装置包括统计数据采样程序执行装置，用于统计地获得要评估的加密装置的输入和输出数据的各个比特之间的相关性;统计结果存储装置，用于存储通过统计数据采样获得的比特相关性程序执行装置和统计结果编辑/输出装置，用于以表格或二维或三维图形的形式编辑和输出存储在统计结果存储装置中的比特相关性。还公开了一种记录上述装置的加密强度评估支持程序的机械可读记录介质。

3. 发明授权

US06301360B1 Method of encoding information using a position-based encoding scheme 失效
标题翻译：使用基于位置的编码方案对信息进行编码的方法
公开(公告)号：US06301360B1
公开(公告)日：2001-10-09
申请号：US08973062
申请日：1997-11-25
申请人： Siegfried Bocionek , Ingolf Karls , Dieter Schütt , Wanda Latocha
发明人： Siegfried Bocionek , Ingolf Karls , Dieter Schütt , Wanda Latocha
IPC分类号： H04L928
CPC分类号： H04N1/32203 , G09C5/00 , H04L9/001 , H04L2209/60 , H04N1/32229 , H04N1/32245 , H04N1/32251 , H04N2201/327
摘要： Data sequences comprised of figure-coded units, such as text comprised of ASCII characters, are encoded into another data entity, such as a pixel based image. The encoding implements a positionally-based encoding scheme in which values of the data entity (basic matrix) upon which the data sequences are to be encoded is used. The position for values to be changed in the basic matrix are determined by a reversible function, and the encoding value that these values are changed by may be 1, another arbitrary number, or determined by a formula. The counterpart to the reversible function is known by an intended receiver of the encoded data for decoding purposes. The basic matrix may be generated utilizing a suitably complex function, such as a chaos function, with parameters known only to the sender and receiver.
摘要翻译：由诸如由ASCII字符组成的文本的图形编码单元组成的数据序列被编码到另一个数据实体中，例如基于像素的图像。编码实现了基于位置的编码方案，其中使用要对其编码数据序列的数据实体（基本矩阵）的值。基本矩阵中要改变的值的位置由可逆函数确定，并且这些值被改变的编码值可以是1，另一个任意数，或者由公式确定。编码数据的预期接收机为了解码目的而知道可逆函数的对应物。基本矩阵可以利用诸如混沌函数的合适的复杂函数产生，其具有仅对发送器和接收器已知的参数。

4. 发明授权

US06266419B1 Custom character-coding compression for encoding and watermarking media content 失效
标题翻译：用于编码和水印媒体内容的自定义字符编码压缩
公开(公告)号：US06266419B1
公开(公告)日：2001-07-24
申请号：US08888014
申请日：1997-07-03
申请人： John Blakeway Lacy , Schuyler Reynier Quackenbush , James H. Snyder
发明人： John Blakeway Lacy , Schuyler Reynier Quackenbush , James H. Snyder
IPC分类号： H04L928
CPC分类号： H04N21/8358 , G06T1/0021 , G06T2201/0053 , G11B20/00007 , G11B20/00086 , G11B20/0021 , G11B20/00884 , H04N19/00 , H04N21/23892
摘要： A method of compressing media content in which a first predetermined portion of a media content is compressed using a first data-based compression algorithm and inserted into a first portion of a data frame. A second predetermined portion of the media content is compressed using a second data-based compression algorithm and is inserted into a second portion of the data frame. The second predetermined portion of the media content is different from the first predetermined portion of the media content, and the second data-based compression algorithm is different from the first data-based compression algorithm. At least one of the first and second data-based compression algorithms is a private data-based compression algorithm. A plurality of data frames are generated and are made available for distribution, for example, by transmission over a computer network, such as the Internet.
摘要翻译：一种压缩媒体内容的方法，其中使用第一基于数据的压缩算法来压缩媒体内容的第一预定部分并将其插入数据帧的第一部分。使用第二基于数据的压缩算法来压缩媒体内容的第二预定部分，并将其插入数据帧的第二部分。媒体内容的第二预定部分与媒体内容的第一预定部分不同，第二基于数据的压缩算法与第一基于数据的压缩算法不同。第一和第二基于数据的压缩算法中的至少一个是基于私有数据的压缩算法。生成多个数据帧，并且例如通过诸如因特网之类的计算机网络的传输可用于分发。

5. 发明授权

US06687376B1 High-speed long code generation with arbitrary delay 有权
标题翻译：高速长码产生随意延时
公开(公告)号：US06687376B1
公开(公告)日：2004-02-03
申请号：US09222445
申请日：1998-12-29
申请人： Hirohisa Yamaguchi
发明人： Hirohisa Yamaguchi
IPC分类号： H04L928
CPC分类号： H04J13/10 , H04J13/0022
摘要： A circuit is designed with a first register circuit (364) arranged to store a state matrix. A memory circuit (710) is arranged to store a plurality of addressable matrices. A control circuit (700) is coupled to receive a delay value and a clock signal. The control circuit is arranged to address a selected matrix from the plurality of addressable matrices in response to the delay value and the clock signal. A backward register circuit (420) is coupled (712) to receive the selected matrix. The backward register circuit is arranged to produce a plurality of shifted matrices from the selected matrix in response to the clock signal. A logic circuit (330-354) is coupled to receive the state matrix, the selected matrix and the plurality of shifted matrices. The logic circuit produces a logical combination of the state matrix and each of the selected matrix and the plurality of shifted matrices.
摘要翻译：电路被设计为具有布置成存储状态矩阵的第一寄存器电路（364）。存储电路（710）被布置成存储多个可寻址矩阵。控制电路（700）被耦合以接收延迟值和时钟信号。控制电路被布置成响应于延迟值和时钟信号从多个可寻址矩阵中寻址选定的矩阵。反向寄存器电路（420）被耦合（712）以接收所选择的矩阵。反向寄存器电路被布置为响应于时钟信号从所选矩阵产生多个移位矩阵。逻辑电路（330-354）被耦合以接收状态矩阵，所选矩阵和多个移位矩阵。逻辑电路产生状态矩阵与所选矩阵和多个移位矩阵中的每一个的逻辑组合。

6. 发明授权

US06560336B1 Apparatus for operating double vector and encrypting system including the same 有权
标题翻译：用于操作包括其的双向量和加密系统的装置
公开(公告)号：US06560336B1
公开(公告)日：2003-05-06
申请号：US09143578
申请日：1998-08-28
申请人： Seigo Arita
发明人： Seigo Arita
IPC分类号： H04L928
CPC分类号： H04L9/3013
摘要： There is provided an apparatus for summing bivectors, e.g. double vectors (alternatively referred to as bivectors) each having a plurality of pairs of elements selected from a predetermined finite field, the apparatus including (a) a device for inputting bivectors X1 and X2, and parameters A (e.g., a3 to a13) for defining a curve therethrough, (b) a first memory for storing the bivector X1 therein, (c) a second memory for storing the bivector X2 therein, (d) a third memory for storing the parameters A therein, and (e) a device for reading the bivectors X1 and X2, and the parameters A out of the first, second and third memories, respectively, and, when the bivectors X1 and X2 are supposed to be coordinate value rows of points in point-sets Q1 and Q2 on the curve defined with the parameters A, operating a bivector X3 comprised of coordinate value row of points in a point-set Q3 equal to a sum of the point-sets Q1 and Q2 in Jacobian group of the curve defined with the parameters A. The above-mentioned apparatus may be used for a public key encryption system in a smaller size.
摘要翻译：提供了一种用于求和生物医生的装置，例如，每个具有从预定有限域选择的多个元素对的双向量（或称为双向向量），所述装置包括：（a）用于输入双向生成器X1和X2的装置，以及参数A（例如，a3至a13），用于（b）第一存储器，用于在其中存储双向器X1;（c）第二存储器，用于在其中存储双极子X2;（d）第三存储器，用于存储参数A;以及（e）用于分别读取第一，第二和第三存储器中的参数A，并且当bivectors X1和X2被假定为位置Q1和Q2中的点集合Q1和Q2中的点的坐标值行时，用参数A定义的曲线，操作由等于由参数A定义的曲线的雅可比组中的点集合Q1和Q2之和的点集合Q3中的坐标值行组成的双向运算器X3。上述所述设备可以用于公共密钥加密尺寸较小的系统。

7. 发明授权

US06314186B1 Block cipher algorithm having a robust security against differential cryptanalysis, linear cryptanalysis and higher-order differential cryptanalysis 失效
标题翻译：块密码算法具有抗差分密码分析，线性密码分析和高阶差分密码分析的强大安全性
公开(公告)号：US06314186B1
公开(公告)日：2001-11-06
申请号：US09095845
申请日：1998-06-11
申请人： Chang-hyi Lee , Young-tae Cha
发明人： Chang-hyi Lee , Young-tae Cha
IPC分类号： H04L928
CPC分类号： H04L9/0625 , H04L9/002 , H04L2209/08 , H04L2209/24
摘要： The present invention relates to the block cipher algorithm based on the prior Feistel type block cipher algorithm (or similar to DES algorithm). Usually the security of Feistel type block cipher algorithm depends on the structure of its round function. More specifically, the present invention relates to the round function structure of the Feistel type block cipher algorithm, in the instance that the round input data block is divided into 8-bit blocks and the divided sub-blocks are fed, with the combined output data of the previous S-box, into 256×8 S-box, except for the first input sub-data block. The first sub-data block one is directly fed into the first S-box. The total output data block, after these steps, is rotated by 8-bits and this rotated result is the output of the current round function.
摘要翻译：本发明涉及基于现有的Feistel类型块密码算法（或类似于DES算法）的块密码算法。通常，Feistel型块密码算法的安全性取决于其循环函数的结构。更具体地说，本发明涉及Feistel型块密码算法的循环函数结构，在将输入数据块分为8位块和分割子块的情况下，组合输出数据的前一个S盒，进入256x8的S盒，除了第一个输入的子数据块。第一子数据块1被直接馈送到第一个S盒中。在这些步骤之后，总输出数据块被旋转8位，这个旋转结果是当前循环函数的输出。

8. 发明授权

US06298136B1 Cryptographic method and apparatus for non-linearly merging a data block and a key 失效
标题翻译：用于非线性合并数据块和密钥的加密方法和装置
公开(公告)号：US06298136B1
公开(公告)日：2001-10-02
申请号：US08859591
申请日：1997-05-20
申请人： Huibert Den Boer
发明人： Huibert Den Boer
IPC分类号： H04L928
CPC分类号： H04L9/002 , H04L9/0625 , H04L2209/24
摘要： A method and apparatus for cryptographically converting a digital input data block into a digital output data block. The apparatus has an input for supplying the input data block and a further input for supplying a code conversion digital key K1. Cryptographic processing merges a selected part M1 of the digital input data block with the key K1 to produce a data block B1 which is non-linearly dependent on M1 and K1. The merging is performed in one sequentially inseparable step. The digital output block is derived from a selected part of the data block B1.
摘要翻译：一种用于将数字输入数据块密码转换为数字输出数据块的方法和装置。该装置具有用于提供输入数据块的输入和用于提供代码转换数字键K1的另一输入。加密处理将数字输入数据块的选定部分M1与键K1合并，以产生非线性依赖于M1和K1的数据块B1。合并在一个顺序不可分割的步骤中执行。数字输出块从数据块B1的选定部分导出。

9. 发明授权

US06795553B1 Method and apparatus for modular inversion for information security and recording medium with a program for implementing the method 有权
标题翻译：用于信息安全和记录介质的模块化反演的方法和装置，具有用于实现该方法的程序
公开(公告)号：US06795553B1
公开(公告)日：2004-09-21
申请号：US09185626
申请日：1998-11-04
申请人： Tetsutaro Kobayashi , Hikaru Morita
发明人： Tetsutaro Kobayashi , Hikaru Morita
IPC分类号： H04L928
CPC分类号： G06F7/728
摘要： Values X and N of n bits and a parameter t are input, then Y=X2−t mod N is calculated, then an extended binary GCD algorithm is executed for Y to obtain S=y−12k mod N and k, and R=S2−(k+t−2n) is calculated for S, thereby obtaining a Montgomery inverse R=X−I22n mod N of X on a residue class ring Z/NZ.
摘要翻译：输入n位和参数t的值X和N，然后计算Y = X2 <-t> mod N，然后对Y执行扩展二进制GCD算法以获得S = y <2> 对于S，对于S N和k，并且R = S2 < - （k + t-2n）>，从而获得残留类别Z上的X的蒙哥马利反R = X 1 -I 2 / NZ。

10. 发明授权

US06483918B2 Technique for producing a parameter, such as a checksum, through a primitive that uses elementary register operations 有权
标题翻译：通过使用基本寄存器操作的原语产生参数（如校验和）的技术
公开(公告)号：US06483918B2
公开(公告)日：2002-11-19
申请号：US09329138
申请日：1999-06-09
申请人： Ramarathnam Venkatesan , Mariusz Jakubowski
发明人： Ramarathnam Venkatesan , Mariusz Jakubowski
IPC分类号： H04L928
CPC分类号： H04L9/0643 , H04L2209/125 , H04L2209/38
摘要： A technique which implements a primitive for computing, e.g., a checksum. Specifically, this primitive replaces a mod(M) operation with a series of simple elementary register operations. These operations include mod 2n multiplications, order manipulations (e.g., byte or word swaps), and additions—all of which are extremely simple to implement and require very few processing cycles to execute. Hence, use of our inventive technique can significantly reduce the processing time to compute various cryptographic parameters, such as, e.g., a message authentication code (MAC), or to implement a stream cipher, over that conventionally required. This technique has both invertible and non-invertible variants.
摘要翻译：实现用于计算例如校验和的原语的技术。具体来说，该原语用一系列简单的基本寄存器操作替换了一个mod（M）操作。这些操作包括mod 2n乘法，顺序操纵（例如，字节或字交换）和添加 - 所有这些都非常容易实现，并且需要非常少的处理周期来执行。因此，使用本发明的技术可以显着减少计算各种加密参数（例如消息认证码（MAC））的处理时间，或者实现传统上所需要的流密码。这种技术具有可逆和非可逆变体。

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