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1. 发明授权

US08514997B2 Method and system for a receiver with undersampling mixing using multiple clock phases 有权
标题翻译：一种采用多个时钟相位采样混合的接收机的方法和系统
公开(公告)号：US08514997B2
公开(公告)日：2013-08-20
申请号：US11864743
申请日：2007-09-28
申请人： Ahmadreza Rofougaran , Maryam Rofougaran
发明人： Ahmadreza Rofougaran , Maryam Rofougaran
IPC分类号： H04L7/043
CPC分类号： H03D3/009
摘要： Methods and systems for a receiver with undersampling mixing using multiple clock phases are disclosed and may include undersampling a received wireless signal utilizing multiple undersamplers and clocking each of the undersamplers with a separate clock signal. Each of the clock signals may be at a sampling frequency but with a different phase angle. The difference of the phase angle between each of the clock signals may be adjusted and may be determined by the number of undersamplers. A gain ratio may be configured for two signals summed to generate each of the clock signals for the phase angle adjusting. The two signals may include in-phase and quadrature signals. Each of the summed signals may be normalized utilizing limiters. The sampling frequency may be an integer sub-harmonic of the received signal. The undersamplers may include track and hold or sample and hold circuits.
摘要翻译：公开了使用多个时钟相位的具有欠采样混合的接收机的方法和系统，并且可以包括利用多个欠采样器对接收到的无线信号进行欠采样，并用不同的时钟信号为每个欠采样器提供时钟。每个时钟信号可以是采样频率，但具有不同的相位角。可以调整每个时钟信号之间的相位角的差异，并且可以由欠采样器的数量确定。可以将两个信号相加的增益比配置为产生用于相位角调整的每个时钟信号。两个信号可以包括同相和正交信号。可以使用限制器对每个相加的信号进行归一化。采样频率可以是接收信号的整数次谐波。欠采样器可以包括轨道和保持或采样和保持电路。

2. 发明申请

WO2021191898A1 SYSTEM AND METHOD FOR SPARSE DATA SYNCHRONIZATION AND COMMUNICATION 审中-公开
公开(公告)号：WO2021191898A1
公开(公告)日：2021-09-30
申请号：PCT/IL2021/050322
申请日：2021-03-22
申请人： QUANT L R LTD.
发明人： LIVNEH, Nitzan , EISENBERG, Hagai Shmuel
IPC分类号： H04L9/08 , H04L7/00 , H04L7/04 , H04B10/70 , H04B10/69 , H04L7/0008 , H04L7/043 , H04L9/001 , H04L9/0852 , H04L9/12
摘要： Techniques, methods and system, for synchronization of sparse data signals are disclosed, comprising mixing a serial stream of sparse data signals with a serial stream of synchronization signals, to thereby add redundancy to the serial stream of sparse data signals and enable clock regeneration from a serial stream of mixed signals produced by said mixing, emulating the serial stream of synchronization signals by applying the clock regeneration to the serial stream of mixed signals, and generating a stream of parallel synchronization signals having a frequency of the serial stream of synchronization signals, deserializing the serial stream of mixed signals into a stream of parallel mixed signals having a data rate lower than a data rate of the serial signal streams, and demixing the stream of parallel synchronization signals with the stream of parallel mixed signals and thereby removing the redundancy introduced by the mixing into the sparse data signals and generating a parallel stream of demixed signals substantially synchronized with said synchronization signals.

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