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1. 发明授权

US06597735B1 Timer assembly for generating a PWM signal 失效
标题翻译：用于产生PWM信号的定时器组件
公开(公告)号：US06597735B1
公开(公告)日：2003-07-22
申请号：US09433057
申请日：1999-11-03
申请人： Yasushi Baba
发明人： Yasushi Baba
IPC分类号： H03K908
CPC分类号： G06F1/025
摘要： A small-scale timer assembly includes a PWM signal generator including a selector for selecting one of a plurality of clock sources, a timer for counting based on the selected clock source to deliver an overflow signal, a comparator for comparing the count in the timer against a setting to deliver a coincidence signal, and a signal processor for generating a PWM signal based on the overflow signal and the coincidence signal, and a count controller for counting the number of overflow signals to allow the selector to select another of the clock sources. The PWM signal is used for generating a sinusoidal signal.
摘要翻译：小规模定时器组件包括：PWM信号发生器，包括用于选择多个时钟源中的一个的选择器;基于所选择的时钟源进行计数以递送溢出信号的定时器;比较器，用于将定时器中的计数与用于提供符合信号的设置，以及用于基于溢出信号和一致信号产生PWM信号的信号处理器，以及用于对溢出信号的数量进行计数以允许选择器选择另一个时钟源的计数控制器。 PWM信号用于产生正弦信号。

2. 发明授权

US06573759B2 Apparatus and method for extracting data values from a signal encoded with AES3 data 失效
公开(公告)号：US06573759B2
公开(公告)日：2003-06-03
申请号：US09766014
申请日：2001-01-18
申请人： Kevin J. Shuholm
发明人： Kevin J. Shuholm
IPC分类号： H03K908
CPC分类号： H04L25/4906
摘要： Apparatus for determining nominal pulse duration values in a signal encoded with an AES3 data stream includes a first circuit for measuring duration of each pulse of the signal and providing a sequence of duration values. A second circuit detects a maximum duration value, corresponding to duration of three bit cells, and provides first and second duration values corresponding to one bit cell and two bit cells respectively.

3. 发明授权

US06594308B1 Conversion of a numeric command value in a constant frequency PWM drive signal for an electromagnetic load 失效
标题翻译：在电磁负载的恒定频率PWM驱动信号中转换数字指令值
公开(公告)号：US06594308B1
公开(公告)日：2003-07-15
申请号：US09451459
申请日：1999-11-30
申请人： Ezio Galbiati , Lorenzo Papillo , Francesco Chrappan Soldavini
发明人： Ezio Galbiati , Lorenzo Papillo , Francesco Chrappan Soldavini
IPC分类号： H03K908
CPC分类号： G06F1/025 , H02M7/53873
摘要： A method is provided for driving a load in a pulse width modulation (PWM) mode as a function of numeric command values having a predetermined number of N-bits. The method includes the step of incrementing by more than a unit the number of bits on which a selected command value is mapped, wherein a unit equals N-bits plus a plurality of additional bits. The N most significant bits of the selected command value are converted. The plurality of additional bits are decoded by generating a corresponding plurality of intermediate levels of variation in the duty cycle. Each intermediate level has a duration of half a clock period and produces a plurality of signals out of phase among each other by half a clock period. A driving PWM signal is generated by multiplexing the signals out of phase among each other by half a clock period, and carrying out logic combinations of these signals as a function of a most significant bit of the selected command value and as a function of the plurality of additional bits.
摘要翻译：提供了一种用于以脉冲宽度调制（PWM）模式驱动负载作为具有预定数量N位的数字命令值的函数的方法。该方法包括以多个单位递增所选择的命令值所映射的比特数的步骤，其中单元等于N比特加上多个附加比特。所选命令值的N个最高有效位被转换。通过在占空比中产生对应的多个中间级别的变化来解码多个附加位。每个中间电平具有半个时钟周期的持续时间，并且在半个时钟周期之间产生多个相位异相的信号。驱动PWM信号通过将信号相互相差半个时钟周期进行复用而产生，并且执行这些信号的逻辑组合作为所选命令值的最高有效位的函数，并且作为多个的额外位。

4. 发明授权

US06529046B1 Minimum pulse width detection and regeneration circuit 有权
标题翻译：最小脉冲宽度检测和再生电路
公开(公告)号：US06529046B1
公开(公告)日：2003-03-04
申请号：US10020755
申请日：2001-12-12
申请人： Jeng-Tzong Shih
发明人： Jeng-Tzong Shih
IPC分类号： H03K908
CPC分类号： H03K5/06 , H03K5/1252
摘要： A minimum pulse width detection and regeneration circuit is achieved. The circuit includes, first, a pulse width detector capable of detecting if an input signal pulse is within a range between a minimum width and a maximum width. Second, a pulse width extender is capable of extending the input signal pulse width to the maximum width if the input signal pulse is in the range. Finally, a glitch filter is capable of filtering out the input signal pulse if the input signal pulse is less than the minimum width.
摘要翻译：实现最小脉冲宽度检测和再生电路。该电路首先包括能够检测输入信号脉冲是否在最小宽度和最大宽度之间的范围内的脉冲宽度检测器。第二，如果输入信号脉冲在该范围内，则脉宽扩展器能将输入信号脉冲宽度扩展到最大宽度。最后，如果输入信号脉冲小于最小宽度，则毛刺滤波器能够滤除输入信号脉冲。

5. 发明授权

US06526094B1 PWM Circuit 失效
标题翻译： PWM电路
公开(公告)号：US06526094B1
公开(公告)日：2003-02-25
申请号：US09201969
申请日：1998-12-01
申请人： Masataka Watanabe
发明人： Masataka Watanabe
IPC分类号： H03K908
CPC分类号： H03K7/08
摘要： A PWM (Pulse Width Modulation) circuit of the present invention includes a reference pulse sequence generating section for outputting a reference pulse sequence, an up-down counter, a trigger signal generating section for generating from an input signal a trigger signal for the up-down counter having a period which is a natural number multiple of one cycle the period of PWM, and a comparator for comparing the output of the up-down counter and the reference pulse sequence.
摘要翻译：本发明的PWM（脉宽调制）电路包括用于输出参考脉冲序列的参考脉冲序列产生部分，升降计数器，触发信号产生部分，用于从输入信号产生用于上行计数器的触发信号，递减计数器具有PWM周期的一个周期的自然数倍的周期，以及用于比较升降计数器的输出和参考脉冲序列的比较器。

6. 发明授权

US06833736B2 Pulse generating circuit 有权
公开(公告)号：US06833736B2
公开(公告)日：2004-12-21
申请号：US10359805
申请日：2003-02-07
申请人： Takaaki Nakazato , Toru Asano , Osamu Takahashi , Sang Dhong , Atsushi Kawasumi
发明人： Takaaki Nakazato , Toru Asano , Osamu Takahashi , Sang Dhong , Atsushi Kawasumi
IPC分类号： H03K908
CPC分类号： H03K5/1565 , H03K5/05 , H03K5/06
摘要： A pulse generator circuit includes a first logic means, a second logic means, a first delay means, and a second delay means. The first logic means is for receiving an input clock signal. The first delay means is for delaying the input clock signal by a first delay time. The second logic means is for receiving a signal output from the first logic means. The second delay means is for delaying the signal output from the first logic means by a second delay time.

7. 发明授权

US06473457B1 Method and apparatus for producing a pulse width modulated signal 失效
标题翻译：用于产生脉宽调制信号的方法和装置
公开(公告)号：US06473457B1
公开(公告)日：2002-10-29
申请号：US09307453
申请日：1999-05-07
申请人： Cesar Pascual , William J. Roeckner
发明人： Cesar Pascual , William J. Roeckner
IPC分类号： H03K908
CPC分类号： G11B20/10527 , H03M5/08
摘要： A method and apparatus to produce a pulse width modulated (PWM) signal from pulse code modulated (PCM) data. In one embodiment, a crossing point of an analog signal with the ramp portion of a sawtooth waveform is approximated by first extrapolating, or projecting, a line between two adjacent sample points across other sample points to produce an estimate of the crossing point. A magnitude difference between a crossing point of the extrapolated line and a sample point magnitude on each side of the crossing point is determined. The magnitude difference, multiplied by an empirically determined constant, is added to the estimate. A PWM signal is then produced using the estimate for the crossing point.
摘要翻译：一种从脉冲编码调制（PCM）数据产生脉宽调制（PWM）信号的方法和装置。在一个实施例中，模拟信号与锯齿形波形的斜坡部分的交叉点通过首先外推或投影跨越其它采样点的两个相邻采样点之间的线来近似来产生交叉点的估计。确定外插线的交叉点与交叉点两侧的采样点幅度之间的幅度差。将幅度差乘以经验确定的常数加到估计值中。然后使用对于交叉点的估计来产生PWM信号。

8. 发明授权

US06310912B1 System for increasing the definition in converting a digital datum in a PWM signal for driving a full-bridge output stage 失效
标题翻译：用于增加在PWM信号中转换数字数据以驱动全桥输出级的定义的系统
公开(公告)号：US06310912B1
公开(公告)日：2001-10-30
申请号：US09112999
申请日：1998-07-10
申请人： Giuseppe Maiocchi , Ezio Galbiati
发明人： Giuseppe Maiocchi , Ezio Galbiati
IPC分类号： H03K908
CPC分类号： H03M1/825 , H02M7/53873
摘要： The definition of conversion of a digital value in a PWM signal using an N-bit up/down counter is improved by increasing the dimension of the input data to N+2 bits. This is done using the two Lsb's of the N+2 input data for selecting one among three intermediate levels between two consecutive values of an N-bit dynamic, according to a predefined table of combinations. The converter may still use an N-bit comparator. The system is particularly useful in driving a multi-phase brushless DC motor with each phase-winding singularly driven through a full-bridge output stage.
摘要翻译：通过将输入数据的尺寸增加到N + 2位，可以提高使用N位向上/向下计数器在PWM信号中转换数字值的定义。这是通过使用N + 2个输入数据的两个Lsb进行的，用于根据预定义的组合表来选择N位动态的两个连续值之间的三个中间级之一。转换器仍然可以使用N位比较器。该系统在驱动具有通过全桥输出级单相驱动的每个相绕组的多相无刷直流电动机时特别有用。

9. 发明授权

US06665339B1 Method and apparatus for reducing oscillator pull in a CMOS wireless transceiver integrated circuit 失效
标题翻译：用于减少CMOS无线收发器集成电路中的振荡器拉动的方法和装置
公开(公告)号：US06665339B1
公开(公告)日：2003-12-16
申请号：US09877398
申请日：2001-06-08
申请人： Andrew Adams , Neil Weste
发明人： Andrew Adams , Neil Weste
IPC分类号： H03K908
CPC分类号： H03F1/0261 , H03F2200/294 , H03F2200/372 , H03J2200/10 , H03L7/07
摘要： A monolithic transceiver integrated circuit that includes a substrate, a transmitter subsystem of one or more subcircuits on the substrate, and a receiver subsystem of one or more, subcircuits on the substrate. Also included is a bias current supply coupled to the receiver and transmitter subsystems to provide bias current. The bias current supply includes a first bias circuit on the substrate coupled to, and to supply bias current to, a first subcircuit of the transmitter subsystem. The first bias circuit includes a first current modulator having a first switch input to indicate that the bias current is to start or stop being supplied to the first subcircuit. The first current modulator is to control the rate of change of supplied bias current in response to the first switch input. The first subcircuit may be a power amplifier. The control of the rate of change reduces oscillator pull in at least one oscillator included in the integrated circuit.
摘要翻译：一种单片收发器集成电路，包括衬底，衬底上的一个或多个子电路的发射器子系统，以及衬底上的一个或多个子电路的接收器子系统。还包括耦合到接收器和发射机子系统以提供偏置电流的偏置电流源。偏置电流源包括耦合到发射机子系统的第一子电路并且向偏置电流提供偏置电流的衬底上的第一偏置电路。第一偏置电路包括具有第一开关输入的第一电流调制器，以指示偏置电流要被开始或停止提供给第一子电路。第一电流调制器是响应于第一开关输入来控制所提供的偏置电流的变化率。第一个子电路可以是功率放大器。变化率的控制降低了集成电路中至少包含一个振荡器的振荡器拉动。

10. 发明授权

US06590440B1 Low-side bidirectional battery disconnect switch 失效
标题翻译：低端双向电池断开开关
公开(公告)号：US06590440B1
公开(公告)日：2003-07-08
申请号：US08800972
申请日：1997-02-19
申请人： Richard K. Williams , Robert G. Blattner
发明人： Richard K. Williams , Robert G. Blattner
IPC分类号： H03K908
CPC分类号： H02J7/0031 , H03K2217/0018
摘要： A bidirectional battery disconnect switch, i.e., a switch which is capable of blocking a voltage in either direction when open and conducting a current in either direction when closed, is disclosed. The switch includes a four-terminal MOSFET having no source/body short and circuitry for assuring that the body is shorted to whichever of the source/drain terminals of the MOSFET is biased at a lower voltage.
摘要翻译：公开了一种双向电池断开开关，即当闭合时在任何方向上打开和传导电流时能阻断任一方向的电压的开关。该开关包括不具有源极/体短路的四端子MOSFET，并且用于确保主体短路到MOSFET的源极/漏极端子中的任何一个被偏置在较低电压的电路。

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