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1. 发明授权

US06407628B2 Potential change suppressing circuit 有权
标题翻译：电位变化抑制电路
公开(公告)号：US06407628B2
公开(公告)日：2002-06-18
申请号：US09725726
申请日：2000-11-30
申请人： Kenichi Imamiya
发明人： Kenichi Imamiya
IPC分类号： H03K1710
CPC分类号： G11C5/145 , G11C16/08
摘要： To a first node at a boosted potential, a control circuit is connected for controlling a potential of the first node so that the potential of the first node does not exceed a predetermined potential, wherein the control circuit has a capacitor connected between the first node and a second node, a first switching transistor having a source-drain current path inserted between the second node and the ground node and a gate to which a control signal is input, and a second switching transistor having a source-drain current path inserted between the first node and the ground node, and a gate connected to the second node.
摘要翻译：对于处于升压电位的第一节点，连接控制电路以控制第一节点的电位，使得第一节点的电位不超过预定电位，其中控制电路具有连接在第一节点和第二节点，具有插入在第二节点和接地节点之间的源极 - 漏极电流路径的第一开关晶体管和输入控制信号的栅极;以及第二开关晶体管，其源极 - 漏极电流路径插入在第二节点第一节点和接地节点，以及连接到第二节点的门。

2. 发明授权

US06304105B1 Level shifter circuit 失效
标题翻译：电平移位电路
公开(公告)号：US06304105B1
公开(公告)日：2001-10-16
申请号：US09563228
申请日：2000-05-02
申请人： Yoshinori Fujiyoshi
发明人： Yoshinori Fujiyoshi
IPC分类号： H03K1710
CPC分类号： H03K19/018521
摘要： The level shifter circuit includes a low-voltage operating inverter INV4, a high-voltage operating inverter INV5, NMOS transistors NT5 and NT6 and a PMOS transistor PT3. The output from low-voltage operating inverter INV4, the source of NMOS transistor NT6 and the gate of PMOS transistor PT3 are joined. The input to high-voltage operating inverter INV5, the drain of NMOS transistor NT6 and the source of NMOS transistor PT5 and that of PMOS transistor PT3 are joined. The drain of NMOS transistor NT5 and the gates of NMOS transistors NT5 and NT6 are connected to the power feed line of a high-voltage power source. The input to low-voltage operating inverter INV4 forms an input signal terminal Vin2 while the output from high-voltage operating inverter INV5 forms an output signal terminal Vout2.
摘要翻译：电平移位器电路包括低电压工作反相器INV4，高电压工作反相器INV5，NMOS晶体管NT5和NT6以及PMOS晶体管PT3。来自低电压工作逆变器INV4，NMOS晶体管NT6的源极和PMOS晶体管PT3的栅极的输出被连接。高电压工作逆变器INV5的输入，NMOS晶体管NT6的漏极和NMOS晶体管PT5的源极和PMOS晶体管PT3的输入相连接。 NMOS晶体管NT5的漏极和NMOS晶体管NT5和NT6的栅极连接到高压电源的馈电线。低电压工作逆变器INV4的输入形成输入信号端子Vin2，而高电压工作逆变器INV5的输出形成输出信号端子Vout2。

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