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1. 发明申请

US20040164841A1 Chip resistor 有权
标题翻译：贴片电阻
公开(公告)号：US20040164841A1
公开(公告)日：2004-08-26
申请号：US10786386
申请日：2004-02-23
申请人： ROHM CO., LTD.
发明人： Daisuke Saito , Takahiro Kuriyama , Masato Doi
IPC分类号： H01C001/012
CPC分类号： H01C17/006 , H01C1/142 , H01C7/003 , H01C17/281
摘要： A chip resistor includes an insulating chip substrate, a resistor film formed on the substrate, a pair of upper electrodes formed from silver paste to be connected to the resistor film, a cover coat covering the resistor film, an auxiliary electrode formed on each of the upper electrodes to partially overlap the cover coat, a side electrode formed on each of the side surfaces of the substrate to be connected to the upper electrode and the auxiliary electrode, a nickel-plated layer covering the auxiliary electrode and the side electrode, and a soldering layer covering the nickel-plated layer. The side electrode is made from nonmagnetic conductive resin paste, whereas the auxiliary upper electrode is made from carbon-based conductive resin paste.
摘要翻译：芯片电阻器包括绝缘芯片基板，形成在基板上的电阻膜，由银膏形成的一对上电极连接到电阻膜，覆盖电阻膜的覆盖层，形成在每一个上的辅助电极上电极部分地覆盖覆盖层，形成在要连接到上电极和辅助电极的基板的每个侧表面上的侧电极，覆盖辅助电极和侧电极的镀镍层，以及覆盖镀镍层的焊接层。侧电极由非磁性导电树脂膏制成，而辅助上电极由碳基导电树脂膏制成。

2. 发明申请

US20040160303A1 Chip resistor 有权
标题翻译：贴片电阻
公开(公告)号：US20040160303A1
公开(公告)日：2004-08-19
申请号：US10776846
申请日：2004-02-11
申请人： ROHM CO., LTD.
发明人： Takahiro Kuriyama
IPC分类号： H01C001/012
CPC分类号： H01C7/003 , H01C1/142 , H01C17/006 , H01C17/281
摘要： A chip resistor including an elongated chip substrate, a resistive layer formed on the substrate, a silver-containing upper electrode connected to the resistive layer, an undercoat enclosing the resistive layer and extending onto part of the upper electrode, an auxiliary electrode connected to the upper electrode and extending onto part of the undercoat, and overcoat enclosing the undercoat and extending onto part of the auxiliary electrode. In the longitudinal direction of the substrate The undercoat extends longitudinally of the substrate beyond the overcoat, so that the extremity of the undercoat is offset from the extremity of the overcoat by an appropriate distance.
摘要翻译：一种芯片电阻器，包括细长的芯片衬底，形成在衬底上的电阻层，连接到电阻层的含银上电极，包围电阻层并延伸到上电极的一部分的底漆，连接到上部电极并延伸到底涂层的一部分上，外涂层封装底涂层并延伸到辅助电极的一部分上。在基底的纵向方向上，底涂层从基底的纵向延伸超过外涂层，使得底涂层的末端从外涂层的末端偏移适当的距离。

3. 发明申请

US20040130435A1 Ball grid array resistor network having a ground plane 失效
标题翻译：具有地平面的球栅阵列电阻网络
公开(公告)号：US20040130435A1
公开(公告)日：2004-07-08
申请号：US10337633
申请日：2003-01-07
发明人： David A. Christian , Cynthia A. Christian , Richard Cooper , Yinggang Tu
IPC分类号： H01C001/012
CPC分类号： H01C1/144 , H01C1/16 , H01L23/49816 , H01L2924/0002 , H05K1/167 , H05K3/3436 , H01L2924/00
摘要： A ball grid array resistor network that has a ground plane to reduce noise and improve signal integrity. The ball grid array resistor network includes a substrate having a first and a second surface and vias that extending through the substrate between the first and second surfaces. Resistors are located on the first surface between the vias. Conductors are located over the vias and are electrically connected to ends of the resistors. A cover coat covers the conductors and resistors. A ground plane is located on the second surface. An insulating layer is located over the ground plane. Ball pads are located over the vias. The ball pads are electrically connected to the vias. Solder spheres are attached to the ball pads.
摘要翻译：具有接地平面的球栅阵列电阻网络，以减少噪声并提高信号完整性。球栅阵列电阻网络包括具有第一和第二表面的衬底和在第一和第二表面之间延伸通过衬底的通孔。电阻器位于通孔之间的第一表面上。导体位于通孔的上方，并且电连接到电阻器的端部。覆盖层覆盖导线和电阻。地平面位于第二表面。绝缘层位于地平面上方。球垫位于通孔的上方。球垫电连接到通孔。焊球附着在球垫上。

4. 发明申请

US20040027232A1 Method for changing an electrical resistance of a resistor 失效
标题翻译：改变电阻器电阻的方法
公开(公告)号：US20040027232A1
公开(公告)日：2004-02-12
申请号：US10636110
申请日：2003-08-07
发明人： Arne W. Ballantine , Cyril Cabral JR. , Daniel C. Edelstein , Anthony K. Stamper
IPC分类号： H01C001/012 , H01C010/00
CPC分类号： H01L28/20 , H01C7/006 , H01C17/242 , Y10T29/49082 , Y10T29/49099 , Y10T29/49105
摘要： A method and structure for changing an electrical resistance of a resistor. Initially, the resistor is provided, wherein the resistor has a length L and an electrical resistance R1. A portion of the resistor is exposed to a laser radiation, wherein the portion includes a fraction F of the length L of the resistor. Both Fnull1 and F R1 or R2
摘要翻译：用于改变电阻器的电阻的方法和结构。首先，提供电阻器，其中电阻器具有长度L和电阻R1。电阻器的一部分暴露于激光辐射，其中该部分包括电阻器长度L的分数F. F = 1和F <1都在本发明的范围内。在电阻器暴露于激光辐射之后，电阻器具有电阻R2，其中R2不等于R1。电阻从R1到R2的变化是由于激光辐射对电阻器的加热，这导致电阻器内的化学或结构变化。 R2> R1或R2

5. 发明申请

US20030231099A1 Resistor structure 失效
标题翻译：电阻结构
公开(公告)号：US20030231099A1
公开(公告)日：2003-12-18
申请号：US10340992
申请日：2003-01-13
申请人： Shipley company, L.L.C.
发明人： John Schemenaur , Rajan Hariharan , Marc Langlois , Craig S. Allen
IPC分类号： H01C001/012
CPC分类号： H05K1/167 , H01C7/006 , H01C17/075 , H05K3/382 , H05K2201/0355 , H05K2203/0307 , H05K2203/0338 , H05K2203/0361 , H05K2203/0723 , Y10T428/12431 , Y10T428/12438
摘要： Disclosed is a resistor structure for embedding in a dielectric material including a thin film resistive material disposed on a surface of a conductive layer wherein the surface has an isotropic surface roughness having a Rz (din) value of 3 to 10 nullm and a peak-to-peak wavelength of 2 to 20 nullm.
摘要翻译：公开了一种用于嵌入电介质材料的电阻器结构，该电介质材料包括布置在导电层表面上的薄膜电阻材料，其中该表面具有Rz（din）值为3-10μm的各向同性表面粗糙度，并且峰 - 峰值波长为2〜20um。

6. 发明申请

US20030217458A1 Surface-mount positive temperature coefficient thermistor and manufacturing method therefor 有权
标题翻译：表面贴装正温度系数热敏电阻及其制造方法
公开(公告)号：US20030217458A1
公开(公告)日：2003-11-27
申请号：US10395143
申请日：2003-03-25
发明人： Takeo Haga , Hiroki Tanaka , Toshiharu Hirota , Hiroshi Kuwahara
IPC分类号： H01C001/012 , H01C017/00 , H01C007/04
CPC分类号： H01C17/28 , H01C1/012 , H01C1/014 , H01C1/022 , H01C1/14 , H01C1/1406 , Y10T29/49082 , Y10T29/49085 , Y10T29/49098 , Y10T29/49101 , Y10T29/49139
摘要： A surface-mount positive temperature coefficient thermistor includes a disk-shaped positive temperature coefficient thermistor element having electrodes provided on opposing main surfaces thereof, an insulating case having an inner space with the thermistor element inserted therein, and a pair of metal terminals arranged to make electrical contact with the respective main surface electrodes of the thermistor element, and to sandwich therebetween the thermistor element. The insulating case includes a pair of main surfaces that are substantially parallel to the main surfaces of the thermistor element, a pair of opening side surfaces each having an opening, and a pair of end surfaces each having a terminal insertion hole provided therein. One end of each of the pair of metal terminals is inserted from the respective terminal insertion holes into the inner space, and the metal terminals press-hold the thermistor element so as to sandwich the thermistor element therebetween.
摘要翻译：表面安装正温度系数热敏电阻包括具有设置在其相对主表面上的电极的盘形正温度系数热敏电阻元件，具有插入其中的热敏电阻元件的内部空间的绝缘壳体，以及一对金属端子，与热敏电阻元件的各个主表面电极电接触并夹在其间的热敏电阻元件。绝缘壳体包括大致平行于热敏电阻元件的主表面的一对主表面，一对开口侧表面，每个开口侧表面均具有开口，一对端面各自具有设置在其中的端子插入孔。一对金属端子的一端从各个端子插入孔插入内部空间，并且金属端子压入热敏电阻元件以将热敏电阻元件夹在其间。

7. 发明申请

US20030172522A1 Chip resistor and method of making the same 有权
标题翻译：芯片电阻及其制作方法
公开(公告)号：US20030172522A1
公开(公告)日：2003-09-18
申请号：US10346911
申请日：2003-01-15
申请人： ROHM CO., LTD.
发明人： Masanori Tanimura
IPC分类号： H01C001/012 , H01C017/28
CPC分类号： H01C17/281 , H01C7/003 , H01C17/006 , Y10T29/49052 , Y10T29/49082 , Y10T29/49099 , Y10T29/49101 , Y10T29/49128 , Y10T29/4913 , Y10T29/49135
摘要： The invention relates to a method of making a chip resistor using a material substrate for which are set a plurality of first cutting lines extending in a first direction and a plurality of second cutting lines extending in a second direction perpendicular to the first direction. The method includes an upper electrode forming step A for forming a thick upper conductor layer on the upper surface of the substrate by printing and baking a metal organic paste, a lower electrode forming step B for forming a thick lower conductor layer on the lower surface of the substrate by printing and baking metal organic paste, and a resistor element forming step C for forming a thin resistor layer by depositing a resistor material on the upper surface of the substrate. Preferably, the upper and the lower surfaces of the material substrate are flat.
摘要翻译：本发明涉及一种使用材料基板制造芯片电阻器的方法，所述材料基板设置有沿第一方向延伸的多条第一切割线和沿与第一方向垂直的第二方向延伸的多条第二切割线。该方法包括：上电极形成步骤A，用于通过印刷和烘烤金属有机浆料在基板的上表面上形成厚的上导体层;下电极形成步骤B，用于在下表面上形成较厚的下导体层通过印刷和烘烤金属有机浆料的衬底，以及用于通过在衬底的上表面上沉积电阻材料形成薄电阻层的电阻器元件形成步骤C. 优选地，材料基板的上表面和下表面是平坦的。

8. 发明申请

US20030117258A1 Thin film chip resistor and method for fabricating the same 审中-公开
标题翻译：薄膜片式电阻及其制造方法
公开(公告)号：US20030117258A1
公开(公告)日：2003-06-26
申请号：US10211271
申请日：2002-08-05
申请人： Samsung Electro-mechanics Co., Ltd.
发明人： Young Min Kim , Young Chul Shin , Hae Youn Hwang
IPC分类号： H01C001/012
CPC分类号： H01C17/288 , H01C1/142
摘要： Disclosed is a thin film chip resistor having a structure suitable for effectively utilizing a slit substrate and simplifying a thin film forming step, in which thick film electrodes are formed on upper and lower surfaces of an insulator substrate, the thin film resistive layer is formed between thick film electrodes, and thin film electrodes connected to the thin film resistive layer are formed on both side portions of the upper surface of the insulator substrate. Furthermore, provided is a method for fabricating the thin film chip resistor, which can omit the step of forming thin film on a lower surface of the insulator substrate and minimize a defective proportion, which may occur during parting the insulator substrate along slits, by securing a space sufficient for contacting to probes with electrodes in a laser trimming step.
摘要翻译：公开了一种薄膜片式电阻器，其具有适于有效利用狭缝基板的结构，并简化薄膜形成步骤，其中在绝缘体基板的上表面和下表面上形成厚膜电极，薄膜电阻层形成在连接到薄膜电阻层的薄膜电极和薄膜电极形成在绝缘体基板的上表面的两侧部分上。此外，提供了一种制造薄膜片式电阻器的方法，其可以省略在绝缘体基板的下表面上形成薄膜的步骤，并且通过确保在绝缘体基板沿狭缝分开时可能发生的缺陷比例最小化在激光修整步骤中足以与电极接触的空间。

9. 发明申请

US20020130762A1 Power chip resistor 失效
标题翻译：电源片式电阻
公开(公告)号：US20020130762A1
公开(公告)日：2002-09-19
申请号：US09811844
申请日：2001-03-19
发明人： Louis Peter Huber , Ziv Shoshani
IPC分类号： H01C001/012
CPC分类号： H01C7/003 , H01C1/01 , H01C3/12 , H01C7/18 , Y10S438/977 , Y10T29/49082 , Y10T29/49083 , Y10T29/49098 , Y10T29/49099 , Y10T29/49101
摘要： A method and apparatus for a stacked power chip resistor is disclosed. The invention provides for multiple power chip resistors to be stacked, providing for encapsulant such as glass to separate each power chip resistor and a metal barrier such as nickel plating on each end of the stacked power chip resistor to provide for electrical and mechanical connection of each power chip resistor in the stack.
摘要翻译：公开了一种叠层电源片式电阻器的方法和装置。本发明提供了要堆叠的多个功率芯片电阻器，提供诸如玻璃的密封剂以分离每个功率芯片电阻器和在堆叠的功率芯片电阻器的每个端部上分离诸如镀镍的金属屏障，以提供每一个的电气和机械连接堆叠中的电源芯片电阻。

10. 发明申请

US20020097139A1 Method of making an air bag 失效
标题翻译：制作安全气囊的方法
公开(公告)号：US20020097139A1
公开(公告)日：2002-07-25
申请号：US10079176
申请日：2002-02-20
发明人： George V. Gerber , Anthony E. Troianello , Haim Goldberger
IPC分类号： H01C001/012
CPC分类号： F42B3/198 , F42B3/124 , Y10T29/49082 , Y10T29/49083 , Y10T29/49098 , Y10T29/49099
摘要： A fast heat rise resistor comprising a substrate, a foil bridge on the surface of the substrate, the foil bridge having an elevated portion and a contact portion, the elevated portion above the substrate, the contact portion in contact with the substrate, a conductive layer attached to the contact portion of said foil bridge. The activation energy and/or response time is reduced as the foil bridge is suspended over the substrate. Another aspect of the invention include a method of manufacturing the foil bridge and application to autoignition vehicle airbags.
摘要翻译：一种快速加热电阻器，包括衬底，在衬底表面上的箔桥，箔桥具有升高部分和接触部分，衬底上方的升高部分，与衬底接触的接触部分，导电层附接到所述箔桥的接触部分。当箔桥悬挂在衬底上时，激活能和/或响应时间减小。本发明的另一方面包括制造箔桥的方法和应用于自动对准车辆安全气囊。

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