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    • 3. 发明授权
    • Recording apparatus, reproducing apparatus, and recording and/or reproducing apparatus
    • 记录装置,再现装置以及记录和/或再现装置
    • US06925341B1
    • 2005-08-02
    • US09670871
    • 2000-09-27
    • Eiichi Yamada
    • Eiichi Yamada
    • G11B20/10G11C7/16G06E17/00
    • G11B20/10527G11B2020/10546G11B2220/60G11C7/16G11C2207/16
    • An apparatus having a microphone, an analog to digital converting circuit, a semiconductor memory an, input device, and a controller, wherein the analog to digital converting circuit converts an output signal from the microphone into a digital signal. The semiconductor memory stores the output signal from the analog to digital converting circuit, and the input device carries out input of a record start and a record end. The controller, according to the input from the input device, carries out control to start and stop writing into the semiconductor memory a digital signal from the analog to digital converting circuit. When the input device is operated and a predetermined time interval has passed, the controller starts writing the digital signal from the analog/digital conversion circuit into the semiconductor memory.
    • 具有麦克风,模数转换电路,半导体存储器a,输入装置和控制器的装置,其中模数转换电路将来自麦克风的输出信号转换为数字信号。 半导体存储器存储来自模数转换电路的输出信号,并且输入装置执行记录开始和记录结束的输入。 根据输入装置的输入,控制器执行控制以开始和停止向半导体存储器写入来自模数转换电路的数字信号。 当输入装置被操作并经过预定的时间间隔时,控制器开始将数字信号从模拟/数字转换电路写入半导体存储器。
    • 4. 发明申请
    • DEVICE AND METHOD FOR SIGNAL PROCESSING
    • 用于信号处理的装置和方法
    • WO2005011181A3
    • 2005-05-06
    • PCT/US2004023109
    • 2004-07-16
    • ESS TECHNOLOGY INCMALLINSON MARTIN
    • MALLINSON MARTIN
    • H03F3/217H03F3/387G06E17/00
    • H03F3/387H03F3/2175H03F2200/331H03F2200/351
    • The present invention relates to a signal processor and methods of using a signal processor. In one aspect, the present invention relates to a signal processor that includes a pulse width modulator having a clock rate, and also includes a digital filter configured to receive an output of the pulse width modulator, wherein the digital filter samples the output at the clock rate to suppress the distortion. In another aspect, the present invention relates to a method including modulating a first pulse code modulated signal having a first resolution into a second pulse code modulated signal having a second resolution that is smaller than the first resolution. This aspect further includes modulating the second pulse code modulated signal into a third signal that includes a plurality of pulses in time having a clock rate, and filtering in a digital domain the plurality of pulses in time to suppress a distortion in the third signal.
    • 信号处理器以及使用信号处理器的方法 在一个方面中,本发明涉及一种信号处理器,其包括具有时钟速率的脉宽调制器,并且还包括被配置为接收脉宽调制器的输出的数字滤波器,其中数字滤波器在时钟处对输出进行采样 率来抑制失真。 另一方面,本发明涉及一种方法,包括将具有第一分辨率的第一脉冲编码调制信号调制成具有小于第一分辨率的第二分辨率的第二脉冲编码调制信号。 该方面还包括将第二脉冲编码调制信号调制为包括具有时钟速率的多个时间脉冲的第三信号,并且在数字域中及时地过滤多个脉冲以抑制第三信号中的失真。