会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明授权
    • Waveform measuring apparatus and waveform obtaining method
    • 波形测量仪和波形获取方法
    • US06265860B1
    • 2001-07-24
    • US09571065
    • 2000-05-15
    • Hiroshi EguchiKazuo SakamotoEiichi Yada
    • Hiroshi EguchiKazuo SakamotoEiichi Yada
    • G01R2200
    • G01R13/0272
    • Disclosed is a waveform measuring apparatus in which an integration period T can be discretionally set to a value in accordance with the analog voltage cycle of the device being measured with a simple circuit configuration. The waveform measuring apparatus has two integrator circuits for integrating a repeat-cycle analog input with a fixed period. A control portion, consisting of a gate controller and a phase shifter, enables first and second integrators alternatively, such that only one integrator is active at any point in time. The integrals from both integrators are then combined to obtain the integral of the analog input voltage.
    • 公开了一种波形测量装置,其中积分周期T可以根据用简单的电路配置测量的装置的模拟电压周期被任意设定为一个值。 波形测量装置具有两个积分器电路,用于对具有固定周期的重复循环模拟输入进行积分。 由门控制器和移相器组成的控制部分交替地使得第一和第二积分器能够在任何时间点只有一个积分器是有效的。 然后组合来自两个积分器的积分以获得模拟输入电压的积分。
    • 2. 发明授权
    • Photometric apparatus and photometric method
    • 光度仪和光度法
    • US06664777B2
    • 2003-12-16
    • US09961827
    • 2001-09-24
    • Kenji HyakutakeHiroyuki SaitoKazuyuki Akiyama
    • Kenji HyakutakeHiroyuki SaitoKazuyuki Akiyama
    • G01R2200
    • G01J1/46
    • Photometric apparatus and photometric method measure a wide range of incident light amounts accurately and efficiently. The photometric apparatus includes an optical sensor for delivering a photocurrent; an integrator capacitor for integrating the photocurrent to provide an integrated voltage; a voltage measurer measuring the integrated voltage; an integration time measure for measuring an integration time which the integrator capacitor integrates the photocurrent; for resetting the integrator capacitor whenever the voltage across the integrator capacitor exceeds a given voltage value; a summer summing a total voltage value integrated by the integrator capacitor during the given time including at least one reset; and a photometric calculator for calculating a photometric value based on the total voltage value and on the integration time.
    • 光度测量仪和光度测量方法可以准确有效地测量各种入射光量。 测光装置包括用于传送光电流的光学传感器; 用于积分光电流以提供集成电压的积分电容器; 测量积分电压的电压测量器; 用于测量积分电容器积分光电流的积分时间的积分时间测量; 用于在积分器电容器两端的电压超过给定电压值时复位积分电容器; 夏季对包括至少一个复位在内的给定时间期间由积分电容器积分的总电压值求和; 以及用于基于总电压值和积分时间计算光度值的光度计算器。
    • 4. 发明授权
    • System for difference calculation using a quad slope converter
    • 使用四边形转换器进行差分计算的系统
    • US06717393B2
    • 2004-04-06
    • US10120936
    • 2002-04-11
    • Barry Jon Male
    • Barry Jon Male
    • G01R2200
    • G01L1/2268G01K7/14G01K7/21G01L1/2256H03M1/1023H03M1/52
    • A system for measuring signals in a non-linear network is provided which reduces the reliance on hardware and processing support when correcting for A/D offset by performing a pair of dual slope measurement cycles with an integrating analog to digital converter (ADC) circuit. Each of the measurement cycles has at least four phases including a first integrating phase and a first de-integrating phase followed by a second integrating phase and a second de-integrating phase. The system further includes an ADC controller operatively communicative with the integrating ADC circuit for detecting when the first count value is reached during the second de-integrating phase and then resetting the second count value in response to this detection so that the second count value is offset corrected at the end of the second de-integration phase. As a result, a difference calculation is automatically performed during the measurement cycle.
    • 提供了一种用于在非线性网络中测量信号的系统,通过使用积分模数转换器(ADC)电路执行一对双斜率测量周期来减少对校正A / D偏移的硬件和处理支持的依赖性。 每个测量周期具有至少四个相位,包括第一积分相位和第一去积分相位,随后是第二积分相位和第二去积分相位。 该系统还包括与积分ADC电路可操作地通信的ADC控制器,用于在第二去积分阶段期间检测何时到达第一计数值,然后响应于该检测复位第二计数值,使得第二计数值被偏移 在第二个去集成阶段结束时进行了修正。 结果,在测量周期中自动执行差分计算。
    • 5. 发明授权
    • Method and system of harmonic regulation
    • 谐波调节方法与系统
    • US06681190B2
    • 2004-01-20
    • US10464321
    • 2003-06-18
    • James A. Ulrich
    • James A. Ulrich
    • G01R2200
    • H02M5/458H02M1/44
    • A system and method of harmonic regulation includes a harmonic regulator configured to cancel or inject harmonics into a power conversion system. A resettable integrator is provided to determine at least one harmonic coefficient of the at least one error signal harmonic. The resettable integrator determines the at least one harmonic coefficient over a single signal period and is then reset. The harmonic regulator further includes at least one adder to determine a difference of the harmonic coefficient and the reference harmonic coefficient and a regulator is provided to determine an at least one axis harmonic reference signal. The harmonic regulator outputs a three-phase final electrical reference signal that is input into a DC/AC inverter of a power conversion system.
    • 谐波调节的系统和方法包括被配置为将谐波消除或注入电力转换系统的谐波调节器。 提供可复位积分器以确定至少一个误差信号谐波的至少一个谐波系数。 复位积分器在单个信号周期内确定至少一个谐波系数,然后被复位。 谐波调节器还包括至少一个加法器,以确定谐波系数和参考谐波系数的差,并且提供调节器以确定至少一个轴谐波参考信号。 谐波调节器输出输入到电力转换系统的DC / AC逆变器的三相最终电参考信号。
    • 6. 发明授权
    • Acceleration of automatic test
    • 加速自动测试
    • US06690152B2
    • 2004-02-10
    • US09917282
    • 2001-07-27
    • David Smith
    • David Smith
    • G01R2200
    • G01R31/31727G01R31/31922
    • Integrated circuitry including a clock circuit powered by a first power supply and a secondary circuit powered by a second power supply. The secondary circuit includes a control signal output for supplying a control signal to the clock circuit and a clock data output for outputting new clock data to the clock circuit. The clock circuit includes: clock generator means for generating current clock data and outputting it to the secondary circuit; detector means for monitoring voltage from the second power supply and generating a system reset signal for supply to the secondary circuit in the event the voltage falls below a predetermined level; a first latch having a reset operable by a predetermined state of the system reset output generated by the detector means; a comparator accepting as inputs the control signal from the secondary circuit and an output of the first latch; and a multiplexor accepting as data inputs the clock data from the secondary circuit and the clock data from the clock circuit, and accepting as a control input the output of the comparator. The integrated circuitry is configured such that when the secondary circuit is not asserted and the control signal is asserted, the current clock data in the clock circuit is replaced with the new clock data. Moreover, when the first latch is reset, the comparator and multiplexor prevent current clock data from being replaced by data from the secondary circuit.
    • 集成电路,包括由第一电源供电的时钟电路和由第二电源供电的次级电路。 次级电路包括用于向时钟电路提供控制信号的控制信号输出和用于向时钟电路输出新的时钟数据的时钟数据输出。 时钟电路包括:用于产生当前时钟数据并将其输出到次级电路的时钟发生器装置; 检测器装置,用于监视来自第二电源的电压并产生系统复位信号,以在电压下降到预定电平的情况下供应给次级电路; 第一锁存器,其具有可由所述检测器装置产生的所述系统复位输出的预定状态操作的复位; 比较器,接收来自次级电路的控制信号和第一锁存器的输出; 并且作为数据接收的多路复用器输入来自次级电路的时钟数据和来自时钟电路的时钟数据,并且接受比较器的输出作为控制输入。 集成电路被配置为使得当次级电路不被断言并且控制信号被断言时,时钟电路中的当前时钟数据被新的时钟数据替代。 此外,当第一锁存器被复位时,比较器和多路复用器防止当前时钟数据被来自次级电路的数据替换。