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1. 发明授权

EP1801599B1 Messeinrichtung zur kapazitiven Druckmessung 有权
标题翻译：用于电容压力测量装置测量
公开(公告)号：EP1801599B1
公开(公告)日：2008-06-18
申请号：EP06025922.3
申请日：2006-12-14
申请人： ATMEL Germany GmbH
发明人： Moser, Helmut , Saile, Thomas
IPC分类号： G01R27/26 , G01L9/12 , H03M1/00
CPC分类号： G01L9/12 , G01R27/2605 , H03M1/0697 , H03M1/52 , H03M1/62

2. 发明公开

EP1801599A1 Messeinrichtung zur kapazitiven Druckmessung 有权
公开(公告)号：EP1801599A1
公开(公告)日：2007-06-27
申请号：EP06025922.3
申请日：2006-12-14
申请人： ATMEL Germany GmbH
发明人： Moser, Helmut , Saile, Thomas
IPC分类号： G01R27/26 , G01L9/12 , H03M1/00
CPC分类号： G01L9/12 , G01R27/2605 , H03M1/0697 , H03M1/52 , H03M1/62
摘要： Die Erfindung betrifft eine Messeinrichtung zur kapazitiven Druck- und/oder Temperaturmessung, insbesondere für Reifendruckkontrollsysteme, mit zumindest einem Sensor, der ein kapazitives Messelement zum Erfassen einer Zustandsgröße aufweist, welches an einem ausgangsseitigen Messknoten des Messelements anliegt, mit zumindest einem nach dem Zweirampenverfahren arbeitenden A/D-Wandler, mit einer Lade-/Entladeschaltung, zum wechselseitigen Aufladen und Entladen des Messelements und zur Erzeugung eines sägezahnartigen Messpotenzials an dem Messknoten als Maß für die Kapazität des Messelements, mit einem Periodenzähler, der die Perioden des Messpotenzials ermittelt, mit einem Taktzähler, der die Takte eines Taktsignals ermittelt, die innerhalb der Dauer zumindest einer Periode des Messpotenzials liegen. Die Erfindung betrifft ein Messverfahren zur kapazitiven Druck- und/oder Temperaturmessung.
摘要翻译：传感器具有用于检测状态值的测量元件。模拟/数字（A / D）转换器根据双斜率法进行操作。充电/放电电路对测量元件进行充电和放电，并在测量节点处产生锯齿测量电位作为元件电容的量度。周期计数器确定测量电位的周期，时钟计数器确定位于测量电位持续时间内的时钟信号的周期。轮胎压力控制系统的电容式压力测量的测量方法还包括独立权利要求。

3. 发明授权

US4110746A A-D converter having nonlinear characteristics 失效
标题翻译： A-D转换器具有非线性特性
公开(公告)号：US4110746A
公开(公告)日：1978-08-29
申请号：US697897
申请日：1976-06-21
申请人： Hikaru Furukawa , Masakazu Mitamura , Kenji Higuchi
发明人： Hikaru Furukawa , Masakazu Mitamura , Kenji Higuchi
IPC分类号： G01D3/02 , G01D5/249 , G01R15/00 , H03M1/00 , H03K13/02
CPC分类号： H03M1/62 , H03M1/52
摘要： Disclosed is an A-D converter in which a voltage to be measured is subjected to first integration for a certain period of time; a reference voltage of the opposite polarity from the voltage to be measured is subjected to second integration until the integrated value obtained by the first integration returns to a predetermined value; measuring clock pulses are counted by a counter circuit in the period of the second integration; and the voltage to be measured is converted by the count value of the counter circuit into a digital value. In the A-D converter, there are provided a variable frequency divider and a memory having stored therein frequency dividing ratio determining signals for changing the frequency dividing ratio of the variable frequency divider. In the period of the second integration, the measuring clock pulses are supplied to the counter circuit through the variable frequency divider and each time the clock pulse is obtained, the frequency dividing ratio determining signals are each detected from the memory and preset in the variable frequency divider. And each time the number of clock pulses supplied to the counter circuit exceeds a certain number, the address of the memory is stepped by one. As a result of this, the frequency dividing ratio of the variable frequency divider sequentially changes, by which is obtained a digital converted value conforming to a non-linear characteristic of the voltage to be measured.
摘要翻译：公开了一种A-D转换器，其中待测电压经过一定时间的第一积分; 将要测量的电压相反极性的参考电压进行第二积分，直到通过第一积分获得的积分值返回到预定值; 测量时钟脉冲在第二次积分期间被计数器电路计数; 并且要测量的电压被计数器电路的计数值转换成数字值。在A-D转换器中，提供了可变分频器和存储器，其中存储有用于改变可变分频器的分频比的分频比确定信号。在第二积分期间，通过可变分频器将测量时钟脉冲提供给计数器电路，并且每当得到时钟脉冲时，分频比确定信号各自从存储器检测并以可变频率预设分隔线并且每次提供给计数器电路的时钟脉冲的数量超过一定数量时，存储器的地址被加1。结果，可变分频器的分频比依次变化，由此获得符合待测电压的非线性特性的数字转换值。

4. 发明授权

US3978402A Apparatus for producing an electrical output signal whose magnitude is linearly representative of the value of an unknown resistance 失效
标题翻译：用于生产电气输出信号的装置，其中的电压是线性表示未知电阻的值
公开(公告)号：US3978402A
公开(公告)日：1976-08-31
申请号：US553378
申请日：1975-02-26
申请人： Alan Ryder
发明人： Alan Ryder
IPC分类号： G01R19/255 , G01R27/14 , H03M1/00 , G01R27/02
CPC分类号： G01R27/14 , H03M1/52 , H03M1/62
摘要： In a DVOM of the dual slope type, an unknown resistance or conductance to be measured is connected to a reference signal source to generate a voltage or current which is measured by the DVOM. However, if the input impedance of the DVOM is not extremely high, it loads the unknown resistance or conductance, and renders the relationship between the value of the unknown resistance or conductance and the actual voltage or current measured by the DVOM non-linear. In order to correct for this, a proportion of this actual voltage or current is algebraically summed with the reference signal used in the DVOM for generating the second slope of its dual slope operation, the proportion being selected in dependence on the input impedance of the DVOM (which can thus now take any convenient value) to linearize the relationship between the value of the unknown resistance or conductance and the output signal of the DVOM.

5. 发明授权

US3706934A Apparatus for linearizing a non-linear signal 失效
标题翻译：用于线性化非线性信号的装置
公开(公告)号：US3706934A
公开(公告)日：1972-12-19
申请号：US3706934D
申请日：1971-01-28
申请人： SPERRY RAND CORP
发明人： ROBINSON ROBERT W
IPC分类号： G06F7/68 , H03M1/00 , H03K17/00
CPC分类号： G06F7/68 , H03M1/62
摘要： Linearizing apparatus comprising a controllable frequency divider responsive to the signal to be linearized for providing a second signal with frequency selectively controlled multiples of the input signal to be linearized. A pulse counter accumulates the cycles of the second signal and controlling means responsive to the count conditions attained by the pulse counter selects the controlled multiples in accordance with the attainment of predetermined count conditions.
摘要翻译：线性化装置包括响应于要被线性化的信号的可控分频器，以提供具有要线性化的输入信号的频率选择性控制倍数的第二信号。脉冲计数器根据由脉冲计数器获得的计数条件，根据达到预定计数条件选择受控倍数，累加第二信号和控制装置的周期。

6. 发明授权

US3662163A Digital signal linearizer 失效
标题翻译：数字信号线性化
公开(公告)号：US3662163A
公开(公告)日：1972-05-09
申请号：US3662163D
申请日：1970-08-04
申请人： GEN ELECTRIC
发明人： MILLER DAVID E , HEIL ROBERT C
IPC分类号： G06F7/68 , G06F17/17 , H03M1/00 , G06F15/34 , H03K13/20
CPC分类号： G06F7/68 , G06F17/17 , H03M1/62
摘要： A digital signal linearizer for obtaining a linear digital output from a non-linear input. The input voltage is a non-linear representation of a quantity, such as temperature as measured by a thermocouple sensor. A voltage controlled oscillator converts the input voltage to a pulse train having a pulse rate which is a linear representation of the input voltage, but like the input voltage, is a non-linear representation of the measured quantity. The pulses are connected through a NAND gate to programmable divided by N frequency divider for fixed repeated intervals. Hence, the number of pulses passed depends directly on the repetition rate of the oscillator output pulses. Since the voltage, and hence pulse rate v. Quantity measured characteristics of the sensor are known, the divider is programmed to provide a division factor n which varies over different segment of the range of interest so that the output pulse count from the divider is linearly related to the quantity being measured.
摘要翻译：一种用于从非线性输入获得线性数字输出的数字信号线性化器。输入电压是由热电偶传感器测量的量的非线性表示，例如温度。压控振荡器将输入电压转换为具有作为输入电压的线性表示的脉冲速率的脉冲串，但是与输入电压一样，是测量量的非线性表示。脉冲通过NAND门连接到可编程DIVIDED N分频器，用于固定的重复间隔。因此，通过的脉冲数取决于振荡器输出脉冲的重复率。由于电压，因此脉冲速率v。传感器的量测量特性是已知的，所以分频器被编程以提供在感兴趣范围的不同段上变化的分频因子n，使得来自分频器的输出脉冲计数为线性与被测量相关。

7. 发明授权

US3593012A Engine life recorder system using engine temperature and rpm data 失效
标题翻译：发动机寿命记录仪系统使用发动机温度和转速数据
公开(公告)号：US3593012A
公开(公告)日：1971-07-13
申请号：US3593012D
申请日：1969-01-17
申请人： SIMMONDS PRECISION PRODUCTS
发明人： LANG WALTER T
IPC分类号： F01M11/10 , G06G7/64 , G06J1/00 , G07C3/00 , H03M1/00
CPC分类号： F01M11/10 , F16N2260/16 , G06G7/64 , G06J1/00 , G07C3/00 , H03M1/62
摘要： A recording system for measuring and indicating engine life usage by providing analog data representative of engine temperature and engine r.p.m., summing the analog data and converting the information into serial digital form to antilog to the base 2, integrating by counting and displaying the total count as an indication of percent engine life used.

8. 发明授权

US2839744A Non-linear analog-to-digital converter 失效
标题翻译：非线性模数转换器
公开(公告)号：US2839744A
公开(公告)日：1958-06-17
申请号：US61315156
申请日：1956-10-01
申请人： CONS ELECTRODYNAMICS CORP
发明人： SLOCOMB GEORGE M
IPC分类号： H03M1/00
CPC分类号： H03M1/62

9. 发明申请

WO2011086378A1 ANALOGUE TO DIGITAL CONVERTER 审中-公开
标题翻译：数字转换器的模拟
公开(公告)号：WO2011086378A1
公开(公告)日：2011-07-21
申请号：PCT/GB2011/050051
申请日：2011-01-14
申请人： DAVIES, Jevon, Raymond
发明人： DAVIES, Jevon, Raymond
IPC分类号： H03M1/04 , H03M1/60 , H03M1/62 , H03M1/12
CPC分类号： H03M1/04 , H03M1/121 , H03M1/60 , H03M1/62
摘要： An analogue to digital converter (1) comprises a plurality of circuits (8) each operable to convert an analogue signal into a series of digital pulses, wherein the number of pulses produced by each of the circuits (8) in a particular time period is related to the integral of the amplitude of the analogue signal over that time period. The plurality of circuits (8) are connected in parallel with each other. The circuits (8) collectively average noise towards zero and sample an analogue input signal (2) at a higher frequency than would be possible with a single such circuit.
摘要翻译：模拟数字转换器（1）包括多个电路（8），每个电路可操作以将模拟信号转换成一系列数字脉冲，其中由特定时间段内的每个电路（8）产生的脉冲数为与该时间段内的模拟信号幅度的积分有关。多个电路（8）彼此并联连接。电路（8）将噪声总体平均为零，并以比单个这样的电路可能的更高的频率对模拟输入信号（2）进行采样。

10. 发明授权

US09246507B2 Analogue to digital conversion device 有权
标题翻译：模拟数字转换设备
公开(公告)号：US09246507B2
公开(公告)日：2016-01-26
申请号：US14669052
申请日：2015-03-26
申请人： DENSO CORPORATION
发明人： Tomohito Terazawa
IPC分类号： H03M1/60 , H03M1/14 , H03M1/62
CPC分类号： H03M1/146 , H03M1/502 , H03M1/60 , H03M1/62
摘要： An A/D conversion device has an A/D conversion section including A/D conversion units. Each A/D conversion unit has a pulse delay circuit including delay units connected in daisy chain to form a ring delay line. Each delay unit delays a pulse signal by a delay time corresponding to an input voltage. The A/D conversion section counts the number of pulse signals that passed through the delay units during a period counted from a timing when a start signal is switched to an activation level from a non-activation level at a timing when a sampling signal is received. When each two successive timing signals CKi (i=1, 2, . . . and m) have a same specific period. The each two successive timing signals have a different phase shifted by 1/m of the specific period. Each A/D conversion unit receives the timing signal CK1 as the start signal, and the timing signal CKi+1 (CKm+1=CK1) as the sampling signal.
摘要翻译： A / D转换装置具有包括A / D转换单元的A / D转换部。每个A / D转换单元具有脉冲延迟电路，包括以菊花链连接的延迟单元以形成环延迟线。每个延迟单元将脉冲信号延迟与输入电压对应的延迟时间。 A / D转换部分在从接收到采样信号的定时处的非激活电平切换到启动电平的定时期间计数的周期期间，计数通过延迟单元的脉冲信号的数量。当每两个连续定时信号CK i（i = 1,2，...和m）具有相同的特定周期时。每两个连续的定时信号具有不同的相位移位特定周期的1 / m。每个A / D转换单元接收定时信号CK1作为起始信号，定时信号CKi + 1（CKm + 1 = CK1）作为采样信号。

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