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    • 5. 发明授权
    • Homodyne down-converter with digital Hilbert transform filtering
    • 具有数字希尔伯特变换滤波的零差下转换器
    • US4902979A
    • 1990-02-20
    • US321697
    • 1989-03-10
    • Charles M. Puckette, IV
    • Charles M. Puckette, IV
    • H03D3/00H03D7/00
    • H03D3/008H03D2200/0054H03D2200/008H03D3/006H03D7/00
    • A homodyne down-converter, for use in an IF signal demodulator and the like, includes an analog-to-digital converter (ADC) which receives the IF analog signal for conversion to a digital data stream by sampling at a sampling rate frequency substantially equal to four times the IF signal frequency. A digital mixer controllably inverts the sampled data to convert the data to baseband, before a circuit removes the effects of DC offset in the analog IF signal applied to the ADC. A discrete Hilbert Transform filter is used for generating streams of sequential in-phase I' and quadrature-phase Q' data words, which are resampled to temporally align the two data word streams at a new data rate, thus effectively removing sample offset without the need for separate misalignment correction circuitry.
    • 用于IF信号解调器等的零差下转换器包括模数转换器(ADC),其通过以基本相等的采样率频率进行采样来接收IF模拟信号以转换为数字数据流 到IF信号频率的四倍。 在电路消除了施加到ADC的模拟IF信号中的DC偏移的影响之前,数字混合器可控地反转采样数据以将数据转换为基带。 离散希尔伯特变换滤波器用于产生顺序同相I'和正交相位Q'数据字的流,这些数据字被重采样以便以新的数据速率对两个数据字流进行时间对准,从而有效地去除样本偏移,而没有 需要单独的不对准校正电路。
    • 6. 发明授权
    • Complex digital sampling converter for demodulator
    • 用于解调器的复数数字采样转换器
    • US4878029A
    • 1989-10-31
    • US280073
    • 1988-12-05
    • Gary J. SaulnierRandy G. HerreraTimothy E. Thiel
    • Gary J. SaulnierRandy G. HerreraTimothy E. Thiel
    • H03H17/08H03D3/00H03D7/00H04L27/00
    • H03D3/009H03D3/008H03D2200/0047H03D2200/005H03D2200/006H03D2200/007H03D2200/008H03D2200/0082H03D3/006H03D7/00
    • A complex digital sampling converter, for use with an IF demodulator, includes: an analog-to-digital converter (ADC) receiving the IF analog signal for conversion to a digital data stream by sampling at a sampling rate frequency substantially equal to four times the IF signal frequency; a digital mixer for converting the sampled data to baseband; a sorter for separating the interleaved sequential in-phase I data words and quadrature-phase Q data words into a pair of concurrent I and Q data word streams; and at least one of a circuit for removing the effects of any DC offset in the analog IF signal applied to the ADC, and a circuit for correcting misalignment errors in the concurrent I and Q streams. Preferably, both correction circuits are utilized, with the DC offset removal circuit using averaging of all of the baseband samples, and the misalignment correction circuit averaging each pair of quadrature-phased Q data words while compensating the in-phase I data streams for the extra delay in the averaged Q data.
    • 与IF解调器一起使用的复数数字采样转换器包括:模数转换器(ADC),其接收IF模拟信号,用于通过以基本上等于四分之一倍的采样率频率进行采样来转换为数字数据流 中频信号频率; 用于将采样数据转换成基带的数字混合器; 分类器,用于将交织的顺序同相I数据字和正交相位Q数据字分离成一对并行I和Q数据字流; 以及用于去除施加到ADC的模拟IF信号中的任何DC偏移的影响的电路中的至少一个,以及用于校正并行I和Q流中的未对准误差的电路。 优选地,使用两个校正电路,其中DC偏移去除电路使用所有基带采样的平均,并且未对准校正电路对每对正交相位Q数据字进行平均,同时补偿同相I数据流的额外 延迟平均Q数据。
    • 8. 发明专利
    • Fm detection circuit
    • FM检测电路
    • JPS61102804A
    • 1986-05-21
    • JP22434484
    • 1984-10-25
    • Pioneer Electronic Corp
    • MATSUMURA SUMITAKA
    • H03D3/06H03D3/00
    • H03D3/007H03D3/006H03D2200/008
    • PURPOSE: To eliminate the entry of the 2nd higher harmonic component to a base band and to detect a wave even if the frequency band of an FM signal subjected to Hilbert conversion overlaps with that of an FM signal as it is by detecting said two types of FM signals, rendering the 2nd higher harmonic component to obtain signals of the same phase and reverse one with respect to a base band component and calculating them so as to cancel the 2nd higher harmonic component.
      CONSTITUTION: A pair of quadrature detection circuits 10 and 11 composed of a multiplier 1 and a delay circuit 2 are installed. The delay time of a delay circuit 13 for delaying an input signal by n-samples corresponds to that of a converter 12. Outputs of the pair of quadrature circuits 10 and 11 are added by an adder 14. This addition cancels the item of the 2nd higher harmonic component, and only the item of the base band component is outputted. More over its output goes to a two-folded level, and a detection gain can be taken generously.
      COPYRIGHT: (C)1986,JPO&Japio
    • 目的:为了消除第二高次谐波分量进入基带并检测波,即使经过希尔伯特转换的FM信号的频带与FM信号的频带重叠,因此通过检测所述两种类型的 FM信号,使第二高次谐波分量相对于基带分量获得相同相位和相反的信号,并计算它们以消除第二高次谐波分量。 构成:安装由乘法器1和延迟电路2组成的一对正交检测电路10和11。 用于将输入信号延迟n个样本的延迟电路13的延迟时间对应于转换器12的延迟时间。一对正交电路10和11的输出由加法器14相加。该相加取消第二个 高次谐波分量,并且仅输出基带分量的项目。 更多的输出将达到两折,可以大幅度提高检测效果。
    • 9. 发明公开
    • APPARATUS FOR PERFORMING FREQUENCY CONVERSION IN A COMMUNICATION SYSTEM
    • 在EINER TELEKOMMUNIKATIONSANORDNUNG的FREQUENZUMSETZER
    • EP0716788A4
    • 1996-11-06
    • EP95922104
    • 1995-05-26
    • MOTOROLA ENERGY SYSTEMS INC
    • STEWART KENNETH ALOVE ROBERT T
    • H03D3/00H04B1/26H04B1/69
    • H04B1/0021H03D3/007H03D2200/005H03D2200/0056H03D2200/006H03D2200/0068H03D2200/0072H03D2200/008H04B1/0003H04B1/0032H04B1/0046H04B1/26
    • An efficient apparatus for performing frequency conversion from a final IF frequency to a baseband frequency is described. A counter (401) generates two logical signals G1 (402) and G2 (403) which are passed to an exclusive-OR gate (404) and a multiplexer (406). When a control signal (411) is deasserted, multiplexer (406) passes signal G1 to I1 and signal G2 to I2; when control signal (411) is asserted, multiplexer (406) passes binary signal G1 to I2 (410) and signal G2 to I1 (407). Similarly, multiplexer (405) swaps its input real and imaginary samples when the output of exclusive-OR gate (404) is asserted; otherwise, it performs no operation on its input samples. Signals I1 (407) and I2 (410) are used to control arithmetic inverters (408) and (409) respectively. When the controlling signal for either inverter is asserted, the inventer performs arithmetic inversion, otherwise it performs no operation.
    • 描述了用于执行从最终IF频率到基带频率的频率转换的有效设备。 计数器(401)产生传送到异或门(404)和多路复用器(406)的两个逻辑信号G1(402)和G2(403)。 当控制信号(411)无效时,多路复用器(406)将信号G1传递给I1并将信号G2传递给I2; 当控制信号(411)被断言时,多路复用器(406)将二进制信号G1传递给I2(410)并将信号G2传递给I1(407)。 类似地,当异或门(404)的输出被声明时,多路复用器(405)交换其输入实数和虚数样本; 否则,它不会对其输入采样执行任何操作。 信号I1(407)和I2(410)分别用于控制算术逆变器(408)和(409)。 当任一个逆变器的控制信号有效时,本发明人执行算术逆变,否则它不执行任何操作。