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1. 发明专利

JP2004173281A Method and apparatus for i/q imbalance estimation 审中-公开
标题翻译：用于I / Q不平等估计的方法和装置
公开(公告)号：JP2004173281A
公开(公告)日：2004-06-17
申请号：JP2003389611
申请日：2003-11-19
申请人： Realtek Semiconductor Corp , 瑞▲いー▼半導体股▲ふん▼有限公司
发明人： LIU DER-ZHENG , LIU TAI-CHENG , TUNG SONG-NIEN , YEN KUANG-YU
IPC分类号： H04L27/38 , H03D3/00 , H04B1/40 , H04J11/00 , H04L1/00 , H04L27/00 , H04L27/26
CPC分类号： H03D3/009 , H04B1/40 , H04L27/2627 , H04L27/2649 , H04L2027/0016 , H04L2027/0022
摘要： PROBLEM TO BE SOLVED: To provide a method and an apparatus for estimating and compensating I/Q imbalance in a quadrature modulation/demodulation system.
SOLUTION: The apparatus comprises: a frequency domain signal generator; a transmitting terminal composed of a transmission compensation matrix circuit an I modulation path and a Q modulation path; a receiving terminal composed of an I demodulation path, a Q demodulation path and a reception compensation matrix circuit; and an I/Q imbalance estimator. A parameter to be used for compensating the I/Q imbalance is then calculated by transmitting a first signal of which the real region is symmetric and the imaginary region is asymmetric, a second signal of which the real region is asymmetric and the imaginary region is symmetric, and a third signal of which the real region is symmetric and the imaginary region is asymmetric and of which the amplitudes in the regions are equal in frequency domains.
COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供用于估计和补偿正交调制/解调系统中的I / Q不平衡的方法和装置。解决方案：该装置包括：频域信号发生器; 由I调制路径和Q调制路径构成的发送补偿矩阵电路的发送终端; 由I解调路径，Q解调路径和接收补偿矩阵电路构成的接收终端; 和I / Q不平衡估计器。用于补偿I / Q不平衡的参数然后通过发送实际区域对称的第一信号和虚部区域是不对称的，实际区域是不对称的第二信号，虚部区域是对称的，以及第三信号，其实际区域是对称的，并且虚部区域是不对称的，并且该区域中的幅度在频域中相等。版权所有（C）2004，JPO

2. 发明专利

JP2003218839A RECEIVER FOR USE IN BLOCK CODE TRANSMISSION AND RECEIVING METHOD THEREOF 审中-公开
公开(公告)号：JP2003218839A
公开(公告)日：2003-07-31
申请号：JP2002346156
申请日：2002-11-28
申请人： REALTEK SEMICONDUCTOR CORP
发明人： YEN KUANG-YU
IPC分类号： H03M13/41 , H04L1/00 , H04L25/03
摘要： PROBLEM TO BE SOLVED: To provide a receiver for transmitting block codes and a receiving method thereof as well as generation of accurate signals, utilizing the Viterbi algorithm. SOLUTION: The receiver comprises, a pre-equalizer for receiving block signals and converting the received block signals to first signals having minimum phase characteristics, a block interference removing unit for removing block mutual interference of the first signal, utilizing feedback signals after receiving the first signals and the feedback signals, and generating second signals free from the block mutual interference, a Viterbi decoder for generating third signals, utilizing the Viterbi algorithm after receiving the second signal; a block determining unit for receiving the third signals and generating blocks to be transmitted, and a feedback equalizer for receiving the blocks and generating feedback signals. COPYRIGHT: (C)2003,JPO

3. 发明专利

JP2003209592A APPARATUS AND METHOD FOR BAND WIDTH CONTROL 审中-公开
公开(公告)号：JP2003209592A
公开(公告)日：2003-07-25
申请号：JP2002321193
申请日：2002-11-05
申请人： REALTEK SEMICONDUCTOR CORP
发明人： CHEN JIN-RU , WU CHANG-LIEN
IPC分类号： H04L29/08
摘要： PROBLEM TO BE SOLVED: To provide an apparatus and method for band width control. SOLUTION: A band width control apparatus comprises: a first counter; a control logic performing an operation of adding or subtracting the first counter by one by an increment signal or a decrement signal, and determining if a packet is allowed to enter a queue in an exchange controller by the value of the first counter; an action device performing actions of inputting/outputting the packet to/from the queue, wherein the action device comprises a second counter, the action device increases the second counter by one after inputting a byte set; when a value of the second counter reaches the size of one-unit bytes, the action device resets the second counter to zero, and sends the increment signal to the control logic; and a timer sending the decrement signal to the control logic every unit time. The method for band width control comprises the steps of: inputting the packet by operating the control unit; decreasing the first counter by one every unit time to limit the value of the first counter within the unit time; allowing only one-unit bytes of data volume to input constantly during the unit time. COPYRIGHT: (C)2003,JPO

4. 发明专利

JP2012123801A On-line calibration method and device therefor of universal serial bus (usb) system 有权
标题翻译：通用串行总线（USB）系统的在线校准方法及其设备
公开(公告)号：JP2012123801A
公开(公告)日：2012-06-28
申请号：JP2011265538
申请日：2011-12-05
申请人： Realtek Semiconductor Corp , 瑞▲いー▼半導體股▲ふん▼有限公司
发明人： CHEN CHENG YU , CHIEN CHIH CHING , ZHOU DONG
IPC分类号： G06F3/00 , G06F13/38
CPC分类号： G06F13/4269
摘要： PROBLEM TO BE SOLVED: To simultaneously refer to termination resistance characteristics of a USB host and a device and to improve mutual adaptability between USB apparatuses.SOLUTION: An on-line calibration method applied to a USB system includes the steps of: providing a plurality of pairs of chirp signals; applying electric power to a termination resistance of the device and a termination resistance of the host connected thereto and varying levels of the chirp signals before detecting the chirp signals and sending a predetermined number of chirp signals; detecting level changes of the chirp signals having been varied on nodes; and keeping the levels of the chirp signals having been varied within a predetermined range by performing on-line calibration based upon the level changes.
摘要翻译：要解决的问题：同时参考USB主机和设备的终端电阻特性，并提高USB设备之间的相互适应性。应用于USB系统的在线校准方法包括以下步骤：提供多对线性调频信号; 在检测到线性调频信号并发送预定数量的线性调频脉冲信号之前，将电力施加到设备的终端电阻和与其连接的主机的终端电阻和啁啾信号的不同电平; 检测已经在节点上变化的啁啾信号的电平变化; 并且通过基于电平变化执行在线校准来保持啁啾信号的电平已经在预定范围内变化。版权所有（C）2012，JPO＆INPIT

5. 发明专利

JP2011108244A Non-multimedia device having function of virtualizing it as multimedia device, and virtualization method thereof 审中-公开
标题翻译：具有虚拟化作为多媒体设备的功能的非多媒体设备及其虚拟化方法
公开(公告)号：JP2011108244A
公开(公告)日：2011-06-02
申请号：JP2010259762
申请日：2010-11-22
申请人： Realtek Semiconductor Corp , 瑞▲いー▼半導體股▲ふん▼有限公司
发明人： CHIEN CHIH CHING , CHEN SHUANG-XI
IPC分类号： G06F3/06 , G06F13/10
CPC分类号： G06F9/45537
摘要： PROBLEM TO BE SOLVED: To provide a virtualization method for making a non-multimedia device to a virtual multimedia device.
SOLUTION: The non-multimedia device includes a control chip, a host interface and a memory interface. In the virtualization method, the host interface is connected to a host, and the control chip reports the host that the non-multimedia device is a multimedia device. After the host regards a memory card reader/writer device as the multimedia device, the host uses a predetermined CBW (command block wrapper) to perform transmission of data with the memory card reader/writer device.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种用于将非多媒体设备制作到虚拟多媒体设备的虚拟化方法。解决方案：非多媒体设备包括控制芯片，主机接口和存储器接口。在虚拟化方法中，主机接口连接到主机，控制芯片向主机报告非多媒体设备是多媒体设备。在主机将存储卡读/写器设备视为多媒体设备之后，主机使用预定的CBW（命令块封装）来执行与存储卡读/写器设备的数据传输。版权所有（C）2011，JPO＆INPIT

6. 发明专利

JP2010136328A Audio device 有权
标题翻译：音频设备
公开(公告)号：JP2010136328A
公开(公告)日：2010-06-17
申请号：JP2009196041
申请日：2009-08-26
申请人： Realtek Semiconductor Corp , 瑞▲いく▼半導體股▲ふん▼有限公司
发明人： TANG WEI-CHENG , TSAI CHUNG-HANG
IPC分类号： H04R3/00
CPC分类号： H03F1/305 , H03F3/72 , H03F2200/03 , H03F2203/7206
摘要： PROBLEM TO BE SOLVED: To provide an audio device which has an output/input function at one audio signal port. SOLUTION: The audio device is coupled to an audio signal port and includes a capacitor, a load, an output amplifying module, and an input amplifying module. The capacitor and the load are coupled to the audio port. The output amplifying module is operated at a first working voltage to output a first audio signal to the audio port. A direct current level of the first audio signal is substantially zero volt. The input amplifying module is operated at a second working voltage to receive a second audio signal from the audio port. When the audio port is in an output state, the output amplifying module is enabled and the input amplifying module is disabled, and when the audio port is in an input state, the input amplifying module is enabled and the output amplifying module is disabled. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供在一个音频信号端口具有输出/输入功能的音频设备。解决方案：音频设备耦合到音频信号端口，并包括电容器，负载，输出放大模块和输入放大模块。电容器和负载耦合到音频端口。输出放大模块以第一工作电压工作，以将第一音频信号输出到音频端口。第一音频信号的直流电平基本为零伏。输入放大模块在第二工作电压下操作以从音频端口接收第二音频信号。当音频端口处于输出状态时，输出放大模块使能，输入放大模块被禁止，当音频端口处于输入状态时，输入放大模块使能，输出放大模块被禁止。版权所有（C）2010，JPO＆INPIT

7. 发明专利

JP2006094532A Low-noise amplifier and method therefor 有权
标题翻译：低噪声放大器及其方法
公开(公告)号：JP2006094532A
公开(公告)日：2006-04-06
申请号：JP2005278175
申请日：2005-09-26
申请人： Realtek Semiconductor Corp , 瑞▲いー▼半導體股▲ふん▼有限公司
发明人： RAZAVI BEHZAD , KANG HAN-CHANG
IPC分类号： H03F1/26 , H03F1/42
CPC分类号： H03F3/189 , H03F2200/294 , H03F2200/372
摘要： PROBLEM TO BE SOLVED: To provide a low-noise amplifier with a switchable bandwidth instead of a fixed bandwidth, in a low-noise amplifier, and to provide its method in a broadband communication system.
SOLUTION: The low-noise amplifier (LNA) filters an input signal and generates an output signal. The LNA includes a switching load circuit having a plurality of load units, each of which determines a corresponding center frequency of the LNA. The switching load circuit selectively enables a load unit that has the desired corresponding center frequency. At least one converter coupled to the switching load circuit converts the input signal into a load current, which is sent to the enabled load unit to generate the output signal.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：在低噪声放大器中提供具有可切换带宽而不是固定带宽的低噪声放大器，并且在宽带通信系统中提供其方法。
解决方案：低噪声放大器（LNA）对输入信号进行滤波并产生输出信号。 LNA包括具有多个负载单元的开关负载电路，每个负载单元确定LNA的对应的中心频率。开关负载电路选择性地启用具有期望的对应中心频率的负载单元。耦合到开关负载电路的至少一个转换器将输入信号转换成负载电流，该负载电流被发送到使能的负载单元以产生输出信号。版权所有（C）2006，JPO＆NCIPI

8. 发明专利

JP2006013470A Chip protection device and method 审中-公开
标题翻译：芯片保护装置和方法
公开(公告)号：JP2006013470A
公开(公告)日：2006-01-12
申请号：JP2005150030
申请日：2005-05-23
申请人： Realtek Semiconductor Corp , リアルテックセミコンダクターコーポレイション
发明人： HUANG CHEN-CHIH , YEH TA-HSUN
IPC分类号： H01L21/822 , G06K19/073 , H01L21/82 , H01L27/04 , H03K5/19 , H04K1/00
CPC分类号： G06K19/07345 , G06K19/073
摘要： PROBLEM TO BE SOLVED: To provide a chip protection device to protect chips of an integrated circuit and its method.
SOLUTION: The protection device located in the chips includes a decoding circuit to decode a password to output a decoding signal and a security circuit joined with the decoding circuit to output a enabling signal according to the decoding signal. The integrated circuit enables the desired function of the chips by the enabling signal. Thus, the protection device prevents the chips from being reproduced.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种保护集成电路芯片的芯片保护装置及其方法。解决方案：位于芯片中的保护装置包括解码电路，用于解码密码以输出解码信号，以及与解码电路连接的安全电路，以根据解码信号输出使能信号。集成电路通过使能信号实现芯片的期望功能。因此，保护装置防止芯片被再现。版权所有（C）2006，JPO＆NCIPI

9. 发明专利

JP2005115924A Interface circuit 审中-公开
标题翻译：接口电路
公开(公告)号：JP2005115924A
公开(公告)日：2005-04-28
申请号：JP2004254377
申请日：2004-09-01
申请人： Realtek Semiconductor Corp , 瑞▲いー▼半導體股▲ふん▼有限公司
发明人： CHANG HUI-HUANG
IPC分类号： G06F3/00 , G06F13/36 , G06F13/38 , G06F13/40 , H04J1/16 , H04L25/02
CPC分类号： G06F13/4072
摘要： PROBLEM TO BE SOLVED: To provide an interface control circuit capable of adjusting the interface characteristics such as sequence of transmission data, the number and positions of input/output pins, input/output timing and a control signal.
SOLUTION: An interface circuit for transmitting data in a circuit system includes a plurality of input/output terminals, an input/output terminal sequence selection table for recording one or more pieces of input/output terminal data and an input/output terminal sequence selection module for transmitting the data from one or more input/output terminals among the plurality of input/output terminals by one or more pieces of input/output terminal data.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种能够调整传输数据序列，输入/输出引脚的数量和位置，输入/输出定时和控制信号等接口特性的接口控制电路。解决方案：用于在电路系统中传输数据的接口电路包括多个输入/输出端子，用于记录一个或多个输入/输出端子数据的输入/输出端子序列选择表和输入/输出端子序列选择模块，用于通过一个或多个输入/输出终端数据从多个输入/输出终端中的一个或多个输入/输出端子发送数据。版权所有（C）2005，JPO＆NCIPI

10. 发明专利

JP2004320712A Amplifier circuit 有权
公开(公告)号：JP2004320712A
公开(公告)日：2004-11-11
申请号：JP2003365913
申请日：2003-10-27
申请人： Realtek Semiconductor Corp , 瑞▲いー▼半導體股▲ふん▼有限公司
发明人： LEE CHAO-CHENG , CHANG CHIA-JUN
IPC分类号： H03F1/34 , H03F3/00 , H03F3/45
CPC分类号： H03F3/005 , H03F3/45475
摘要： PROBLEM TO BE SOLVED: To provide an amplifier circuit for solving the various problems caused in the conventional technology.
SOLUTION: An amplifier circuit 10 includes a differential amplifier 20 equipped with a positive input terminal, a negative input terminal, a positive output terminal and a negative output terminal, a 1st input impedance 12, a 2nd input impedance 14, a 3rd input impedance 16, a 4th input impedance 18, a 1st output impedance 22, a 2nd output impedance 24, a 3rd output impedance 26, and 4th output impedance 28. The positive output terminal therein outputs a first output signal, and the negative output terminal outputs a second output signal.
COPYRIGHT: (C)2005,JPO&NCIPI

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