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1. 发明授权

US5672906A Semiconductor device having defects of deep level generated by electron beam irradiation in a semiconductor substrate 失效
标题翻译：半导体衬底中具有由电子束照射产生的深度电平的缺陷的半导体器件
公开(公告)号：US5672906A
公开(公告)日：1997-09-30
申请号：US588395
申请日：1996-01-18
申请人： Yutaka Saito , Takao Akiba , Koju Nonaka , Masaaki Kamiya , Hitomi Watanabe
发明人： Yutaka Saito , Takao Akiba , Koju Nonaka , Masaaki Kamiya , Hitomi Watanabe
IPC分类号： H01L27/092 , H01L29/32 , H01L29/30
CPC分类号： H01L29/32 , H01L27/0921
摘要： The present invention is provided for improving latch-up resistance in a semiconductor integrated circuit device employing CMOS structure, for preventing the photoelectric carriers from getting into the sensors and improving the afterimage characteristic in a semiconductor image sensor device, and for impurity the switching characteristic in a semiconductor device having bipolar element. An electron beam of over 2 MeV and 1E15/cm.sup.2 is irradiated to a monocrystal silicon semiconductor region in a substrate and then annealing is performed at a high temperature of over 200.degree. C. As a result, at 150 K., a shallow level traps of which the activation energy from a valence band EV is under 0.1 eV and which is produced at the concentration of about 1.2-1.7E15/cm.sup.3, and a deep level traps of which the activation energy is 0.28-0.32 eV and which is produced at the concentration of about 1.6-2.0E13/cm.sup.3 are obtained. Then a semiconductor substrate having both the level traps stated above as recombination centers in a band gap of silicon is obtained. The chip size of this semiconductor substrate doesn't increase, and furthermore the cost of it is low as an epi wafer is not used. As well, it is possible to manufacture a semiconductor integrated circuit device just before or just after a process step of evaluating the electrical characteristic of a semiconductor integrated circuit device.
摘要翻译：本发明提供了用于提高采用CMOS结构的半导体集成电路器件中的闭锁电阻，用于防止光电载体进入传感器并提高半导体图像传感器装置中的残留图像特性，具有双极性元件的半导体器件。将超过2MeV和1E15 / cm2的电子束照射到衬底中的单晶硅半导体区域，然后在超过200℃的高温下进行退火。结果，在150K下，浅层陷阱其中价带EV的活化能低于0.1eV，其浓度约为1.2-1.7E15 / cm3，其中活化能为0.28-0.32eV，深度浓度为得到约1.6-2.0E13 / cm3的浓度。然后，获得具有上述两级电平阱的半导体衬底作为硅的带隙中的复合中心。该半导体衬底的芯片尺寸不增加，并且由于不使用epi晶片，因此其成本较低。同样，可以在评估半导体集成电路器件的电特性的工艺步骤之前或之后制造半导体集成电路器件。

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