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1. 发明授权

US06337501B1 Semiconductor device having bipolar transistor and MOS transistor 有权
标题翻译：具有双极晶体管和MOS晶体管的半导体器件
公开(公告)号：US06337501B1
公开(公告)日：2002-01-08
申请号：US09538490
申请日：2000-03-30
申请人： Yutaka Fukuda , Atsuo Onozaki , Junichi Nagata , Kiyoshi Yamamoto
发明人： Yutaka Fukuda , Atsuo Onozaki , Junichi Nagata , Kiyoshi Yamamoto
IPC分类号： H01L2701
CPC分类号： H01L27/1203 , H01L27/0722
摘要： A semiconductor device in which a bipolar transistor and a MOS transistor are formed in a common element region, which can prevent a circuit layout pattern from being large due to a wiring. A semiconductor device having an element region formed by the N−-type layer, which is isolated and insulated from the other regions. A P+-type base region, an N−-type emitter region, an N+-type collector region, and a P+-type excess carrier removing region for removing excess carrier in the P+-type base region, are commonly formed in particular one N−-type layer. Thus, a bipolar transistor is defined. Furthermore, a gate oxide film is formed on the surface of the N−-type layer where between the P+-type base region and the P+-type excess carrier removing region. A polysilicon layer is formed on the gate oxide film. Thus, a P+-type MOS transistor is defined by using the P+-type base region as a source and the P+-type excess carrier removing region a drain. The P+-type base region, the P+-type excess carrier removing region, the N−-type emitter region, the N+-type collector region, and the polysilicon layer are respectively connected to metallic electrodes. Since the bipolar transistor and the MOS transistor are commonly formed in an element region, and one of regions is commonly used, it can prevent a circuit layout pattern from being large due to a wiring for connecting the bipolar transistor and the MOS transistor.
摘要翻译：在公共元件区域中形成双极晶体管和MOS晶体管的半导体器件，其可以防止由布线引起的电路布局图案大。一种具有由N型层形成的元件区域的半导体器件，其与其它区域隔离并绝缘。通常在P +型基区中除去P +型基区中的过量载体的P +型碱基区，N型发射极区，N +型集电极区和P +型过剩载流子除去区， - 类型层。因此，定义了双极晶体管。此外，在P +型基极区域和P +型过载载流子除去区域之间的N型层的表面上形成栅极氧化膜。在栅极氧化膜上形成多晶硅层。因此，通过使用P +型基极区域作为源极和P +型过剩载流子去除区域是漏极来限定P +型MOS晶体管。 P +型基极区，P +型过剩载流子除去区，N型发射极区，N +型集电极区，多晶硅层分别与金属电极连接。由于双极晶体管和MOS晶体管通常形成在元件区域中，并且通常使用一个区域，所以由于用于连接双极晶体管和MOS晶体管的布线，可以防止电路布局图案变大。

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