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    • 1. 发明授权
    • Direct conversion receiver
    • 直接转换接收机
    • US07260373B2
    • 2007-08-21
    • US10727612
    • 2003-12-05
    • Yukinori AkamineSatoshi TanakaAkio YamamotoKazuaki Hori
    • Yukinori AkamineSatoshi TanakaAkio YamamotoKazuaki Hori
    • H04B1/10
    • H04B1/30H03G3/3052
    • In a direct conversion receiver, to cancel a DC offset generated in the baseband processing block, negative feedback arrangements comprising a gain control amplifier and a low-pass filter are respectively attached to the I and Q signal branches of the baseband block following mixer outputs. The gain control amplifier in each negative feedback circuit is gain adjusted so that the product G-B of the gain G of a primary gain control amplifier and its own gain B will be constant and thereby the DC offset is cancelled. This DC offset cancellation can be applied in a continuous receiving system with no intermittent time during a receiving operation. Capacitance elements located off-chip can be reduced to those to be used only in the low-pass filters in the negative feedback circuits, whereas many off-chip capacitance elements have been required to be inserted between each stage of gain control amplifiers in conventional baseband chains.
    • 在直接转换接收机中,为了消除在基带处理块中产生的DC偏移,包括增益控制放大器和低通滤波器的负反馈装置分别附加到混频器输出之后的基带块的I和Q信号分支。 每个负反馈电路中的增益控制放大器被增益调整,使得主增益控制放大器的增益G的乘积G-B和其自身的增益B将恒定,从而DC偏移被消除。 该DC偏移消除可以应用于在接收操作期间没有间歇时间的连续接收系统中。 位于片外的电容元件可以减少到仅在负反馈电路中的低通滤波器中使用的电容元件,而许多芯片外电容元件需要插入到常规基带中的增益控制放大器的每个级之间 链条
    • 2. 发明申请
    • Direct conversion receiver
    • 直接转换接收机
    • US20070190960A1
    • 2007-08-16
    • US11725475
    • 2007-03-20
    • Yukinori AkamineSatoshi TanakaAkio YamamotoKazuaki Hori
    • Yukinori AkamineSatoshi TanakaAkio YamamotoKazuaki Hori
    • H04B1/26
    • H04B1/30H03G3/3052
    • In a direct conversion receiver, to cancel a DC offset generated in the baseband processing block, negative feedback arrangements comprising a gain control amplifier and a low-pass filter are respectively attached to the I and Q signal branches of the baseband block following mixer outputs. The gain control amplifier in each negative feedback circuit is gain adjusted so that the product G·B of the gain G of a primary gain control amplifier and its own gain B will be constant and thereby the DC offset is cancelled. This DC offset cancellation can be applied in a continuous receiving system with no intermittent time during a receiving operation. Capacitance elements located off-chip can be reduced to those to be used only in the low-pass filters in the negative feedback circuits, whereas many off-chip capacitance elements have been required to be inserted between each stage of gain control amplifiers in conventional baseband chains.
    • 在直接转换接收机中,为了消除在基带处理块中产生的DC偏移,包括增益控制放大器和低通滤波器的负反馈装置分别附加到混频器输出之后的基带块的I和Q信号分支。 每个负反馈电路中的增益控制放大器被增益调整,使得主增益控制放大器的增益G的乘积G.B和其自身的增益B将恒定,从而DC偏移被消除。 该DC偏移消除可以应用于在接收操作期间没有间歇时间的连续接收系统中。 位于片外的电容元件可以减少到仅在负反馈电路中的低通滤波器中使用的电容元件,而许多芯片外电容元件需要插入到常规基带中的增益控制放大器的每个级之间 链条
    • 5. 发明授权
    • Direct conversion receiver
    • 直接转换接收机
    • US07856218B2
    • 2010-12-21
    • US11725475
    • 2007-03-20
    • Yukinori AkamineSatoshi TanakaAkio YamamotoKazuaki Hori
    • Yukinori AkamineSatoshi TanakaAkio YamamotoKazuaki Hori
    • H04B1/10
    • H04B1/30H03G3/3052
    • In a direct conversion receiver, to cancel a DC offset generated in the baseband processing block, negative feedback arrangements comprising a gain control amplifier and a low-pass filter are respectively attached to the I and Q signal branches of the baseband block following mixer outputs. The gain control amplifier in each negative feedback circuit is gain adjusted so that the product G·B of the gain G of a primary gain control amplifier and its own gain B will be constant and thereby the DC offset is cancelled. This DC offset cancellation can be applied in a continuous receiving system with no intermittent time during a receiving operation. Capacitance elements located off-chip can be reduced to those to be used only in the low-pass filters in the negative feedback circuits, whereas many off-chip capacitance elements have been required to be inserted between each stage of gain control amplifiers in conventional baseband chains.
    • 在直接转换接收机中,为了消除在基带处理块中产生的DC偏移,包括增益控制放大器和低通滤波器的负反馈装置分别附加到混频器输出之后的基带块的I和Q信号分支。 每个负反馈电路中的增益控制放大器被增益调整,使得主增益控制放大器的增益G的乘积G·B和其自身的增益B将恒定,从而DC偏移被消除。 该DC偏移消除可以应用于在接收操作期间没有间歇时间的连续接收系统中。 位于片外的电容元件可以减少到仅在负反馈电路中的低通滤波器中使用的电容元件,而许多芯片外电容元件需要插入到常规基带中的增益控制放大器的每个级之间 链条
    • 10. 发明授权
    • High frequency circuit and high frequency module
    • 高频电路和高频模块
    • US08810317B2
    • 2014-08-19
    • US13547431
    • 2012-07-12
    • Ryo KadoiNorio HayashiSatoshi ShimizuAkio Yamamoto
    • Ryo KadoiNorio HayashiSatoshi ShimizuAkio Yamamoto
    • H03G3/30
    • H03F1/0261H03F1/0211H03F3/193H03F3/195H03F2200/18H03F2200/465H03G3/3042
    • A high frequency circuit and a high frequency module are provided, in which the accuracy of compensation operation is improved in compensating by digital control. The amplification gain of an amplification element of an amplifier unit is controlled by a bias current of a bias control unit. A process monitoring circuit of a calibration circuit includes a first and a second element characteristic detector and a voltage comparator. The detectors convert the current of replica elements into a first and a second detection voltage. The voltage comparator compares a first and a second detection voltage and supplies a comparison output signal to a search control unit. Responding to the comparison output signal of the comparator and a clock signal of a clock generating unit, the controller generates a multi-bit digital compensation value according to a predetermined search algorithm, and the bias control unit of the second detector is feedback-controlled.
    • 提供了一种高频电路和高频模块,其中通过数字控制来补偿补偿操作的精度。 放大器单元的放大元件的放大增益由偏置控制单元的偏置电流控制。 校准电路的过程监控电路包括第一和第二元件特征检测器和电压比较器。 检测器将复制元件的电流转换成第一和第二检测电压。 电压比较器比较第一和第二检测电压,并将比较输出信号提供给搜索控制单元。 响应于比较器的比较输出信号和时钟产生单元的时钟信号,控制器根据预定的搜索算法生成多位数字补偿值,并且反馈控制第二检测器的偏置控制单元。