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1. 发明授权

US5305458A Multiple virtual storage system and address control apparatus having a designation table holding device and translation buffer 失效
标题翻译：多个虚拟存储系统和地址控制装置具有指定表保持装置和转换缓冲器
公开(公告)号：US5305458A
公开(公告)日：1994-04-19
申请号：US518411
申请日：1990-05-02
申请人： Yukihiro Motomura , Hideki Takeuchi , Hideo Sawamoto , Mari Ara
发明人： Yukihiro Motomura , Hideki Takeuchi , Hideo Sawamoto , Mari Ara
IPC分类号： G06F12/10 , G06F12/02 , G06F12/00
CPC分类号： G06F12/0292
摘要： In a multiple virtual storage system and more particularly in an address control apparatus, there are provided two kinds of holding devices a designation holding device for holding a segment table designations in association with access registers and a translation buffer for holding translation pairs of the access register and segment table designation. With this arrangement, the segment table designation designating the virtual address space possessing an operand of an instruction can be supplied quickly and efficiently.
摘要翻译：在多虚拟存储系统中，特别是在地址控制装置中，提供了两种保持装置：用于保存与访问寄存器相关联的分段表名称的指定保存装置和用于保存访问寄存器的转换对的转换缓冲器和分段表指定。通过这种布置，可以快速有效地提供指定具有指令的操作数的虚拟地址空间的段表指定。

2. 发明授权

US5317710A Invalidation of entries in a translation table by providing the machine a unique identification thereby disallowing a match and rendering the entries invalid 失效
标题翻译：通过为机器提供唯一的标识，从而不允许匹配并使条目无效，使转换表中条目无效
公开(公告)号：US5317710A
公开(公告)日：1994-05-31
申请号：US681446
申请日：1991-04-03
申请人： Mari Ara , Hideo Sawamoto , Ryo Yamagata
发明人： Mari Ara , Hideo Sawamoto , Ryo Yamagata
IPC分类号： G06F9/46 , G06F12/10 , G06F12/02 , G06F7/04
CPC分类号： G06F12/1036
摘要： A virtual computer system having a translation lookaside buffer which converts a virtual address to a real address comprises a register (VMNR) for storing the identification number (VMID) of a currently running virtual machine, the translation lookaside buffer having a bit for holding the VMID and a comparison circuit which compares the VMID held in the bit with the VMID provided by the VMNR and predicates the success of conversion from a virtual address to a real address on the basis of a matching result of comparison, a management table for holding data indicative of VMIDs used to define virtual machines which have run up to the current time point, and a control circuit which, when an invalidation command for the translation lookaside buffer is issued during a run of a virtual machine, selects an unused VMID as first information for defining the running virtual machine on the basis of the contents of the management table and sets the selected VMID in the VMNR.
摘要翻译：具有将虚拟地址转换为实际地址的翻译后备缓冲器的虚拟计算机系统包括用于存储当前正在运行的虚拟机的标识号（VMID）的寄存器（VMNR），具有用于保存VMID的位的转换后备缓冲器以及比较电路，其将保持在该比特中的VMID与由VMNR提供的VMID进行比较，并且基于比较的匹配结果来确定从虚拟地址到真实地址的转换的成功;用于保存数据的管理表用于定义已经运行到当前时间点的虚拟机的VMID;以及控制电路，当在虚拟机的运行期间发出用于翻译后备缓冲器的无效命令时，选择未使用的VMID作为第一信息，根据管理表的内容定义正在运行的虚拟机，并在VMNR中设置选定的VMID。

3. 发明授权

US4999770A Command controlled multi-storage space protection key pretesting system permitting access regardless of test result if selected key is predetermined value 失效
标题翻译：命令控制的多存储空间保护密钥预测试系统允许访问，不管测试结果如果选择的密钥是预定值
公开(公告)号：US4999770A
公开(公告)日：1991-03-12
申请号：US84092
申请日：1987-08-11
申请人： Mari Ara , Hideo Sawamoto , Kaname Imai
发明人： Mari Ara , Hideo Sawamoto , Kaname Imai
IPC分类号： G06F12/10 , G06F12/14
CPC分类号： G06F12/1475
摘要： A multi-address space control for use in a information processing system includes accessing a plurality of address spaces produced by different address translation table based on a selection command for a plurality of first address registers, and comparing a program status word key with a main storage key in a main storage to protect the main storage. The multi-address space control between different address spaces includes a PSW key register for holding the program status word key, a work access key register capable of arbitrarily designating an access key in accordance with a data transfer instruction, access apparatus for allowing an access to the main storage irrespective of the value of a main storage key when the value of the key selected by a selector as an access key from the work access key register and the PSW key register is a predetermined value, and setting apparatus for accessing the different address spaces by changing-over the plurality of leading address registers and the work access key register and PSW register, detecting an access exception, and setting the predetermined value in the work access key register to judge the work access key as an access key if an access exception is not detected.
摘要翻译：用于信息处理系统的多地址空间控制包括基于多个第一地址寄存器的选择命令访问由不同的地址转换表产生的多个地址空间，以及将程序状态字键与主存储器键入主存储以保护主存储。不同地址空间之间的多地址空间控制包括用于保存程序状态字键的PSW密钥寄存器，能够根据数据传送指令任意指定访问密钥的工作访问密钥寄存器，用于允许访问当从由工作访问键寄存器和PSW密钥寄存器作为访问键的选择器选择的密钥的值是预定值时，与主存储密钥的值无关的主存储器，以及用于访问不同地址的设置设备通过切换多个前导地址寄存器和工作访问密钥寄存器和PSW寄存器，检测访问异常，并且将工作访问密钥寄存器中的预定值设置为将访问密钥判断为访问密钥，如果访问未检测到异常。

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