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1. 发明授权

US5103285A Silicon carbide barrier between silicon substrate and metal layer 失效
标题翻译：硅衬底和金属层之间的硅碳化物屏障
公开(公告)号：US5103285A
公开(公告)日：1992-04-07
申请号：US286611
申请日：1988-12-19
申请人： Yuji Furumura , Fumitake Mieno , Takashi Eshita , Kikuo Itoh , Masahiko Doki
发明人： Yuji Furumura , Fumitake Mieno , Takashi Eshita , Kikuo Itoh , Masahiko Doki
IPC分类号： H01L21/205 , H01L29/45 , H01L29/78
CPC分类号： H01L29/456
摘要： A silicon carbide layer between a silicon substrate or layer and a metal layer because silicon carbide has many properties similar to those of silicon, has a very slow diffusion rate of a metal through the silicon carbide, or prevents a diffusion of a metal into the silicon, and can be deposited by CVD, which has an advantage of a good coverage over a step portion such as a contact window.

2. 发明授权

US5763005A Method for forming multilayer insulating film of semiconductor device 失效
标题翻译：用于形成半导体器件的多层绝缘膜的方法
公开(公告)号：US5763005A
公开(公告)日：1998-06-09
申请号：US589470
申请日：1996-01-22
申请人： Yuji Furumura , Masahiko Doki , Hidetoshi Nishio
发明人： Yuji Furumura , Masahiko Doki , Hidetoshi Nishio
IPC分类号： H01L21/316 , H01L21/3105 , H01L21/768 , H01L23/29 , H01L23/522 , H01L23/532 , C23C16/00 , H01L21/223
CPC分类号： H01L23/291 , H01L21/3105 , H01L23/5329 , H01L2924/0002
摘要： For a multilayer insulating film of a semiconductor device, the distributed quantity of carbon or fluorine is maximized at the interface between insulating films. The concentration of carbon present at the interface is 1.times.10.sup.20 atoms/cm.sup.3 or more.
摘要翻译：对于半导体器件的多层绝缘膜，在绝缘膜的界面上碳或氟的分布量最大化。界面处存在的碳的浓度为1×1020原子/ cm3以上。

3. 发明授权

US5506443A Multilayer insulating film of semiconductor device and method for forming the film 失效
标题翻译：半导体器件的多层绝缘膜及其形成方法
公开(公告)号：US5506443A
公开(公告)日：1996-04-09
申请号：US327820
申请日：1994-10-17
申请人： Yuji Furumura , Masahiko Doki , Hidetoshi Nishio
发明人： Yuji Furumura , Masahiko Doki , Hidetoshi Nishio
IPC分类号： H01L21/316 , H01L21/3105 , H01L21/768 , H01L23/29 , H01L23/522 , H01L23/532 , H01L23/58
CPC分类号： H01L23/291 , H01L21/3105 , H01L23/5329 , H01L2924/0002
摘要： A multilayer insulating film of a semiconductor device, where the distributed quantity of carbon or fluorine is maximized at the interface between insulating films. The concentration of carbon present at the interface is 1.times.10.sup.20 atoms/cm.sup.3 or more.
摘要翻译：半导体器件的多层绝缘膜，其中碳或氟的分布量在绝缘膜之间的界面处最大化。界面处存在的碳的浓度为1×1020原子/ cm3以上。

4. 发明授权

US5231057A Method of depositing insulating layer on underlying layer using plasma-assisted CVD process using pulse-modulated plasma 失效
标题翻译：使用脉冲调制等离子体的等离子体辅助CVD工艺在下层沉积绝缘层的方法
公开(公告)号：US5231057A
公开(公告)日：1993-07-27
申请号：US748955
申请日：1991-08-20
申请人： Masahiko Doki , Junya Nakahira , Yuji Furumura
发明人： Masahiko Doki , Junya Nakahira , Yuji Furumura
IPC分类号： H01L21/768 , C23C16/40 , C23C16/515 , H01L21/316 , H01L23/522
CPC分类号： H01L21/02164 , C23C16/515 , H01L21/02129 , H01L21/0217 , H01L21/02274 , H01L21/0228 , H01L21/02337 , H01L21/31612
摘要： A method for producing a semiconductor device includes the steps of forming a patterned wiring line on a first insulating layer, and depositing a second insulating layer on the patterned wiring line and the first insulating layer by a plasma-assisted CVD process in which a pulse-modulated plasma is generated and a gas containing hydrogen is used.

5. 发明授权

US5620526A In-situ cleaning of plasma treatment chamber 失效
标题翻译：等离子体处理室的原位清洗
公开(公告)号：US5620526A
公开(公告)日：1997-04-15
申请号：US279110
申请日：1994-07-22
申请人： Hirofumi Watatani , Masahiko Doki , Shoji Okuda , Junya Nakahira , Hideaki Kikuchi
发明人： Hirofumi Watatani , Masahiko Doki , Shoji Okuda , Junya Nakahira , Hideaki Kikuchi
IPC分类号： H01L21/302 , C09K13/08 , C23C16/44 , H01L21/3065 , H01L21/31 , H01L21/316
CPC分类号： C09K13/08 , C23C16/4405
摘要： A cleaning of a plasma chamber is done by a NF.sub.3 plasma treatment (typically under 1 to 1.5 Torr). The etching rate of an oxide layer can be improved by inserting, between the NF.sub.3 plasma treatments, a low pressure (lower than 10.sup.-1 Torr) plasma treatment preferably in a plasma of oxygen, water vapor, silane, fluorine, a hydrate compound, nitrogen trifluoride, or a mixture of nitrogen trifluoride with at least one of hydrogen fluoride, fluorine, water vapor and hydride compounds.
摘要翻译：等离子体室的清洁通过NF3等离子体处理（通常在1至1.5托）下进行。通过在NF3等离子体处理之间插入优选在氧气，水蒸气，硅烷，氟，水合物化合物的等离子体中的低压（低于10-1 Torr）的等离子体处理，可以提高氧化物层的蚀刻速率，三氟化氮或三氟化氮与氟化氢，氟，水蒸气和氢化物化合物中的至少一种的混合物。

6. 发明授权

US5183777A Method of forming shallow junctions 失效
标题翻译：形成浅结的方法
公开(公告)号：US5183777A
公开(公告)日：1993-02-02
申请号：US759767
申请日：1991-09-13
申请人： Masahiko Doki , Michiko Takei
发明人： Masahiko Doki , Michiko Takei
IPC分类号： H01L21/225 , H01L29/08 , H01L29/36 , H01L29/732 , H01L29/78
CPC分类号： H01L29/78 , H01L21/2254 , H01L29/0804 , H01L29/36 , H01L29/7322 , Y10S148/034 , Y10S148/037 , Y10S148/144
摘要： A method of forming a shallow junction comprises the step of: forming a film including a hydrogen compound with one element selected from the group of boron, phosphorus arsenic to a thickness of several atom layers to 1000 .ANG. on a silicon substrate and annealing the film, whereby an impurity region having a depth of 1000 .ANG. or less and an impurity concentration of 10.sup.18 to 10.sup.21 cm.sup.-3 is formed in the surface layer of the silicon layer.
摘要翻译：形成浅结的方法包括以下步骤：在硅衬底上形成包含选自硼，磷砷中的一种元素至几个原子层的厚度至1000的氢化合物的膜并退火该膜，由此在硅层的表面层中形成深度为1000以下，杂质浓度为1018〜1021cm-3的杂质区域。

7. 发明授权

US5976973A Method of making a semiconductor device having planarized insulating layer 失效
标题翻译：制造具有平坦化绝缘层的半导体器件的方法
公开(公告)号：US5976973A
公开(公告)日：1999-11-02
申请号：US948329
申请日：1997-10-10
申请人： Koichiro Ohira , Katsuyuki Karakawa , Kazutoshi Izumi , Masahiko Doki
发明人： Koichiro Ohira , Katsuyuki Karakawa , Kazutoshi Izumi , Masahiko Doki
IPC分类号： H01L21/28 , H01L21/02 , H01L21/302 , H01L21/3065 , H01L21/3105 , H01L21/316 , H01L21/3213 , H01L21/768 , H01L23/522 , H01L21/30
CPC分类号： H01L21/02071 , H01L21/02126 , H01L21/02129 , H01L21/02131 , H01L21/02164 , H01L21/022 , H01L21/02271 , H01L21/02274 , H01L21/31612 , H01L21/31625 , H01L21/31629 , H01L21/31633 , H01L21/76819 , H01L21/31051 , Y10S438/906
摘要： A method of manufacturing a semiconductor device has the steps of: forming a wiring pattern by dry etching a wiring layer on a semiconductor substrate, using a resist pattern as a mask; immersing the wiring pattern in amine containing liquid to remove deposition residues formed during the dry etching; then, processing the wiring pattern with fluid not containing amine and being capable of removing deposition residues; forming a conformal insulating layer on the processed wiring pattern; and forming an insulating layer having a planarizing function on the conformal insulating layer by CVD. This method is suitable for multi-layer wiring, and can form an interlayer insulating film having a satisfactory planarizing function.
摘要翻译：制造半导体器件的方法包括以下步骤：通过使用抗蚀剂图案作为掩模，在半导体衬底上干蚀刻布线层来形成布线图案; 将布线图案浸入含胺液体中以除去在干蚀刻期间形成的沉积残留物; 然后用不含胺的流体处理布线图案，并且能够去除沉积残余物; 在所述经处理的布线图案上形成保形绝缘层; 以及通过CVD在保形绝缘层上形成具有平坦化功能的绝缘层。该方法适用于多层布线，并且可以形成具有令人满意的平坦化功能的层间绝缘膜。

8. 发明授权

US5310452A Plasma process apparatus and plasma processing method 失效
标题翻译：等离子体处理装置和等离子体处理方法
公开(公告)号：US5310452A
公开(公告)日：1994-05-10
申请号：US916495
申请日：1992-07-20
申请人： Masahiko Doki , Kiyoshi Ooiwa
发明人： Masahiko Doki , Kiyoshi Ooiwa
IPC分类号： H01J37/32 , H05H1/46 , H01L21/00
CPC分类号： H01J37/32357 , H05H1/46
摘要： Provided is a plasma processing apparatus and method which has a plasma generating chamber into which gas is introduced and microwaves are transmitted, thereby generating plasma. The plasma is introduced into a processing chamber, in which a semiconductor substrate to be processed resides. An RF generator and DC generator are mixed together and are synchronized with the microwaves, such that they are applied to the substrate at the same times the microwaves act upon the gas to form plasma. Thus, variance of the DC bias and RF bias can be independently controlled, and damage to the substrate is reduced. In another embodiment, an RF bias voltage modulation circuit is used to shape the RF waveform in accordance with predetermined patterns.
摘要翻译：提供了一种等离子体处理装置和方法，其具有等离子体产生室，气体被引入到该等离子体产生室中并且微波被传输，从而产生等离子体。将等离子体引入到待处理半导体衬底的处理室中。将RF发生器和DC发生器混合在一起并与微波同步，使得它们在微波作用于气体以形成等离子体的同时施加到基板。因此，可以独立地控制DC偏压和RF偏压的变化，并且减小对衬底的损伤。在另一个实施例中，RF偏置电压调制电路用于根据预定模式对RF波形进行调整。

9. 发明授权

US5160397A Plasma process apparatus and plasma processing method 失效
标题翻译：等离子体处理装置和等离子体处理方法
公开(公告)号：US5160397A
公开(公告)日：1992-11-03
申请号：US516077
申请日：1990-04-27
申请人： Masahiko Doki , Kiyoshi Ooiwa
发明人： Masahiko Doki , Kiyoshi Ooiwa
IPC分类号： H01J37/32 , H05H1/46
CPC分类号： H01J37/32357 , H05H1/46
摘要： Provided is a plasma processing apparatus and method which has a plasma generating chamber into which gas is introduced and microwaves are transmitted, thereby generating plasma. The plasma is introduced into a processing chamber, in which a semiconductor substrate to be processed resides. An RF generator and DC generator are mixed together and are synchronized with the microwaves, such that they are applied to the substrate at the same times the microwaves act upon the gas to form plasma. Thus, variance of the DC bias and RF bias can be independently controlled, and damage to the substrate is reduced. In another embodiment, an RF bias voltage modulation circuit is used to shape the RF waveform in accordance with predetermined patterns.

10. 发明授权

US4891118A Plasma processing apparatus 失效
标题翻译：等离子体处理装置
公开(公告)号：US4891118A
公开(公告)日：1990-01-02
申请号：US275352
申请日：1988-11-23
申请人： Kiyoshi Ooiwa , Masahiko Doki
发明人： Kiyoshi Ooiwa , Masahiko Doki
IPC分类号： C23C16/515 , H01J37/32
CPC分类号： H01J37/32357 , C23C16/515
摘要： In a typical plasma processing apparatus, microwaves are generated into a processing chamber which contains a gas and a substrate. Magnetic fields transmitted into the processing chamber cause plasma to be produced when microwaves are generated. Typically an RF bias voltage is applied to the substrate during the process. By optimizing the RF bias voltage which the pulses of microwaves the apparatus produces a higher quality thin film, or etching process, without damaging the substrate surface.
摘要翻译：在典型的等离子体处理装置中，将微波产生到包含气体和衬底的处理室中。传播到处理室中的磁场在产生微波时导致产生等离子体。通常，在该过程中将RF偏置电压施加到衬底。通过优化微波脉冲的RF偏置电压，该装置产生较高质量的薄膜或蚀刻工艺，而不损坏衬底表面。

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