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1. 发明授权

US08773557B2 Solid-state imaging element, method of driving the same, and camera system 有权
标题翻译：固态成像元件，驱动方法和相机系统
公开(公告)号：US08773557B2
公开(公告)日：2014-07-08
申请号：US13122317
申请日：2009-09-16
申请人： Yuichi Kato , Yoshikazu Nitta , Noriyuki Fukushima , Takashi Suenaga , Toshiyuki Sugita
发明人： Yuichi Kato , Yoshikazu Nitta , Noriyuki Fukushima , Takashi Suenaga , Toshiyuki Sugita
IPC分类号： H04N3/14 , H04N5/335
CPC分类号： H04N5/3742 , H01L27/14609 , H01L27/14614 , H01L27/14641 , H01L27/14643 , H04N5/347 , H04N5/3698 , H04N5/37455 , H04N5/37457 , H04N5/378
摘要： Provided is a solid-state imaging element including pixel signal read lines, and a pixel signal reading unit for reading pixel signals from a pixel unit via the pixel signal read line. The pixel unit includes a plurality of pixels arranged in a matrix form, each pixel including a photoelectric conversion element. In the pixel unit, a shared pixel in which an output node is shared among a plurality of pixels is formed, and a pixel signal of each pixel in the shared pixel is capable of being selectively output from the shared output node to a corresponding one of the pixel signal read lines. The pixel signal reading unit sets a bias voltage for a load element which is connected to the pixel signal read line and in which current dependent on a bias voltage flows in the load element, to a voltage causing a current value to be higher than current upon a reference bias voltage when there is no difference between added charge amounts, when addition of pixel signals of the respective pixels in the shared pixel is driven.
摘要翻译：提供了包括像素信号读取线的固态成像元件和用于经由像素信号读取线从像素单元读取像素信号的像素信号读取单元。像素单元包括以矩阵形式布置的多个像素，每个像素包括光电转换元件。在像素单元中，形成其中在多个像素之间共享输出节点的共享像素，并且共享像素中的每个像素的像素信号能够被选择性地从共享输出节点输出到像素信号读取线。像素信号读取单元设置连接到像素信号读取线的负载元件的偏置电压，并且其中取决于偏置电压的电流在负载元件中流动到使电流值高于当前值的电流当驱动共享像素中的各个像素的像素信号的相加时，当添加的电荷量之间没有差异时，参考偏置电压。

2. 发明申请

US20110176042A1 SOLID-STATE IMAGING ELEMENT, METHOD OF DRIVING THE SAME, AND CAMERA SYSTEM 有权
标题翻译：固态成像元件，驱动它们的方法和相机系统
公开(公告)号：US20110176042A1
公开(公告)日：2011-07-21
申请号：US13122317
申请日：2009-09-16
申请人： Yuichi Kato , Yoshikazu Nitta , Noriyuki Fukushima , Takashi Suenaga , Toshiyuki Sugita
发明人： Yuichi Kato , Yoshikazu Nitta , Noriyuki Fukushima , Takashi Suenaga , Toshiyuki Sugita
IPC分类号： H04N5/335
CPC分类号： H04N5/3742 , H01L27/14609 , H01L27/14614 , H01L27/14641 , H01L27/14643 , H04N5/347 , H04N5/3698 , H04N5/37455 , H04N5/37457 , H04N5/378
摘要： Provided is a solid-state imaging element including pixel signal read lines, and a pixel signal reading unit for reading pixel signals from a pixel unit via the pixel signal read line. The pixel unit includes a plurality of pixels arranged in a matrix form, each pixel including a photoelectric conversion element. In the pixel unit, a shared pixel in which an output node is shared among a plurality of pixels is formed, and a pixel signal of each pixel in the shared pixel is capable of being selectively output from the shared output node to a corresponding one of the pixel signal read lines. The pixel signal reading unit sets a bias voltage for a load element which is connected to the pixel signal read line and in which current dependent on a bias voltage flows in the load element, to a voltage causing a current value to be higher than current upon a reference bias voltage when there is no difference between added charge amounts, when addition of pixel signals of the respective pixels in the shared pixel is driven.
摘要翻译：提供了包括像素信号读取线的固态成像元件和用于经由像素信号读取线从像素单元读取像素信号的像素信号读取单元。像素单元包括以矩阵形式布置的多个像素，每个像素包括光电转换元件。在像素单元中，形成其中在多个像素之间共享输出节点的共享像素，并且共享像素中的每个像素的像素信号能够被选择性地从共享输出节点输出到像素信号读取线。像素信号读取单元设置连接到像素信号读取线的负载元件的偏置电压，并且其中取决于偏置电压的电流在负载元件中流动到使电流值高于当前值的电流当驱动共享像素中的各个像素的像素信号的相加时，当添加的电荷量之间没有差异时，参考偏置电压。

3. 发明授权

US07948415B2 DA converter, AD converter, and semiconductor device 有权
标题翻译： DA转换器，AD转换器和半导体器件
公开(公告)号：US07948415B2
公开(公告)日：2011-05-24
申请号：US12207283
申请日：2008-09-09
申请人： Go Asayama , Noriyuki Fukushima , Yoshikazu Nitta , Yoshinori Muramatsu , Kiyotaka Amano
发明人： Go Asayama , Noriyuki Fukushima , Yoshikazu Nitta , Yoshinori Muramatsu , Kiyotaka Amano
IPC分类号： H03M1/66
CPC分类号： H03M1/1014 , H03M1/66 , H03M1/742 , H04N5/378
摘要： A DA converter includes a first DA conversion section for obtaining an analog output signal in accordance with a digital input signal value, and a second DA conversion section for obtaining an analog gain control output signal in accordance with a digital gain control input signal value. In the DA converter, the gain control of the analog output signal generated by the first DA conversion section is performed on the basis of the gain control output signal generated by the second DA conversion section.
摘要翻译： DA转换器包括用于根据数字输入信号值获得模拟输出信号的第一DA转换部分和用于根据数字增益控制输入信号值获得模拟增益控制输出信号的第二DA转换部分。在DA转换器中，由第一DA转换部生成的模拟输出信号的增益控制基于由第二DA转换部生成的增益控制输出信号进行。

4. 发明授权

US07936294B2 Digital-to-analog converter, analog-to-digital converter, and semiconductor device 有权
标题翻译：数模转换器，模拟 - 数字转换器和半导体器件
公开(公告)号：US07936294B2
公开(公告)日：2011-05-03
申请号：US12426731
申请日：2009-04-20
申请人： Go Asayama , Noriyuki Fukushima , Yoshikazu Nitta , Yoshinori Muramatsu , Kiyotaka Amano
发明人： Go Asayama , Noriyuki Fukushima , Yoshikazu Nitta , Yoshinori Muramatsu , Kiyotaka Amano
IPC分类号： H03M1/66
CPC分类号： H03M1/66 , H03M1/0863 , H03M1/123 , H03M1/34 , H03M1/56 , H03M1/664 , H03M1/687 , H03M1/745 , H03M1/747
摘要： A DA conversion device includes the following elements. A higher-bit current source cell portion includes uniformly weighted higher-bit current source cells to generate an identical constant current. A lower-bit current source cell portion includes a lower-bit current source cells that are weighted to generate 1/two-to-the-power-of-certain-numbers constant currents. A constant current source selection controller includes a lower-bit controller having a scaler that uses clocks scaled down to 1/two-to-the-power-of-certain-numbers to select the lower-bit current source cells, and a higher-bit controller having shift registers and using a signal indicating a carry bit or a borrow bit used in the lower-bit controller to sequentially activate shift outputs of the shift registers, and uses the shift outputs to select the higher-bit current source cells. Constant current outputs of the selected current source cells are added and output so that an output current corresponding to the digital input signal is obtained.
摘要翻译： DA转换装置包括以下元件。较高位的电流源单元部分包括均匀加权的较高位电流源单元以产生相同的恒定电流。低位电流源单元部分包括被加权以产生特定数目的恒定电流的2/2的功率的低位电流源单元。恒定电流源选择控制器包括具有缩放器的低位控制器，该定标器使用按比例缩小到1/2到特定数目的功率的时钟来选择低位电流源单元，位控制器具有移位寄存器并且使用指示在低位控制器中使用的进位位或借位位的信号来顺序地激活移位寄存器的移位输出，并且使用移位输出来选择较高位电流源单元。添加并输出所选择的电流源单元的恒定电流输出，从而获得与数字输入信号相对应的输出电流。

5. 发明授权

US07710479B2 Solid-state image pickup device having analog-digital converters configured to sum values of multiple pixels in the array and method for driving the same 有权
标题翻译：具有模拟数字转换器的固态图像拾取装置，其被配置为求和阵列中的多个像素的值和用于驱动该像素的方法
公开(公告)号：US07710479B2
公开(公告)日：2010-05-04
申请号：US12419077
申请日：2009-04-06
申请人： Yoshikazu Nitta , Noriyuki Fukushima , Yoshinori Muramatsu , Yukihiko Yasui
发明人： Yoshikazu Nitta , Noriyuki Fukushima , Yoshinori Muramatsu , Yukihiko Yasui
IPC分类号： H04N3/14 , H04N5/335
CPC分类号： H04N5/378 , H03M1/1023 , H03M1/56 , H04N3/1562 , H04N5/2253 , H04N5/347 , H04N5/3742 , H04N5/37455
摘要： A CMOS image sensor includes column-parallel ADCs. Each of the ADCs includes a comparator and an up/down counter. With this configuration, digital values of pixels in a plurality of rows can be added without using additional circuits, such as an adder and a line memory device, and the frame rate can be increased while maintaining constant sensitivity.
摘要翻译： CMOS图像传感器包括列并行ADC。每个ADC都包括一个比较器和一个向上/向下计数器。利用这种配置，可以不使用诸如加法器和行存储器件的附加电路来添加多行中的像素的数字值，并且可以在保持恒定的灵敏度的同时增加帧速率。

6. 发明申请

US20090190021A1 Solid-state Image Pickup Device Having Analog-Digital Converters Configured To Sum Values Of Multiple Pixels In The Array And Method For Driving The Same 有权
标题翻译：具有模拟数字转换器的固态图像拾取器件被配置为对阵列中的多个像素求和和驱动相同的方法
公开(公告)号：US20090190021A1
公开(公告)日：2009-07-30
申请号：US12419077
申请日：2009-04-06
申请人： Yoshikazu Nitta , Noriyuki Fukushima , Yoshinori Muramatsu , Yukihiko Yasui
发明人： Yoshikazu Nitta , Noriyuki Fukushima , Yoshinori Muramatsu , Yukihiko Yasui
IPC分类号： H04N5/335
CPC分类号： H04N5/378 , H03M1/1023 , H03M1/56 , H04N3/1562 , H04N5/2253 , H04N5/347 , H04N5/3742 , H04N5/37455
摘要： A CMOS image sensor includes column-parallel ADCs. Each of the ADCs includes a comparator and an up/down counter. With this configuration, digital values of pixels in a plurality of rows can be added without using additional circuits, such as an adder and a line memory device, and the frame rate can be increased while maintaining constant sensitivity.
摘要翻译： CMOS图像传感器包括列并行ADC。每个ADC都包括一个比较器和一个向上/向下计数器。利用这种配置，可以不使用诸如加法器和行存储器件的附加电路来添加多行中的像素的数字值，并且可以在保持恒定的灵敏度的同时增加帧速率。

7. 发明授权

US07564398B2 Method and apparatus for ad conversion, semiconductor device for detecting distribution of physical quantity, and electronic apparatus 有权
标题翻译：用于广告转换的方法和装置，用于检测物理量分布的半导体器件和电子设备
公开(公告)号：US07564398B2
公开(公告)日：2009-07-21
申请号：US11532158
申请日：2006-09-15
申请人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
发明人： Yoshinori Muramatsu , Noriyuki Fukushima , Yoshikazu Nitta , Yukihiro Yasui
IPC分类号： H03M1/50
CPC分类号： H04N5/378 , H03M1/1019 , H03M1/123 , H03M1/56 , H04N5/335 , H04N5/3575 , H04N5/363
摘要： A column analog-to-digital converter having a voltage comparator and a counter is arranged for each a vertical signal line. The voltage comparator compares a pixel signal inputted via the vertical signal line at each row control signal line with a reference voltage, thereby generating a pulse signal having a length in time axis corresponding to the magnitude of a reset component and a signal component. The counter counts a clock to measure the width of the pulse signal until the end of the comparison operation of the comparator, and stores a count at the end of the comparison. A communication and timing controller controls the voltage comparator and the counter so that, in a first process, the voltage comparator performs a comparison operation on a reset component with the counter performing a down-counting operation, and so that, in a second process, the voltage controller performs the comparison operation on a signal component with the counter performing an up-counting operation.
摘要翻译：具有电压比较器和计数器的列模数转换器为每个垂直信号线布置。电压比较器将在每个行控制信号线处经由垂直信号线输入的像素信号与参考电压进行比较，从而产生具有对应于复位分量和信号分量的幅度的时间轴长度的脉冲信号。计数器对时钟进行计数，以测量脉冲信号的宽度，直到比较器的比较操作结束，并在比较结束时存储计数。通信和定时控制器控制电压比较器和计数器，使得在第一处理中，电压比较器对计数器执行递减计数操作对复位分量执行比较操作，并且在第二处理中，电压控制器对计数器执行向上计数操作对信号分量执行比较操作。

8. 发明授权

US07522082B2 Digital-to-analog converter, analog-to-digital converter, and semiconductor device 失效
标题翻译：数模转换器，模拟 - 数字转换器和半导体器件
公开(公告)号：US07522082B2
公开(公告)日：2009-04-21
申请号：US11974266
申请日：2007-10-12
申请人： Go Asayama , Noriyuki Fukushima , Yoshikazu Nitta , Yoshinori Muramatsu , Kiyotaka Amano
发明人： Go Asayama , Noriyuki Fukushima , Yoshikazu Nitta , Yoshinori Muramatsu , Kiyotaka Amano
IPC分类号： H03M1/66
CPC分类号： H03M1/66 , H03M1/0863 , H03M1/123 , H03M1/34 , H03M1/56 , H03M1/664 , H03M1/687 , H03M1/745 , H03M1/747
摘要： A DA conversion device includes the following elements. A higher-bit current source cell portion includes uniformly weighted higher-bit current source cells to generate an identical constant current. A lower-bit current source cell portion includes a lower-bit current source cells that are weighted to generate 1/two-to-the-power-of-certain-numbers constant currents. A constant current source selection controller includes a lower-bit controller having a scaler that uses clocks scaled down to 1/two-to-the-power-of-certain-numbers to select the lower-bit current source cells, and a higher-bit controller having shift registers and using a signal indicating a carry bit or a borrow bit used in the lower-bit controller to sequentially activate shift outputs of the shift registers, and uses the shift outputs to select the higher-bit current source cells. Constant current outputs of the selected current source cells are added and output so that an output current corresponding to the digital input signal is obtained.
摘要翻译： DA转换装置包括以下元件。较高位的电流源单元部分包括均匀加权的较高位电流源单元以产生相同的恒定电流。低位电流源单元部分包括被加权以产生特定数目的恒定电流的2/2的功率的低位电流源单元。恒定电流源选择控制器包括具有缩放器的低位控制器，该定标器使用按比例缩小到1/2到特定数目的功率的时钟来选择低位电流源单元，位控制器具有移位寄存器并且使用指示在低位控制器中使用的进位位或借位位的信号来顺序地激活移位寄存器的移位输出，并且使用移位输出来选择较高位电流源单元。添加并输出所选择的电流源单元的恒定电流输出，从而获得与数字输入信号相对应的输出电流。

9. 发明申请

US20050195304A1 Solid-state image pickup device and method for driving the same 有权
标题翻译：固体摄像装置及其驱动方法
公开(公告)号：US20050195304A1
公开(公告)日：2005-09-08
申请号：US11058851
申请日：2005-02-16
申请人： Yoshikazu Nitta , Noriyuki Fukushima , Yoshinori Muramatsu , Yukihiko Yasui
发明人： Yoshikazu Nitta , Noriyuki Fukushima , Yoshinori Muramatsu , Yukihiko Yasui
IPC分类号： H01L27/146 , H04N5/335 , H04N5/341 , H04N5/347 , H04N5/374 , H04N5/376 , H04N5/378
CPC分类号： H04N5/378 , H03M1/1023 , H03M1/56 , H04N3/1562 , H04N5/2253 , H04N5/347 , H04N5/3742 , H04N5/37455
摘要： A CMOS image sensor includes column-parallel ADCs. Each of the ADCs includes a comparator and an up/down counter. With this configuration, digital values of pixels in a plurality of rows can be added without using additional circuits, such as an adder and a line memory device, and the frame rate can be increased while maintaining constant sensitivity.
摘要翻译： CMOS图像传感器包括列并行ADC。每个ADC都包括一个比较器和一个向上/向下计数器。利用这种配置，可以不使用诸如加法器和行存储器件的附加电路来添加多行中的像素的数字值，并且可以在保持恒定的灵敏度的同时增加帧速率。

10. 发明授权

US08553122B2 Solid-state image pickup device 有权
标题翻译：固态图像拾取装置
公开(公告)号：US08553122B2
公开(公告)日：2013-10-08
申请号：US13094420
申请日：2011-04-26
申请人： Yoshikazu Nitta , Noriyuki Fukushima , Yoshinori Muramatsu , Yukihiko Yasui
发明人： Yoshikazu Nitta , Noriyuki Fukushima , Yoshinori Muramatsu , Yukihiko Yasui
IPC分类号： H04N3/14 , H04N5/335
CPC分类号： H04N5/378 , H03M1/1023 , H03M1/56 , H04N3/1562 , H04N5/2253 , H04N5/347 , H04N5/3742 , H04N5/37455
摘要： A system and method for driving a solid-state image pickup device including a pixel array unit including unit pixels. Each unit pixel includes a photoelectric converter, column signal lines and a number of analog-digital converting units. The unit pixels are selectively controlled in units of rows. Analog signals output from the unit pixels in a row selected by the selective control though the column signal lines are converted to digital signals via the analog-digital converting units. The digital signals are added among a number of unit pixels via the analog-digital converting units. The added digital signals from the analog-digital converting units are read. Each unit pixel in the pixel array unit is selectively controlled in units of arbitrary rows, the analog-distal converting units being operable to performing the converting in a (a) normal-frame-rate mode and a (b) high-frame-rate mode in response to control signals.
摘要翻译：一种用于驱动包括包括单位像素的像素阵列单元的固态图像拾取装置的系统和方法。每个单位像素包括光电转换器，列信号线和多个模数转换单元。以行为单位选择性地控制单位像素。通过选择性控制通过列信号线选择的行中的单位像素输出的模拟信号经由模拟数字转换单元转换成数字信号。数字信号通过模拟数字转换单元被添加到多个单位像素中。读取来自模拟数字转换单元的附加数字信号。像素阵列单元中的每个单位像素以任意行为单位选择性地被控制，所述模拟 - 远端转换单元可操作以以（a）正常帧速率模式和（b）高帧速率模式响应于控制信号。

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