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1. 发明申请

US20060038261A1 Shallow trench isolation and fabricating method thereof 审中-公开
标题翻译：浅沟槽隔离及其制造方法
公开(公告)号：US20060038261A1
公开(公告)日：2006-02-23
申请号：US11258491
申请日：2005-10-24
申请人： Yoyi Gong , Tony Lin , Jung-Tsung Tseng , Abula Yu
发明人： Yoyi Gong , Tony Lin , Jung-Tsung Tseng , Abula Yu
IPC分类号： H01L29/06
CPC分类号： H01L21/76224
摘要： A shallow trench isolation (STI) structure and fabricating method thereof is provided. A substrate is provided. A patterned mask layer is formed over the substrate. Using the patterned mask layer as an etching mask, the substrate is patterned to form a trench. A nitridation process is performed to form a silicon nitride liner on the surface of the trench. An insulating material is deposited to fill the trench. Since the silicon nitride liner within the STI is very thin, residual stress within the substrate is reduced, and the silicon nitride liner has very little or negligible impact on the trench aspect ratio.
摘要翻译：提供浅沟槽隔离（STI）结构及其制造方法。提供基板。在衬底上形成图案化掩模层。使用图案化掩模层作为蚀刻掩模，将衬底图案化以形成沟槽。进行氮化处理以在沟槽的表面上形成氮化硅衬垫。沉积绝缘材料以填充沟槽。由于STI内的氮化硅衬垫非常薄，衬底内的残余应力减小，并且氮化硅衬垫对沟槽纵横比的影响很小或可忽略不计。

2. 发明申请

US20050093103A1 Shallow trench isolation and fabricating method thereof 审中-公开
标题翻译：浅沟槽隔离及其制造方法
公开(公告)号：US20050093103A1
公开(公告)日：2005-05-05
申请号：US10697771
申请日：2003-10-29
申请人： Yoyi Gong , Tony Lin , Jung-Tsung Tseng , Abula Yu
发明人： Yoyi Gong , Tony Lin , Jung-Tsung Tseng , Abula Yu
IPC分类号： H01L21/762 , H01L29/06
CPC分类号： H01L21/76224
摘要： A shallow trench isolation (STI) structure and fabricating method thereof is provided. A substrate is provided. A patterned mask layer is formed over the substrate. Using the patterned mask layer as an etching mask, the substrate is patterned to form a trench. A nitridation process is performed to form a silicon nitride liner on the surface of the trench. An insulating material is deposited to fill the trench. Since the silicon nitride liner within the STI is very thin, residual stress within the substrate is reduced, and the silicon nitride liner has very little or negligible impact on the trench aspect ratio.
摘要翻译：提供浅沟槽隔离（STI）结构及其制造方法。提供基板。在衬底上形成图案化掩模层。使用图案化掩模层作为蚀刻掩模，将衬底图案化以形成沟槽。进行氮化处理以在沟槽的表面上形成氮化硅衬垫。沉积绝缘材料以填充沟槽。由于STI内的氮化硅衬垫非常薄，衬底内的残余应力减小，并且氮化硅衬垫对沟槽纵横比的影响很小或可忽略不计。

3. 发明申请

US20060118917A1 Shallow trench isolation and fabricating method thereof 审中-公开
公开(公告)号：US20060118917A1
公开(公告)日：2006-06-08
申请号：US11340035
申请日：2006-01-26
申请人： Yoyi Gong , Tony Lin , Jung-Tsung Tseng , Abula Yu
发明人： Yoyi Gong , Tony Lin , Jung-Tsung Tseng , Abula Yu
IPC分类号： H01L29/06
CPC分类号： H01L21/76224
摘要： A shallow trench isolation (STI) structure and fabricating method thereof is provided. A substrate is provided. A patterned mask layer is formed over the substrate. Using the patterned mask layer as an etching mask, the substrate is patterned to form a trench. A nitridation process is performed to form a silicon nitride liner on the surface of the trench. An insulating material is deposited to fill the trench. Since the silicon nitride liner within the STI is very thin, residual stress within the substrate is reduced, and the silicon nitride liner has very little or negligible impact on the trench aspect ratio.

4. 发明授权

US06902994B2 Method for fabricating transistor having fully silicided gate 有权
标题翻译：制造具有完全硅化栅的晶体管的方法
公开(公告)号：US06902994B2
公开(公告)日：2005-06-07
申请号：US10643675
申请日：2003-08-15
申请人： Yoyi Gong , Tony Lin , Jung-Tsung Tseng , Abula Yu
发明人： Yoyi Gong , Tony Lin , Jung-Tsung Tseng , Abula Yu
IPC分类号： H01L21/28 , H01L21/285 , H01L21/336 , H01L29/417 , H01L21/3205
CPC分类号： H01L29/41783 , H01L21/28097 , H01L21/28518 , H01L29/41775 , H01L29/665 , H01L29/66545
摘要： A method for fabricating a transistor having a fully silicided gate is described. A silicon substrate with a semi-finished transistor formed thereon is provided, wherein the transistor comprises a gate dielectric film, a silicon gate, a cap layer on the silicon gate, a spacer and a source/drain region. A raised source/drain is formed on the source/drain region, and then the cap layer is removed. Subsequently, a full silicidation process is performed to fully silicide the silicon gate.
摘要翻译：描述了一种制造具有完全硅化栅的晶体管的方法。提供其上形成有半成品晶体管的硅衬底，其中晶体管包括栅极电介质膜，硅栅极，硅栅极上的覆盖层，间隔物和源极/漏极区域。在源极/漏极区域上形成升高的源极/漏极，然后去除覆盖层。随后，进行完全硅化处理以使硅栅极完全硅化。

5. 发明申请

US20050037558A1 Method for fabricating transistor having fully silicided gate 有权
公开(公告)号：US20050037558A1
公开(公告)日：2005-02-17
申请号：US10643675
申请日：2003-08-15
申请人： Yoyi Gong , Tony Lin , Jung-Tsung Tseng , Abula Yu
发明人： Yoyi Gong , Tony Lin , Jung-Tsung Tseng , Abula Yu
IPC分类号： H01L21/28 , H01L21/285 , H01L21/336 , H01L29/417 , H01L21/4763 , H01L21/8234
CPC分类号： H01L29/41783 , H01L21/28097 , H01L21/28518 , H01L29/41775 , H01L29/665 , H01L29/66545
摘要： A method for fabricating a transistor having a fully silicided gate is described. A silicon substrate with a semi-finished transistor formed thereon is provided, wherein the transistor comprises a gate dielectric film, a silicon gate, a cap layer on the silicon gate, a spacer and a source/drain region. A raised source/drain is formed on the source/drain region, and then the cap layer is removed. Subsequently, a full silicidation process is performed to fully silicide the silicon gate.

6. 发明申请

US20070259503A1 METHOD OF FABRICATING A SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20070259503A1
公开(公告)日：2007-11-08
申请号：US11777291
申请日：2007-07-13
申请人： Hui-Chen Chang , Tony Lin , Brook Hsu , Cyrus LW Chen , Meng-Lin Lee , Wei-Tsun Shiau
发明人： Hui-Chen Chang , Tony Lin , Brook Hsu , Cyrus LW Chen , Meng-Lin Lee , Wei-Tsun Shiau
IPC分类号： H01L21/336
CPC分类号： H01L21/28114 , H01L21/31116 , H01L21/32137 , H01L21/823807 , H01L21/823864 , H01L29/42376 , H01L29/665 , H01L29/6653 , H01L29/7833 , H01L29/7843
摘要： A method of fabricating a semiconductor device is provided herein. The semiconductor device includes a substrate, a gate dielectric layer, a gate, a pair of source/drain regions and a stressed layer. The gate dielectric layer is disposed on the substrate and the gate whose top area is larger than its bottom area is disposed on the gate dielectric layer. The source/drain regions are disposed in the substrate next to the sidewalls of the gate. The stressed layer is disposed on the substrate to cover the gate and the source/drain regions.
摘要翻译：本发明提供一种制造半导体器件的方法。半导体器件包括衬底，栅介质层，栅极，一对源/漏区和应力层。栅极电介质层设置在基板上，并且顶部区域大于其底部区域的栅极设置在栅极介电层上。源极/漏极区域设置在邻近栅极的侧壁的衬底中。应力层设置在基板上以覆盖栅极和源极/漏极区域。

7. 发明申请

US20060047811A1 Method and system of providing access to various data associated with a project 审中-公开
标题翻译：提供对与项目相关的各种数据的访问的方法和系统
公开(公告)号：US20060047811A1
公开(公告)日：2006-03-02
申请号：US10932569
申请日：2004-09-01
申请人： Daniel Lau , Daniel Crevier , Jorge Morinigo , Robert Vreeland , Shengyong Li , Stuart DeSpain , Brooke Nelson , Jeffrey Smith , James Grandy , Laura Neumann , Tony Lin , Vianna Tam
发明人： Daniel Lau , Daniel Crevier , Jorge Morinigo , Robert Vreeland , Shengyong Li , Stuart DeSpain , Brooke Nelson , Jeffrey Smith , James Grandy , Laura Neumann , Tony Lin , Vianna Tam
IPC分类号： G06F15/173
CPC分类号： H04L67/2852 , H04L51/16
摘要： Described is a system and method that enables project management across application programs, including an email program, calendar program, spreadsheet program, word processing program, note taking program and others. A central project-related view provides access to project-related data items and may display a schedule, a task list of tasks filtered as being relevant to a project, a note page related to a project, and emails relevant to the project. In addition, other application objects (file, documents, presentations and spreadsheets) are also captured in the view and presented for easy access. Metadata including a project identifier is maintained in a database for the various data items, allowing rapid location of the data items related to a project via query techniques. A project palette allows access to the items from within another application program, and a project gallery allows a user alternative access to the files related to a project.
摘要翻译：描述了一种能够跨应用程序进行项目管理的系统和方法，包括电子邮件程序，日历程序，电子表格程序，文字处理程序，记录程序等。中央项目相关视图提供对项目相关数据项的访问，并且可以显示计划，过滤为与项目相关的任务的任务列表，与项目相关的注释页面以及与项目相关的电子邮件。此外，其他应用对象（文件，文档，演示文稿和电子表格）也被捕获在视图中并被呈现以便于访问。包含项目标识符的元数据被保存在用于各种数据项的数据库中，允许通过查询技术快速定位与项目相关的数据项。项目调色板允许访问另一个应用程序中的项目，项目库允许用户对与项目相关的文件进行替代访问。

8. 发明申请

US20050110787A1 Display apparatus with power saving capability 有权
标题翻译：具有省电功能的显示装置
公开(公告)号：US20050110787A1
公开(公告)日：2005-05-26
申请号：US10720432
申请日：2003-11-24
申请人： Tony Lin
发明人： Tony Lin
IPC分类号： G09G3/00 , G09G5/00 , H02J9/00
CPC分类号： H02J9/005 , G09G3/00 , G09G2330/02 , G09G2330/021
摘要： A power control unit of a display apparatus includes an AC-to-DC converter for receiving an external AC power. A regulator receives a DC output from the converter, and is operable in one of an enabled state of outputting a target DC power when receiving a first level signal, and a disabled state of not outputting the target DC power when receiving a second level signal. An electronic switch is operable for switching from an OFF-mode, where a processor permits a delay circuit to output the second level signal to the regulator, to an ON-mode, where the electronic switch initially enables the delay circuit to output the first level signal to the regulator such that the processor receives the target DC power from the regulator and where the electronic switch outputs a trigger signal to the processor so as to enable the processor to latch the first level signal and to provide the target DC power to a display module.
摘要翻译：显示装置的电源控制单元包括用于接收外部AC电力的AC-DC转换器。调节器从转换器接收DC输出，并且在接收到第一电平信号时可以在输出目标DC电力的使能状态中的一个中工作，以及当接收到第二电平信号时不输出目标DC电力的禁止状态。电子开关可操作用于从处于允许延迟电路将第二电平信号输出到调节器的OFF模式切换到ON模式，其中电子开关最初使能延迟电路输出第一电平信号到调节器，使得处理器从调节器接收目标DC电力，并且其中电子开关向处理器输出触发信号，以使得处理器能够锁存第一电平信号并向显示器提供目标DC电力模块。

9. 发明授权

US06605005B1 Detachable laser pointer for golf putter 失效
标题翻译：高尔夫推杆可拆卸激光笔
公开(公告)号：US06605005B1
公开(公告)日：2003-08-12
申请号：US10198084
申请日：2002-07-19
申请人： Tony Lin
发明人： Tony Lin
IPC分类号： A63B6936
CPC分类号： A63B69/3614 , A63B69/3632 , A63B69/3676 , A63B69/3685 , A63B2071/0694
摘要： A detachable laser pointer is constructed to include a mounting base, the mounting base having a smoothly arched rear coupling groove for coupling to the shaft of a golf putter and a locating plate of C-shaped cross section upwardly extended from the smoothly arched coupling groove for plugging in between the shaft and grip of the golf putter and a front receiving groove, a joint rotatably coupled to the receiving groove, a laser module pivoted to the joint and adapted for emitting a laser beam to aim the putter head of the golf putter to the hole.
摘要翻译：可拆卸的激光指示器被构造成包括安装基座，该安装基座具有平滑拱形的后连接槽，用于联接到高尔夫推杆的轴上，以及从平滑的拱形联接槽向上延伸的C形横截面的定位板，用于插入高尔夫推杆的轴和把手之间以及前接收槽，可旋转地联接到接收槽的接头，激光模块，其枢转到接头并适于发射激光束以使高尔夫推杆的推杆头对准那个洞。

10. 发明授权

US06190981B1 Method for fabricating metal oxide semiconductor 有权
标题翻译：金属氧化物半导体的制造方法
公开(公告)号：US06190981B1
公开(公告)日：2001-02-20
申请号：US09243740
申请日：1999-02-03
申请人： Tony Lin , Jih-Wen Chou
发明人： Tony Lin , Jih-Wen Chou
IPC分类号： H01L21336
CPC分类号： H01L29/66492 , H01L29/4983 , H01L29/4991 , H01L29/665
摘要： A method of for fabrication a metal oxide semiconductor transistor is described. A substrate with an isolation structure thereon is provided. A gate oxide layer is formed on the substrate. A polysilicon layer is formed on the gate oxide layer. The polysilicon layer is patterned to form a gate on the gate oxide layer. An offset spacer is formed on the sidewall of the gate. A source/drain extension is formed in the substrate on two sides of the gate by ion implantation. An insulating spacer is formed on the sidewall of the offset spacer. A source/drain region is formed in the substrate by ion implantation using the gate, the offset spacer and the insulating spacer as a mask. Salicide is formed on the gate and on the surface of the source/drain region. After forming the salicide, the offset spacer is removed. After removing the offset spacer, a halo doped region is formed in the substrate below the source/drain extension by ion implantation.
摘要翻译：描述了制造金属氧化物半导体晶体管的方法。提供其上具有隔离结构的基板。在衬底上形成栅氧化层。在栅氧化层上形成多晶硅层。图案化多晶硅层以在栅极氧化物层上形成栅极。在门的侧壁上形成偏移间隔物。通过离子注入在栅极两侧的衬底中形成源极/漏极延伸。绝缘间隔件形成在偏移间隔件的侧壁上。通过使用栅极，偏移间隔物和绝缘间隔物作为掩模的离子注入在衬底中形成源极/漏极区。在栅极和源极/漏极区域的表面上形成硅化物。在形成自对准硅胶后，去除偏移间隔物。在去除偏移间隔物之后，通过离子注入在源极/漏极延伸部下方的衬底中形成光晕掺杂区域。

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