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1. 发明申请

US20110233536A1 THIN FILM TRANSISTOR ARRAY PANEL AND METHOD OF FABRICATING THE SAME 审中-公开
标题翻译：薄膜晶体管阵列及其制造方法
公开(公告)号：US20110233536A1
公开(公告)日：2011-09-29
申请号：US12839705
申请日：2010-07-20
申请人： Young-Min KIM , Yeon-Taek JEONG , Seon-Pil JANG , Seung-Hwan CHO , Bo-Sung KIM , Tae-Young CHOI
发明人： Young-Min KIM , Yeon-Taek JEONG , Seon-Pil JANG , Seung-Hwan CHO , Bo-Sung KIM , Tae-Young CHOI
IPC分类号： H01L29/786 , H01L21/368
CPC分类号： H01L29/7869 , H01L27/1225 , H01L27/1285 , H01L27/1292 , H01L29/66969
摘要： A thin film transistor array panel including an oxide semiconductor layer realizing excellent stability and electrical characteristics and an easy method of manufacturing the same are provided. A thin film transistor array panel includes: a substrate; an oxide semiconductor layer disposed on the substrate and including a metal oxide selected from the group consisting of zinc oxide, tin oxide, and hafnium oxide; a gate electrode overlapping the oxide semiconductor layer; a gate insulating film disposed between the oxide semiconductor layer and the gate electrode; and a source electrode and a drain electrode disposed to at least partially overlap the oxide semiconductor layer and separated from each other.
摘要翻译：提供了包括实现优异的稳定性和电特性的氧化物半导体层的薄膜晶体管阵列面板及其制造方法。薄膜晶体管阵列面板包括：基板; 设置在所述基板上并且包括选自氧化锌，氧化锡和氧化铪的金属氧化物的氧化物半导体层; 与氧化物半导体层重叠的栅电极; 设置在所述氧化物半导体层和所述栅电极之间的栅极绝缘膜; 以及源电极和漏电极，其设置成至少部分地与氧化物半导体层重叠并且彼此分离。

2. 发明申请

US20120100649A1 METHOD FOR MANUFACTURING A FILM STRUCTURE 审中-公开
标题翻译：制造薄膜结构的方法
公开(公告)号：US20120100649A1
公开(公告)日：2012-04-26
申请号：US13100149
申请日：2011-05-03
申请人： Young-Min KIM , Seon-Pil JANG , Bo-Sung KIM , Yeon-Taek JEONG , Yong-Su LEE , Tae-Young CHOI , Ki-Beom LEE , Kang Moon JO
发明人： Young-Min KIM , Seon-Pil JANG , Bo-Sung KIM , Yeon-Taek JEONG , Yong-Su LEE , Tae-Young CHOI , Ki-Beom LEE , Kang Moon JO
IPC分类号： H01L33/08 , B05D3/06 , H01L21/336 , B05D5/00 , H01L21/26 , B05D3/02 , B05D5/06
CPC分类号： H01L29/7869 , H01L21/02667 , H01L21/324 , H01L29/41733 , H01L29/66765 , H01L29/66969 , H01L29/78633
摘要： Provided is a method for manufacturing a film structure.The method for manufacturing the film structure n includes forming a layer of a precursor material on a substrate, preheating the precursor material, and irradiating the precursor material with microwave radiation to form the film structure.
摘要翻译：提供一种膜结构的制造方法。制造薄膜结构体n的方法包括在基材上形成前体材料层，预热前体材料，并用微波辐射照射前体材料，形成薄膜结构体。

3. 发明申请

US20110254011A1 DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：显示基板及其制造方法
公开(公告)号：US20110254011A1
公开(公告)日：2011-10-20
申请号：US12902761
申请日：2010-10-12
申请人： Young-Min KIM , Bo-Sung KIM , Seon-Pil JANG , Seung-Hwan CHO , Kang-Moon JO
发明人： Young-Min KIM , Bo-Sung KIM , Seon-Pil JANG , Seung-Hwan CHO , Kang-Moon JO
IPC分类号： H01L29/04 , H01L21/84
CPC分类号： H01L29/78606 , H01L27/1214 , H01L27/124 , H01L27/1288
摘要： A display substrate includes a gate line, a gate insulation layer, a data line, a switching element, a protection insulation layer, a gate pad portion and a data pad portion. The gate insulation layer is disposed on the gate line. The switching element is connected to the gate line and the data line. The protection insulation layer is disposed on the switching element. The gate pad portion includes a first gate pad electrode which makes contact with an end portion of the gate line through a first hole formed through the gate insulation layer, and a second gate pad electrode which makes contact with the first gate pad electrode through a second hole formed through the protection insulation layer. The data pad portion includes a data pad electrode which makes contact with an end portion of the data line through a third hole formed through the protection insulation layer.
摘要翻译：显示基板包括栅极线，栅极绝缘层，数据线，开关元件，保护绝缘层，栅极焊盘部分和数据焊盘部分。栅极绝缘层设置在栅极线上。开关元件连接到栅极线和数据线。保护绝缘层设置在开关元件上。栅极焊盘部分包括通过形成在栅极绝缘层上的第一孔与栅极线的端部接触的第一栅极焊盘电极和通过第二栅极焊盘电极与第一栅极焊盘电极接触的第二栅极焊盘电极孔通过保护层形成。数据焊盘部分包括通过形成在保护绝缘层上的第三孔与数据线的端部接触的数据焊盘电极。

4. 发明申请

US20130234169A1 METHOD OF MANUFACTURING A THIN-FILM TRANSISTOR, METHOD OF MANUFACTURING A DISPLAY SUBSTRATE, AND DISPLAY SUBSTRATE 有权
标题翻译：制造薄膜晶体管的方法，制造显示基板的方法和显示基板
公开(公告)号：US20130234169A1
公开(公告)日：2013-09-12
申请号：US13619075
申请日：2012-09-14
申请人： Bo-Sung KIM , Jun-Ho SONG , Doo-Na KIM , Kang-Moon JO , Tae-Young CHOI , Masataka KANO , Yeon-Taek JEONG
发明人： Bo-Sung KIM , Jun-Ho SONG , Doo-Na KIM , Kang-Moon JO , Tae-Young CHOI , Masataka KANO , Yeon-Taek JEONG
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/7869 , H01L27/1225 , H01L27/1288 , H01L29/66969
摘要： In a method of manufacturing a thin film transistor, a gate electrode is formed on a first surface of a base substrate, a oxide semiconductor layer, insulation layer and photo resist layer are formed an the fast surface of the base substrate having the gate electrode. The insulation layer and the oxide semiconductor layer are patterned using a first photo resist pattern to form an etch-stopper and an active pattern. A source and a drain electrode are formed on the base substrate having the active pattern and the etch-stopper, the source electrode and the drain electrode are overlapped with both ends of the etch-stopper and spaced apart from each other. Therefore, a manufacturing cost may be decreased by omitting a mask when forming the active pattern and the etch-stopper.
摘要翻译：在制造薄膜晶体管的方法中，在具有栅电极的基底基板的快速表面上，在基底基板的第一表面，氧化物半导体层，绝缘层和光致抗蚀剂层上形成栅电极。使用第一光致抗蚀剂图案对绝缘层和氧化物半导体层进行构图，以形成蚀刻停止层和活性图案。源极和漏极形成在具有有源图案的基底基板上，并且蚀刻停止器，源极电极和漏电极与蚀刻停止器的两端重叠并且彼此间隔开。因此，当形成活性图案和蚀刻停止物时，可以通过省略掩模来降低制造成本。

5. 发明申请

US20120184058A1 LlQUID CRYSTAL DISPLAY AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：液晶显示器及其制造方法
公开(公告)号：US20120184058A1
公开(公告)日：2012-07-19
申请号：US13430280
申请日：2012-03-26
申请人： Tae-Young CHOI , Bo-Sung KIM , Young-Min KIM
发明人： Tae-Young CHOI , Bo-Sung KIM , Young-Min KIM
IPC分类号： H01L33/50
CPC分类号： H01L27/1225 , G02F1/136209 , G02F1/13624 , G02F2001/136222 , H01L27/1248 , H01L27/1288
摘要： The present invention provides a thin film transistor having high performance in a liquid crystal display, and a manufacturing method of a liquid crystal display according to an exemplary embodiment of the present invention that includes: forming a gate line including a gate electrode on a substrate; forming a gate insulating layer on the gate line; forming a data line including a source electrode and a drain electrode facing the source electrode on the gate insulating layer; forming a partition defining a pixel area and having an opening region exposing the gate insulating layer on the gate electrode, the source electrode and the drain electrode on the gate line, and the data line and the drain electrode; forming a semiconductor in the opening region; forming a color filter in the pixel area defined by the partition; and forming a pixel electrode connected to the drain electrode on the color filter.
摘要翻译：本发明提供了一种在液晶显示器中具有高性能的薄膜晶体管，以及根据本发明的示例性实施例的液晶显示器的制造方法，包括：在基板上形成包括栅电极的栅极线; 在栅极线上形成栅极绝缘层; 在所述栅极绝缘层上形成包括与所述源电极相对的源电极和漏电极的数据线; 形成限定像素区域并具有使栅极电极上的栅极绝缘层，栅极线上的源极电极和漏极电极以及数据线和漏极电极露出的开口区域; 在开口区域形成半导体; 在由分区限定的像素区域中形成滤色器; 以及在滤色器上形成连接到漏电极的像素电极。

6. 发明申请

US20120138965A1 DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：显示基板及其制造方法
公开(公告)号：US20120138965A1
公开(公告)日：2012-06-07
申请号：US13112381
申请日：2011-05-20
申请人： Tae-Young CHOI , Kang-Moon JO , Bo-Sung KIM , Young-Min KIM
发明人： Tae-Young CHOI , Kang-Moon JO , Bo-Sung KIM , Young-Min KIM
IPC分类号： H01L33/62
CPC分类号： H01L27/1288 , H01L27/1225 , H01L27/1292
摘要： A display substrate includes a base substrate, a data line, a gate line, a switching element, a self assembled monolayer (SAM) and a pixel electrode. The data line is formed on the base substrate. The gate line is formed across the data line. The switching element includes a source electrode electrically connected to the data line, a drain electrode spaced apart from the source electrode, a semiconductor pattern covering the source and drain electrodes, and a gate electrode electrically connected to the gate line and facing the semiconductor pattern. The SAM is disposed around the semiconductor pattern and a conductive pattern including the data line. The pixel electrode is electrically connected to the switching element.
摘要翻译：显示基板包括基底基板，数据线，栅极线，开关元件，自组装单层（SAM）和像素电极。数据线形成在基底基板上。栅极线跨越数据线形成。开关元件包括电连接到数据线的源电极，与源电极间隔开的漏电极，覆盖源电极和漏电极的半导体图案，以及电连接到栅极线并面向半导体图案的栅电极。 SAM围绕半导体图案设置，并且包括数据线的导电图案。像素电极电连接到开关元件。

7. 发明申请

US20130171779A1 COMPOSITION FOR MANUFACTURING OXIDE SEMICONDUCTOR AND METHOD FOR MANUFACTURING THIN-FILM TRANSISTOR SUBSTRATE USING THE SAME 有权
标题翻译：用于制造氧化物半导体的组合物和使用其制造薄膜晶体管衬底的方法
公开(公告)号：US20130171779A1
公开(公告)日：2013-07-04
申请号：US13670120
申请日：2012-11-06
申请人： Yeon-Taek JEONG , Bo-Sung KIM , Doo-Hyoung LEE , Doo-Na KIM , Eun-Hye PARK , Dong-Lim KIM , Hyun-Jae KIM , You-Seung RIM , Hyun-Soo LIM
发明人： Yeon-Taek JEONG , Bo-Sung KIM , Doo-Hyoung LEE , Doo-Na KIM , Eun-Hye PARK , Dong-Lim KIM , Hyun-Jae KIM , You-Seung RIM , Hyun-Soo LIM
IPC分类号： C09D5/00 , H01L29/66
CPC分类号： C09D5/00 , C04B35/01 , C04B35/453 , C04B35/457 , C04B35/62222 , C04B2235/3284 , C04B2235/3286 , C04B2235/3293 , C04B2235/443 , C04B2235/444 , C04B2235/449 , H01L27/1225 , H01L29/22 , H01L29/24 , H01L29/66742 , H01L29/66969 , H01L29/7869
摘要： According to a method of manufacturing a thin film transistor substrate, a composition including a metal oxalate and a solvent for manufacturing an oxide semiconductor is coated to form a thin film, the thin film is annealed, and the thin film is patterned to form a semiconductor pattern.
摘要翻译：根据制造薄膜晶体管基板的方法，涂覆包含草酸金属盐和用于制造氧化物半导体的溶剂的组合物以形成薄膜，对薄膜进行退火，并将薄膜图案化以形成半导体模式。

8. 发明申请

US20080079011A1 ELECTROPHORETIC DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME 审中-公开
标题翻译：电泳显示装置及其制造方法
公开(公告)号：US20080079011A1
公开(公告)日：2008-04-03
申请号：US11866341
申请日：2007-10-02
申请人： Keun-Kyu SONG , Bo-Sung KIM , Seung-Hwan CHO
发明人： Keun-Kyu SONG , Bo-Sung KIM , Seung-Hwan CHO
IPC分类号： H01L33/00 , H01L21/336
CPC分类号： G02F1/1368 , G02F1/167 , G02F2001/136231
摘要： A display substrate includes a thin film transistor and a pixel electrode. The thin film transistor includes source and drain electrodes, an active layer covering the source and drain electrodes, and a gate electrode formed on the active layer. The pixel electrode includes the same material as that of the gate electrode, and is formed in the process of forming the gate electrode to reduce the number of process steps and the number of masks.
摘要翻译：显示基板包括薄膜晶体管和像素电极。薄膜晶体管包括源极和漏极，覆盖源极和漏极的有源层和形成在有源层上的栅电极。像素电极包括与栅电极相同的材料，并且在形成栅电极的过程中形成，以减少处理步骤的数量和掩模的数量。

9. 发明申请

US20070278492A1 THIN FILM TRANSISTOR ARRAY PANEL AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：薄膜晶体管阵列及其制造方法
公开(公告)号：US20070278492A1
公开(公告)日：2007-12-06
申请号：US11756764
申请日：2007-06-01
申请人： Keun-Kyu SONG , Bo-Sung KIM , Seung-Hwan CHO
发明人： Keun-Kyu SONG , Bo-Sung KIM , Seung-Hwan CHO
IPC分类号： H01L29/04 , H01L21/84
CPC分类号： H01L27/283 , H01L27/3274 , H01L27/3276 , H01L29/41733 , H01L51/0036 , H01L51/0558
摘要： A thin film transistor array panel including a substrate, a plurality of data lines disposed on the substrate, an interlayer insulating layer disposed on the data lines and including contact holes through which the data lines are exposed, a plurality of source electrodes, each of the source electrodes disposed on the interlayer insulating layer and connected to the data line through the contact hole, a plurality of pixel electrodes, each of the pixel electrodes disposed on the interlayer insulating layer and including a drain electrode that faces a source electrode, organic semiconductors disposed on and partially overlapping the source electrodes and the drain electrodes, a gate insulating layer disposed on the organic semiconductors and gate lines disposed on the gate insulating layer and including gate electrodes overlapping the organic semiconductors.
摘要翻译：一种薄膜晶体管阵列面板，包括基板，设置在基板上的多条数据线，设置在数据线上的层间绝缘层，并且包括数据线暴露的接触孔，多个源电极，源电极，设置在层间绝缘层上并通过接触孔与数据线连接，多个像素电极，每个像素电极设置在层间绝缘层上，并且包括面对源电极的漏电极，设置有机半导体在源电极和漏极之间并部分重叠;栅极绝缘层，设置在有机半导体上，栅极线设置在栅极绝缘层上，并且包括与有机半导体重叠的栅电极。

10. 发明申请

US20080073648A1 THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：薄膜晶体管阵列及其制造方法
公开(公告)号：US20080073648A1
公开(公告)日：2008-03-27
申请号：US11859033
申请日：2007-09-21
申请人： Tae-Young CHOI , Bo-Sung KIM
发明人： Tae-Young CHOI , Bo-Sung KIM
IPC分类号： H01L51/10 , H01L29/04
CPC分类号： H01L27/283 , H01L51/102
摘要： A thin film transistor array panel includes a gate electrode formed on a substrate, a gate insulator covering the gate electrode, a source electrode including a first transparent material and disposed on the gate insulator, a drain electrode including a second transparent material and disposed on the gate insulator, and an organic semiconductor formed on the source and drain electrodes, and the gate insulator therebetween. The source electrode includes a first boundary opposing a second boundary of the drain electrode relative to the gate electrode, and the opposing boundaries overlap boundaries of the gate electrode with an alignment margin in the range of about −1 to +5 microns.
摘要翻译：薄膜晶体管阵列面板包括形成在基板上的栅电极，覆盖栅电极的栅极绝缘体，包括第一透明材料并设置在栅极绝缘体上的源电极，包括第二透明材料的漏电极，栅极绝缘体和形成在源极和漏极上的有机半导体以及栅极绝缘体之间。源电极包括与漏电极相对于栅电极的第二边界相对的第一边界，并且相对的边界与栅电极的边界重叠，取向余量在约-1至+5微米的范围内。

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