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    • 3. 发明授权
    • Driving circuit for non destructive non volatile ferroelectric random access memory
    • 非破坏性非挥发性铁电随机存取存储器的驱动电路
    • US06392921B1
    • 2002-05-21
    • US09900184
    • 2001-07-09
    • Yong Tae KimChun Keun KimSeong Il KimSun Il Shim
    • Yong Tae KimChun Keun KimSeong Il KimSun Il Shim
    • G11C1100
    • G11C11/22
    • The driving circuit for an NDRO-FRAM includes several NDRO-FRAM (Non Destructive Non Volatile Ferroelectric Random Access Memory) cells each having a drain, a bulk, a source and a gate and arranged as a matrix. A plurality of reading word lines are separately connected to each drain of the NDRO-FRAM cells arranged in columns, and a plurality of writing word lines are separately connected to each bulk of the NDRO-FRM cells arranged in columns. Several data level transmission circuits for transmitting a data level of the NDRO-FRAM cells are also included, which are connected to a plurality of data level transmission circuits. Accordingly, the present invention is capable of reading and writing of data on the NDRO-FRAM cells.
    • NDRO-FRAM的驱动电路包括几个NDRO-FRAM(非破坏性非易失性铁电随机存取存储器)单元,每个单元具有漏极,体积,源极和栅极并且被布置为矩阵。 多个读取字线分别连接到排列成列的NDRO-FRAM单元的每个漏极,并且多个写入字线分别连接到以列布置的NDRO-FRM单元的大部分。 还包括用于发送NDRO-FRAM单元的数据电平的几个数据电平传输电路,其连接到多个数据电平传输电路。 因此,本发明能够读取和写入NDRO-FRAM单元上的数据。