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1. 发明授权

US08352655B2 Packet communication device which selects an appropriate operation mode 有权
标题翻译：分组通信设备，其选择适当的操作模式
公开(公告)号：US08352655B2
公开(公告)日：2013-01-08
申请号：US12007658
申请日：2008-01-14
申请人： Jun Suzuki , Youichi Hidaka , Junichi Higuchi , Shigeyuki Yanagimachi , Takashi Yoshikawa
发明人： Jun Suzuki , Youichi Hidaka , Junichi Higuchi , Shigeyuki Yanagimachi , Takashi Yoshikawa
IPC分类号： G06F13/00 , G06F3/00 , G06F13/42 , G06F13/36 , G06F13/20
CPC分类号： G06F13/387
摘要： A packet communication device autonomously selects an appropriate operation mode according to a connection environment to an external device before a service of the device is started. When the device is connected to the external buses, connection interface units notify an external device discrimination unit of connection of the device. The external device discrimination unit issues a polling packet to the connected device, discriminates the connected external device on the basis of the response packet, and notifies an operation mode switching unit. The operation mode switching unit selects an operation mode conforming to a connection environment of the packet communication device to the external device and switches the operation mode of the device to the mode. The selection of the operation modes is completed before the entire device or a portion of the device which is influenced by the selection of the operation mode starts a service to the external device to which the packet communication device is connected.
摘要翻译：分组通信设备在开始服务设备之前，根据与外部设备的连接环境自主选择适当的操作模式。当设备连接到外部总线时，连接接口单元通知设备连接的外部设备鉴别单元。外部设备识别单元向所连接的设备发出轮询分组，基于响应分组来识别所连接的外部设备，并通知操作模式切换单元。操作模式切换单元根据外部设备选择符合分组通信设备的连接环境的操作模式，并将设备的操作模式切换到该模式。操作模式的选择在整个设备或受到选择操作模式影响的设备的一部分开始对分组通信设备连接到的外部设备的服务之前完成。

2. 发明授权

US08346996B2 Information processing system 有权
标题翻译：信息处理系统
公开(公告)号：US08346996B2
公开(公告)日：2013-01-01
申请号：US13062255
申请日：2009-07-14
申请人： Youichi Hidaka , Junichi Higuchi , Takashi Yoshikawa
发明人： Youichi Hidaka , Junichi Higuchi , Takashi Yoshikawa
IPC分类号： G06F13/00
CPC分类号： G06F11/2043 , G06F11/2038 , G06F11/2097 , H04L69/32
摘要： An information processing system includes a plurality of processors for executing processing according to a predetermined processing request sent from a different device; a switching device for performing data transfer between the individual processors and the different device; and a storage device which is connected to the switching device and enables data transfer to and from the individual processors. At least one of the processors includes a processing request storing unit for storing processing request data sent from the different device to the processor, into the storage device by data transfer. At least another one of the processors includes a processing request reading unit for reading the processing request data stored in the storage device from the storage device by data transfer.
摘要翻译：信息处理系统包括：多个处理器，用于根据从不同设备发送的预定处理请求执行处理; 用于在各个处理器和不同设备之间执行数据传送的切换装置; 以及存储装置，其连接到所述开关装置，并且能够进行到各个处理器的数据传送。至少一个处理器包括处理请求存储单元，用于通过数据传送将从不同设备发送到处理器的处理请求数据存储到存储设备中。至少另一个处理器包括处理请求读取单元，用于通过数据传送从存储装置读取存储在存储装置中的处理请求数据。

3. 发明申请

US20120016949A1 DISTRIBUTED PROCESSING SYSTEM, INTERFACE, STORAGE DEVICE, DISTRIBUTED PROCESSING METHOD, DISTRIBUTED PROCESSING PROGRAM 审中-公开
标题翻译：分布式处理系统，接口，存储设备，分布式处理方法，分布式处理程序
公开(公告)号：US20120016949A1
公开(公告)日：2012-01-19
申请号：US13258866
申请日：2010-03-15
申请人： Junichi Higuchi , Youichi Hidaka , Takashi Yoshikawa
发明人： Junichi Higuchi , Youichi Hidaka , Takashi Yoshikawa
IPC分类号： G06F15/16 , G06F15/167
CPC分类号： H04L67/1002
摘要： A distributed processing system which distributes a load of a request from a client without being restricted by a processing status and processing performance of transfer processing means is provided:A distributed processing system includes: processing means for processing a request from request means and generating a reply; a switch connected to the processing means; memory means connected to the switch; and an interface, connected to a network, the request means being connected to, and to the switch, for transferring the request from the request means to the memory means and for transferring the reply to the request means, wherein the memory means comprises: first control means for determining whether State management is required for the transferred request; first storage means for storing a request that requires the State management; and second storage means for storing a request that does not require the State management, the first control means eliminates the request stored in the first or the second storage means, based on an instruction from the processing means, and the processing means comprises second control means for detecting a load, reading out the request stored in the first or the second storage means according to the load, and outputting the generated reply to the interface.
摘要翻译：提供了一种分布式处理系统，其分配来自客户端的请求的负载而不受处理状态的限制和传送处理装置的处理性能的限制。分布式处理系统包括：处理装置，用于处理来自请求装置的请求并产生回复 ; 连接到处理装置的开关; 连接到开关的存储器装置; 以及连接到网络的接口，所述请求装置连接到交换机，用于将请求从请求装置传送到存储器装置，并将答复传送到请求装置，其中存储装置包括：第一用于确定所转移的请求是否需要状态管理的控制装置; 用于存储需要状态管理的请求的第一存储装置; 以及第二存储装置，用于存储不需要状态管理的请求，第一控制装置根据来自处理装置的指令消除存储在第一或第二存储装置中的请求，并且处理装置包括第二控制装置用于检测负载，根据负载读出存储在第一或第二存储装置中的请求，并将生成的回复输出到接口。

4. 发明申请

US20110064089A1 PCI EXPRESS SWITCH, PCI EXPRESS SYSTEM, AND NETWORK CONTROL METHOD 有权
标题翻译： PCI EXPRESS SWITCH，PCI EXPRESS SYSTEM和网络控制方法
公开(公告)号：US20110064089A1
公开(公告)日：2011-03-17
申请号：US12992164
申请日：2009-05-18
申请人： Youichi Hidaka , Takashi Yoshikawa , Junichi Higuchi , Jun Suzuki
发明人： Youichi Hidaka , Takashi Yoshikawa , Junichi Higuchi , Jun Suzuki
IPC分类号： H04L12/56
CPC分类号： G06F13/4022
摘要： Provided are a first PCI-PCI bridge that handles Multi Root to connect to a plurality of root complexes; a second PCI-PCI bridge that connects to an endpoint; a virtual PCI Express switch that performs a switching process between the first and second PCI-PCI bridges; and a network control device that transfers data that is to be processed in the virtual PCI Express switch to an external switch through a network without passing through a PCI-PCI bridge.
摘要翻译：提供了第一个PCI-PCI桥接器，其处理多根以连接到多个根复合体; 连接到端点的第二个PCI-PCI桥; 一个虚拟PCI Express交换机，执行第一和第二PCI-PCI桥之间的切换过程; 以及网络控制装置，其通过网络将通过网络将要在虚拟PCI Express交换机中处理的数据传送到外部交换机，而不通过PCI-PCI桥接器。

5. 发明授权

US09178665B2 Communication apparatus, communication system, absent packet detecting method and absent packet detecting program 有权
标题翻译：通信装置，通信系统，缺少分组检测方法和缺少分组检测程序
公开(公告)号：US09178665B2
公开(公告)日：2015-11-03
申请号：US13531637
申请日：2012-06-25
申请人： Nobuyuki Enomoto , Hideyuki Shimonishi , Junichi Higuchi , Youichi Hidaka , Jun Suzuki , Takashi Yoshikawa
发明人： Nobuyuki Enomoto , Hideyuki Shimonishi , Junichi Higuchi , Youichi Hidaka , Jun Suzuki , Takashi Yoshikawa
IPC分类号： H04L1/18 , H04L12/707 , H04L12/703 , H04L1/00
CPC分类号： H04L1/1841 , H04L1/1874 , H04L1/188 , H04L45/24 , H04L45/28 , H04L2001/0096
摘要： Any packet loss is detected very quickly by means of only a series of sequence number in a multi-path environment where a transmitter and a receiver are connected to each other by way of a plurality of networks when no inversion of sequence arises in any of the networks. A communication apparatus includes a plurality of sequence buffers arranged at each network to accumulate packets until a sequence acknowledgement and an absence detecting section adapted to determine the occurrence of an absence of a packet when one or more packets are accumulated in all the sequence buffers. With this arrangement, the absence detecting section of the receiver monitors the packets staying in the sequence guaranteeing buffer arranged in each of the network, paying attention to the characteristic that packets are stored in the sequence buffers of all the networks when a packet loss takes place.
摘要翻译：在多路径环境中只有一系列的序列号，任何分组丢失被非常快速地检测到，其中发射机和接收机通过多个网络彼此连接，当序列的任何网络。通信装置包括布置在每个网络处的多个序列缓冲器，用于累积分组，直到序列确认和不存在检测部分适于在所有序列缓冲器中累积一个或多个分组时确定是否存在分组。利用这种安排，接收机的缺席检测部分监视保留在每个网络中的序列保证缓冲器中的数据包，注意发生分组丢失时分组存储在所有网络的序列缓冲器中的特性。

6. 发明申请

US20140059250A1 NETWORK SYSTEM 有权
标题翻译：网络系统
公开(公告)号：US20140059250A1
公开(公告)日：2014-02-27
申请号：US14003518
申请日：2012-01-19
申请人： Jun Suzuki , Youichi Hidaka , Junichi Higuchi , Takashi Yoshikawa , Teruyuki Baba , Nobuharu Kami
发明人： Jun Suzuki , Youichi Hidaka , Junichi Higuchi , Takashi Yoshikawa , Teruyuki Baba , Nobuharu Kami
IPC分类号： H04L12/40
CPC分类号： H04L12/40 , G06F13/385 , G06F2213/0026 , G06F2213/3808 , H04L43/0817
摘要： A network system of the present invention includes a computer and a device connected via a network, and a system management device. The computer and the device include, respectively, bridges that encapsulate transmission/reception data transmitted and received to and from each other and transmit and receive the data to and from each other via the network. Each of the bridges includes a control data transmitting means for generating control data for controlling the state of the system based on control auxiliary data issued from the computer or the device and used for controlling the state of the system, and transmitting the control data to the system management device via the network. The system management device includes a system controlling means for controlling the state of the system in accordance with the control data received thereby.
摘要翻译：本发明的网络系统包括计算机和通过网络连接的设备和系统管理设备。计算机和设备分别包括封装彼此发送和接收的发送/接收数据的网桥，并经由网络从彼此发送和接收数据。每个桥包括控制数据发送装置，用于基于从计算机或设备发出的用于控制系统的状态的控制辅助数据产生用于控制系统的状态的控制数据，并将控制数据发送到系统管理设备通过网络。系统管理装置包括系统控制装置，用于根据从其接收的控制数据来控制系统的状态。

7. 发明授权

US08635496B2 Trouble analysis apparatus 有权
标题翻译：故障分析仪
公开(公告)号：US08635496B2
公开(公告)日：2014-01-21
申请号：US13057365
申请日：2009-08-04
申请人： Youichi Hidaka , Takashi Yoshikawa , Junichi Higuchi
发明人： Youichi Hidaka , Takashi Yoshikawa , Junichi Higuchi
IPC分类号： G06F11/00
CPC分类号： G06F11/079 , G06F11/0706
摘要： A trouble analysis apparatus is provided which includes: a system topology storing portion; an error detection information receiving portion which collects error detection information; and a trouble source determination portion which, based on both the error detection information collected by the error detection information receiving portion and system topology information stored in the system topology information storing portion, determines a trouble source functional element that is presumed as a functional element which is a source of a system trouble. Links included in the system topology information have information indicating spreading directions of error operations between the functional elements when trouble occurs. When the trouble source detection portion receives the error detection information with regard to multiple error functional elements, the trouble source determination portion sequentially selects one of the multiple error functional elements. The trouble source detection portion determines whether or not directions from the selected error functional element to other error functional elements conform to the spreading directions included in the system topology information. The trouble source determination portion determines the selected error functional element as the trouble source functional element when the spreading directions are conformable.
摘要翻译：提供一种故障分析装置，包括：系统拓扑存储部; 错误检测信息接收部分，其收集错误检测信息; 以及故障源确定部，其基于由所述错误检测信息接收部收集的所述错误检测信息和存储在所述系统拓扑信息存储部中的系统拓扑信息，确定被认为是功能元素的故障源功能元件，是系统麻烦的根源。包括在系统拓扑信息中的链接具有指示当故障发生时功能元件之间的错误操作的扩展方向的信息。当故障源检测部分接收关于多个错误功能元件的错误检测信息时，故障源确定部分依次选择多个误差功能元件中的一个。故障源检测部分确定从所选择的误差功能元件到其他误差功能元件的方向是否符合包括在系统拓扑信息中的扩展方向。当扩散方向一致时，故障源确定部分将所选择的误差功能元件确定为故障源功能元件。

8. 发明授权

US08233483B2 Communication apparatus, communication system, absent packet detecting method and absent packet detecting program 有权
标题翻译：通信装置，通信系统，缺少分组检测方法和缺少分组检测程序
公开(公告)号：US08233483B2
公开(公告)日：2012-07-31
申请号：US12200508
申请日：2008-08-28
申请人： Nobuyuki Enomoto , Hideyuki Shimonishi , Junichi Higuchi , Youichi Hidaka , Jun Suzuki , Takashi Yoshikawa
发明人： Nobuyuki Enomoto , Hideyuki Shimonishi , Junichi Higuchi , Youichi Hidaka , Jun Suzuki , Takashi Yoshikawa
IPC分类号： H04L12/28
CPC分类号： H04L1/1841 , H04L1/1874 , H04L1/188 , H04L45/24 , H04L45/28 , H04L2001/0096
摘要： Any packet loss is detected very quickly by means of only a series of sequence number in a multi-path environment where a transmitter and a receiver are connected to each other by way of a plurality of networks when no inversion of sequence arises in any of the networks. A communication apparatus includes a plurality of sequence buffers arranged at each network to accumulate packets until a sequence acknowledgement and an absence detecting section adapted to determine the occurrence of an absence of a packet when one or more packets are accumulated in all the sequence buffers. With this arrangement, the absence detecting section of the receiver monitors the packets staying in the sequence guaranteeing buffer arranged in each of the network, paying attention to the characteristic that packets are stored in the sequence buffers of all the networks when a packet loss takes place.
摘要翻译：在多路径环境中只有一系列的序列号，任何分组丢失被非常快速地检测到，其中发射机和接收机通过多个网络彼此连接，当序列的任何网络。通信装置包括布置在每个网络处的多个序列缓冲器，用于累积分组，直到序列确认和不存在检测部分适于在所有序列缓冲器中累积一个或多个分组时确定是否存在分组。利用这种安排，接收机的不存在检测部分监视保留在每个网络中的序列保证缓冲器中的数据包，注意发生分组丢失时分组存储在所有网络的序列缓冲器中的特性。

9. 发明申请

US20120110233A1 I/O SYSTEM, DOWNSTREAM PCI EXPRESS BRIDGE, INTERFACE SHARING METHOD, AND PROGRAM 有权
标题翻译： I / O系统，下行PCI Express Express桥接器，接口共享方法和程序
公开(公告)号：US20120110233A1
公开(公告)日：2012-05-03
申请号：US13382262
申请日：2010-06-11
申请人： Junichi Higuchi , Youichi Hidaka , Jun Suzuki , Takashi Yoshikawa
发明人： Junichi Higuchi , Youichi Hidaka , Jun Suzuki , Takashi Yoshikawa
IPC分类号： G06F13/20 , G06F13/00
CPC分类号： G06F13/4022 , G06F2213/0026
摘要： Fault tolerance is improved, a functional limitation at the time of start-up of an I/O system is avoided, and a start-up time is shortened. A downstream PCI Express bridge sets a PCI Express device connected to the downstream PCI Express bridge itself, among a plurality of single root-compatible PCI Express devices shared by a plurality of root complexes connected to a plurality of upstream PCI Express bridges that exchange data with the downstream PC Express bridge itself through a network, controls and monitors a state of a physical link with the PCI Express device connected to the downstream PCI Express bridge itself, and performs monitoring and notification of an error of the PCI Express device connected to the downstream PCI Express bridge itself.
摘要翻译：提高了容错能力，避免了I / O系统启动时的功能限制，缩短启动时间。下游PCI Express桥接器设置连接到下游PCI Express桥本身的PCI Express设备，其中多个单根根兼容PCI Express设备由连接到多个上游PCI Express桥的多个根配置共享的多个单根根兼容PCI Express设备中，下游PC Express桥本身通过网络，控制和监视与连接到下游PCI Express桥本身的PCI Express设备的物理链路的状态，并执行连接到下游的PCI Express设备的错误的监视和通知 PCI Express桥本身。

10. 发明申请

US20110213902A1 INFORMATION PROCESSING SYSTEM 有权
标题翻译：信息处理系统
公开(公告)号：US20110213902A1
公开(公告)日：2011-09-01
申请号：US13062255
申请日：2009-07-14
申请人： Youichi Hidaka , Junichi Higuchi , Takashi Yoshikawa
发明人： Youichi Hidaka , Junichi Higuchi , Takashi Yoshikawa
IPC分类号： G06F13/14
CPC分类号： G06F11/2043 , G06F11/2038 , G06F11/2097 , H04L69/32
摘要： An information processing system includes a plurality of processors for executing processing according to a predetermined processing request sent from a different device; a switching device for performing data transfer between the individual processors and the different device; and a storage device which is connected to the switching device and enables data transfer to and from the individual processors. At least one of the processors includes a processing request storing unit for storing processing request data sent from the different device to the processor, into the storage device by data transfer. At least another one of the processors includes a processing request reading unit for reading the processing request data stored in the storage device from the storage device by data transfer.
摘要翻译：信息处理系统包括：多个处理器，用于根据从不同设备发送的预定处理请求执行处理; 用于在各处理器和不同装置之间执行数据传送的切换装置; 以及存储装置，其连接到所述开关装置，并且能够进行到各个处理器的数据传送。至少一个处理器包括处理请求存储单元，用于通过数据传送将从不同设备发送到处理器的处理请求数据存储到存储设备中。至少另一个处理器包括处理请求读取单元，用于通过数据传送从存储装置读取存储在存储装置中的处理请求数据。

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