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1. 发明授权

US07979038B2 PLL modulation circuit, radio transmission device, and radio communication device 有权
标题翻译： PLL调制电路，无线电传输设备和无线电通信设备
公开(公告)号：US07979038B2
公开(公告)日：2011-07-12
申请号：US12160874
申请日：2007-01-16
申请人： Yosuke Mitani , Shunsuke Hirano , Kaoru Ishida
发明人： Yosuke Mitani , Shunsuke Hirano , Kaoru Ishida
IPC分类号： H04B1/04
CPC分类号： H03L7/1976 , H03C3/0908 , H03C3/0925 , H03C3/0933 , H03C3/0941 , H03C3/095 , H03C3/0966
摘要： Provided are a PLL modulation circuit, a radio transmission device, and a radio communication device capable of maintaining a modulation accuracy for modulation of a wide band. The PLL modulation circuit (100) includes: a PLL unit (110), first modulation signal input means for inputting a first modulation signal to a divider (112) or a phase comparator (113) of the PLL unit (110); second modulation signal input means for DA converting the digital modulation signal in a DA converter (116) to generate an analog second modulation signal and inputting it to a voltage control oscillator (111) of the PLL unit (110); a second divider for dividing the output signal of the voltage control oscillator (111); and control means for generating a center frequency control signal, a gain control signal, and a second division ration control signal according to the channel selection signal and the control voltage inputted to the voltage control oscillator (111) and supplying them to the divider (112), the DA converter (116), and the second divider (114), respectively.
摘要翻译：提供了能够维持宽带调制的调制精度的PLL调制电路，无线发送装置以及无线通信装置。 PLL调制电路（100）包括：PLL单元（110），用于将第一调制信号输入到PLL单元（110）的分频器（112）或相位比较器（113）的第一调制信号输入装置; 第二调制信号输入装置，用于在DA转换器（116）中转换数字调制信号，以产生模拟第二调制信号并将其输入到PLL单元（110）的电压控制振荡器（111）; 用于分压电压控制振荡器（111）的输出信号的第二分频器; 以及控制装置，用于根据输入到电压控制振荡器（111）的通道选择信号和控制电压产生中心频率控制信号，增益控制信号和第二分频控制信号，并将其提供给分频器（112）），DA转换器（116）和第二分频器（114）。

2. 发明申请

US20100272222A1 PLL MODULATION CIRCUIT, RADIO TRANSMISSION DEVICE, AND RADIO COMMUNICATION DEVICE 有权
标题翻译： PLL调制电路，无线电传输设备和无线电通信设备
公开(公告)号：US20100272222A1
公开(公告)日：2010-10-28
申请号：US12160874
申请日：2007-01-16
申请人： Yosuke Mitani , Shunsuke Hirano , Kaoru Ishida
发明人： Yosuke Mitani , Shunsuke Hirano , Kaoru Ishida
IPC分类号： H03D3/24
CPC分类号： H03L7/1976 , H03C3/0908 , H03C3/0925 , H03C3/0933 , H03C3/0941 , H03C3/095 , H03C3/0966
摘要： Provided are a PLL modulation circuit, a radio transmission device, and a radio communication device capable of maintaining a modulation accuracy for modulation of a wide band. The PLL modulation circuit (100) includes: a PLL unit (110), first modulation signal input means for inputting a first modulation signal to a divider (112) or a phase comparator (113) of the PLL unit (110); second modulation signal input means for DA converting the digital modulation signal in a DA converter (116) to generate an analog second modulation signal and inputting it to a voltage control oscillator (111) of the PLL unit (110); a second divider for dividing the output signal of the voltage control oscillator (111); and control means for generating a center frequency control signal, a gain control signal, and a second division ration control signal according to the channel selection signal and the control voltage inputted to the voltage control oscillator (111) and supplying them to the divider (112), the DA converter (116), and the second divider (114), respectively.
摘要翻译：提供了能够维持宽带调制的调制精度的PLL调制电路，无线发送装置以及无线通信装置。 PLL调制电路（100）包括：PLL单元（110），用于将第一调制信号输入到PLL单元（110）的分频器（112）或相位比较器（113）的第一调制信号输入装置; 第二调制信号输入装置，用于在DA转换器（116）中转换数字调制信号，以产生模拟第二调制信号并将其输入到PLL单元（110）的压控振荡器（111）; 用于分压电压控制振荡器（111）的输出信号的第二分频器; 以及控制装置，用于根据输入到电压控制振荡器（111）的通道选择信号和控制电压产生中心频率控制信号，增益控制信号和第二分频控制信号，并将其提供给分频器（112）），DA转换器（116）和第二分频器（114）。

3. 发明申请

US20050242889A1 PLL modulation circuit and polar modulation apparatus 失效
标题翻译： PLL调制电路和极化调制装置
公开(公告)号：US20050242889A1
公开(公告)日：2005-11-03
申请号：US11078704
申请日：2005-03-14
申请人： Yosuke Mitani , Shunsuke Hirano
发明人： Yosuke Mitani , Shunsuke Hirano
IPC分类号： H03C5/00 , H03L7/00
CPC分类号： H03C5/00 , H03C3/0916 , H03C3/095 , H03C3/0991
摘要： First and second calibration signals (308, 309) are sent to a frequency divider (102) and an adder (116) of a PLL section (100A), demodulated in a demodulator (111), filtered through a low pass filter (113) and a high pass filter (114) and thereafter sent to a modulation signal control circuit (115). The modulation signal control circuit (115) generates control information (318) in comparison with the phase and amplitude of the first and second calibration signals (308 and 309) and sends the control information (318) to a modulation control signal generator (106). Modulation control signal generator (106) holds the control information (318) and controls the values of the first modulation signal and second modulation signal sent to the frequency divider (102) and adder (116) on the based on the control information (318) held in modulation operation.
摘要翻译：第一和第二校准信号（308,309）被发送到PLL部分（100A）的分频器（102）和加法器（116），在解调器（111）中解调，通过低通滤波器（113）滤波）和高通滤波器（114），然后发送到调制信号控制电路（115）。调制信号控制电路（115）与第一和第二校准信号（308和309）的相位和幅度相比产生控制信息（318），并将控制信息（318）发送到调制控制信号发生器（106）。调制控制信号发生器（106）保存控制信息（318），并根据控制信息（318）控制发送到分频器（102）和加法器（116）的第一调制信号和第二调制信号的值，举行调制操作。

4. 发明授权

US07157985B2 PLL modulation circuit and polar modulation apparatus 失效
标题翻译： PLL调制电路和极化调制装置
公开(公告)号：US07157985B2
公开(公告)日：2007-01-02
申请号：US11078704
申请日：2005-03-14
申请人： Yosuke Mitani , Shunsuke Hirano
发明人： Yosuke Mitani , Shunsuke Hirano
IPC分类号： H03C3/00
CPC分类号： H03C5/00 , H03C3/0916 , H03C3/095 , H03C3/0991
摘要： First and second calibration signals (308, 309) are sent to a frequency divider (102) and an adder (116) of a PLL section (100A), demodulated in a demodulator (111), filtered through a low pass filter (113) and a high pass filter (114) and thereafter sent to a modulation signal control circuit (115). The modulation signal control circuit (115) generates control information (318) in comparison with the phase and amplitude of the first and second calibration signals (308 and 309) and sends the control information (318) to a modulation control signal generator (106). Modulation control signal generator (106) holds the control information (318) and controls the values of the first modulation signal and second modulation signal sent to the frequency divider (102) and adder (116) on the based on the control information (318) held in modulation operation.
摘要翻译：第一和第二校准信号（308,309）被发送到PLL部分（100A）的分频器（102）和加法器（116），在解调器（111）中解调，通过低通滤波器（113）滤波）和高通滤波器（114），然后发送到调制信号控制电路（115）。调制信号控制电路（115）与第一和第二校准信号（308和309）的相位和幅度相比产生控制信息（318），并将控制信息（318）发送到调制控制信号发生器（106）。调制控制信号发生器（106）保存控制信息（318），并根据控制信息（318）控制发送到分频器（102）和加法器（116）的第一调制信号和第二调制信号的值，举行调制操作。

5. 发明授权

US08823567B2 Resonator, delta-sigma modulator, and wireless communication device 有权
标题翻译：谐振器，Δ-Σ调制器和无线通信设备
公开(公告)号：US08823567B2
公开(公告)日：2014-09-02
申请号：US13534716
申请日：2012-06-27
申请人： Yosuke Mitani , Kazuo Matsukawa , Masao Takayama , Koji Obata , Shiro Dosho
发明人： Yosuke Mitani , Kazuo Matsukawa , Masao Takayama , Koji Obata , Shiro Dosho
IPC分类号： H03M3/00 , H03H11/04
CPC分类号： H03H11/04 , H03H2011/0488 , H03M3/404
摘要： Two T filters, one of which includes two resistive elements and one capacitive element and the other of which includes two capacitive elements and one resistive element, are inserted in a negative-feedback section of an operational amplifier, and a resistive element and a capacitive element are connected between each of intermediate nodes and a signal input terminal. A resistive element and a capacitive element which are connected to each other in parallel are connected between the signal input terminal and an inverting input terminal of the operational amplifier. With this configuration, overall admittances where elements connected to the corresponding intermediate nodes are in parallel connection are equal to each other.
摘要翻译：两个T滤波器，其中一个包括两个电阻元件和一个电容元件，另一个包括两个电容元件和一个电阻元件，插入到运算放大器的负反馈部分中，电阻元件和电容元件连接在每个中间节点和信号输入端子之间。并联连接的电阻元件和电容元件连接在信号输入端子和运算放大器的反相输入端子之间。利用这种配置，连接到对应的中间节点的元件并联连接的整体导纳彼此相等。

6. 发明申请

US20110169677A1 RESONATOR AND OVERSAMPLING A/D CONVERTER 有权
标题翻译：谐振器和超滤A / D转换器
公开(公告)号：US20110169677A1
公开(公告)日：2011-07-14
申请号：US13073335
申请日：2011-03-28
申请人： Shiro DOSHO , Kazuo Matsukawa , Yosuke Mitani
发明人： Shiro DOSHO , Kazuo Matsukawa , Yosuke Mitani
IPC分类号： H03M3/02 , H03F1/34
CPC分类号： H03M3/454 , H03H11/1252 , H03M3/404 , H03M3/438
摘要： Two resistive elements and a capacitive element are coupled between a first node and each of an inverting input terminal of an operational amplifier, an output terminal of the operational amplifier, and a common node. A resistive element and a capacitive element are coupled between the first node and a signal input terminal. Two capacitive elements and a resistive element are coupled between a second node and each of the inverting input terminal, the output terminal, and the common node. Two capacitive elements are coupled between the second node and each of the signal input terminal, and the common node.
摘要翻译：两个电阻元件和电容元件耦合在运算放大器的第一节点和反相输入端子，运算放大器的输出端子和公共节点之间。电阻元件和电容元件耦合在第一节点和信号输入端子之间。两个电容元件和电阻元件耦合在第二节点和反相输入端子，输出端子和公共节点之间。两个电容元件耦合在第二节点和每个信号输入端和公共节点之间。

7. 发明申请

US20110133964A1 OVERSAMPLING A/D CONVERTER 有权
标题翻译： OVERSAMPLING A / D转换器
公开(公告)号：US20110133964A1
公开(公告)日：2011-06-09
申请号：US13025666
申请日：2011-02-11
申请人： Shiro DOSHO , Kazuo Matsukawa , Masao Takayama , Yosuke Mitani
发明人： Shiro DOSHO , Kazuo Matsukawa , Masao Takayama , Yosuke Mitani
IPC分类号： H03M1/00 , H03M1/12
CPC分类号： H03M1/12 , H03M3/344 , H03M3/43 , H03M3/454
摘要： An oversampling A/D converter includes a first filter including a first resistive element, a first capacitive element, a second resistive element, an operational amplifier, and a second capacitive element; a second filter receiving an output of the first filter; a third filter including a third resistive element, a third capacitive element, and a fourth resistive element; a quantizer receiving an output of the third filter and generating a digital signal; and a D/A converter converting the digital signal to an analog current signal. The D/A converter inputs the generated analog current signal to an inverting input terminal of the operational amplifier.
摘要翻译：过采样A / D转换器包括：第一滤波器，包括第一电阻元件，第一电容元件，第二电阻元件，运算放大器和第二电容元件; 接收第一滤波器的输出的第二滤波器; 第三滤波器，包括第三电阻元件，第三电容元件和第四电阻元件; 量化器，接收第三滤波器的输出并产生数字信号; 以及将数字信号转换成模拟电流信号的D / A转换器。 D / A转换器将产生的模拟电流信号输入到运算放大器的反相输入端。

8. 发明申请

US20110050476A1 INTEGRATOR, RESONATOR, AND OVERSAMPLING A/D CONVERTER 有权
标题翻译：集成器，谐振器和超滤A / D转换器
公开(公告)号：US20110050476A1
公开(公告)日：2011-03-03
申请号：US12888126
申请日：2010-09-22
申请人： Shiro Dosho , Takashi Morie , Kazuo Matsukawa , Yosuke Mitani , Masao Takayama
发明人： Shiro Dosho , Takashi Morie , Kazuo Matsukawa , Yosuke Mitani , Masao Takayama
IPC分类号： H03M1/12 , G06G7/18
CPC分类号： H03M3/454 , H03M3/404 , H03M3/43
摘要： An integrator includes an operational amplifier, a first filter connected to an inverting input terminal of the operational amplifier, and a second filter connected between the inverting input terminal and an output terminal of the operational amplifier. The first filter includes n resistive elements connected in series, and (n−1) capacitive elements each having one end connected to an interconnecting node of the resistive elements and the other end connected to ground. The second filter includes n capacitive elements connected in series, and (n−1) resistive elements each having one end connected to an interconnecting node of the capacitive elements and the other end connected to ground.
摘要翻译：积分器包括运算放大器，连接到运算放大器的反相输入端的第一滤波器和连接在运算放大器的反相输入端和输出端之间的第二滤波器。第一滤波器包括串联连接的n个电阻元件和（n-1）个电容元件，每个电容元件的一端连接到电阻元件的互连节点，另一端连接到地。第二滤波器包括串联连接的n个电容元件和（n-1）个电阻元件，每个电阻元件的一端连接到电容元件的互连节点，另一端连接到地。

9. 发明申请

US20120262320A1 RESONATOR, DELTA-SIGMA MODULATOR, AND WIRELESS COMMUNICATION DEVICE 有权
标题翻译：谐振器，DELTA-SIGMA调制器和无线通信设备
公开(公告)号：US20120262320A1
公开(公告)日：2012-10-18
申请号：US13534716
申请日：2012-06-27
申请人： Yosuke Mitani , Kazuo Matsukawa , Masao Takayama , Koji Obata , Shiro Dosho
发明人： Yosuke Mitani , Kazuo Matsukawa , Masao Takayama , Koji Obata , Shiro Dosho
IPC分类号： H03M3/02 , H03F3/45
CPC分类号： H03H11/04 , H03H2011/0488 , H03M3/404
摘要： Two T filters, one of which includes two resistive elements and one capacitive element and the other of which includes two capacitive elements and one resistive element, are inserted in a negative-feedback section of an operational amplifier, and a resistive element and a capacitive element are connected between each of intermediate nodes and a signal input terminal. A resistive element and a capacitive element which are connected to each other in parallel are connected between the signal input terminal and an inverting input terminal of the operational amplifier. With this configuration, overall admittances where elements connected to the corresponding intermediate nodes are in parallel connection are equal to each other.
摘要翻译：两个T滤波器，其中一个包括两个电阻元件和一个电容元件，另一个包括两个电容元件和一个电阻元件，插入到运算放大器的负反馈部分中，电阻元件和电容元件连接在每个中间节点和信号输入端子之间。并联连接的电阻元件和电容元件连接在信号输入端子和运算放大器的反相输入端子之间。利用这种配置，连接到对应的中间节点的元件并联连接的整体导纳彼此相等。

10. 发明授权

US08604956B2 Resonator and oversampling A/D converter 有权
公开(公告)号：US08604956B2
公开(公告)日：2013-12-10
申请号：US13073335
申请日：2011-03-28
申请人： Shiro Dosho , Kazuo Matsukawa , Yosuke Mitani
发明人： Shiro Dosho , Kazuo Matsukawa , Yosuke Mitani
IPC分类号： H03M3/00
CPC分类号： H03M3/454 , H03H11/1252 , H03M3/404 , H03M3/438
摘要： Two resistive elements and a capacitive element are coupled between a first node and each of an inverting input terminal of an operational amplifier, an output terminal of the operational amplifier, and a common node. A resistive element and a capacitive element are coupled between the first node and a signal input terminal. Two capacitive elements and a resistive element are coupled between a second node and each of the inverting input terminal, the output terminal, and the common node. Two capacitive elements are coupled between the second node and each of the signal input terminal, and the common node.

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