会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明授权
    • Semiconductor integrated circuit device
    • 半导体集成电路器件
    • US06674112B1
    • 2004-01-06
    • US09446509
    • 1999-12-27
    • Yoshitaka TadakiYutaka Ito
    • Yoshitaka TadakiYutaka Ito
    • H01L27108
    • H01L27/105G11C11/4076G11C11/4097H01L27/0214H01L27/10897
    • A semiconductor integrated circuit device has a semiconductor substrate and operates when supplied with appositive supply voltage and a circuit ground potential. The device has word lines, pairs of bit lines, data storage capacitors, and N-channel MOSFETs each having a gate connected to any one of the word lines and a source-drain path interposed between one of the paired bit lines on the one hand and a terminal of any one of the data storage capacitors on the other hand. A positive internal voltage higher than a circuit ground potential is generated and fed as a bias voltage to P-type regions wherein address selection MOSFETs of dynamic memory cells are formed.
    • 半导体集成电路器件具有半导体衬底,并在被供给正电源电压和电路接地电位时工作。 该器件具有字线,成对的位线,数据存储电容器和N沟道MOSFET,其各自具有连接到任何一条字线的栅极和一方面插入在一对位线之一中的源极 - 漏极通路 和任何一个数据存储电容器的端子。 产生高于电路接地电位的正内部电压,并将其作为偏置电压馈送到形成动态存储单元的地址选择MOSFET的P型区域。
    • 10. 发明授权
    • Memory apparatus and method using erasure error correction to reduce power consumption
    • 使用擦除误差校正的存储装置和方法来降低功耗
    • US08307260B2
    • 2012-11-06
    • US13365064
    • 2012-02-02
    • Yutaka ItoAdrian J. Drexler
    • Yutaka ItoAdrian J. Drexler
    • G11C29/00
    • G11C7/1006G06F11/106G11C11/4096G11C2207/104
    • Data bits stored in memory cells are recognized by an ECC generator as data bit strings in a first direction and data bit strings in a second direction such that each data bit string in the first direction and each data bit string in the second direction share one data bit in common. The ECC controller identifies a data bit string in the first direction having more than one data bit in error based on a respective correction code in the first direction and identifies a data bit string in the second direction having more than one data bit in error based on a respective correction code in the second direction, and causes the data bit shared by the identified data bit string in the first direction and the identified data bit string in the second direction to be changed.
    • 存储在存储器单元中的数据位由ECC产生器识别为第一方向上的数据位串和第二方向上的数据位串,使得第一方向上的每个数据位串和第二方向上的每个数据位串共享一个数据 有点共同点。 ECC控制器基于第一方向上的相应校正码来识别具有多于一个错误数据位的第一方向上的数据位串,并且基于第二方向识别具有错误的多于一个数据位的数据位串,基于 相应的校正码在第二方向上,并且使由第一方向上的识别数据位串共享的数据位和第二方向上的识别数据位串变化。