专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08530321B2 Variable resistance element and manufacturing method thereof 有权
标题翻译：可变电阻元件及其制造方法
公开(公告)号：US08530321B2
公开(公告)日：2013-09-10
申请号：US13515761
申请日：2010-12-14
申请人： Takeki Ninomiya , Yoshio Kawashima , Yukio Hayakawa , Takumi Mikawa
发明人： Takeki Ninomiya , Yoshio Kawashima , Yukio Hayakawa , Takumi Mikawa
IPC分类号： H01L21/20
CPC分类号： C23C26/00 , C23C28/00 , H01L27/2436 , H01L45/08 , H01L45/1233 , H01L45/1273 , H01L45/146 , H01L45/16 , H01L45/1675
摘要： A variable resistance element comprises, when M is a transition metal element, O is oxygen, and x and y are positive numbers satisfying y>x; a lower electrode; a first oxide layer formed on the lower electrode and comprising MOx when a content ratio of O with respect to M is x; a second oxide layer formed on the first oxide layer and comprising MOy when a content ratio of O with respect to M is y; an upper electrode formed on the second oxide layer; a protective layer formed on the upper electrode and comprising an electrically conductive material having a composition different from a composition of the upper electrode; an interlayer insulating layer formed to cover the protective layer; and an upper contact plug formed inside an upper contact hole penetrating the interlayer insulating layer.
摘要翻译：可变电阻元件包括当M是过渡金属元素时，O是氧，x和y是满足y> x的正数; 下电极当相对于M的含量比为O时，形成在下电极上并包含MOx的第一氧化物层; 当相对于M的含量比为O时，形成在第一氧化物层上并包含MOy的第二氧化物层; 形成在所述第二氧化物层上的上电极; 形成在上电极上并具有不同于上电极的组成的组成的导电材料的保护层; 形成为覆盖保护层的层间绝缘层; 以及形成在贯穿层间绝缘层的上接触孔内部的上接触插塞。

2. 发明申请

US20130119344A1 NONVOLATILE STORAGE ELEMENT AND METHOD FOR MANUFACTURING SAME 有权
标题翻译：非易失存储元件及其制造方法
公开(公告)号：US20130119344A1
公开(公告)日：2013-05-16
申请号：US13810800
申请日：2011-10-06
申请人： Takumi Mikawa , Yukio Hayakawa , Takeki Ninomiya , Yoshio Kawashima , Shinichi Yoneda
发明人： Takumi Mikawa , Yukio Hayakawa , Takeki Ninomiya , Yoshio Kawashima , Shinichi Yoneda
IPC分类号： H01L45/00
CPC分类号： H01L45/145 , H01L27/101 , H01L45/08 , H01L45/146 , H01L45/1608 , H01L45/1625
摘要： A variable resistance nonvolatile storage element includes: a first electrode; a second electrode; and a variable resistance layer having a resistance value that reversibly changes based on an electrical signal applied between the electrodes, wherein the variable resistance layer has a structure formed by stacking a first transition metal oxide layer, a second transition metal oxide layer, and a third transition metal oxide layer in this order, the first transition metal oxide layer having a composition expressed as MOx (where M is a transition metal and O is oxygen), the second transition metal oxide layer having a composition expressed as MOy (where x>y), and the third transition metal oxide layer having a composition expressed as MOz (where y>z).
摘要翻译：可变电阻非易失性存储元件包括：第一电极; 第二电极; 以及可变电阻层，其具有基于施加在所述电极之间的电信号而可逆地变化的电阻值，其中所述可变电阻层具有通过堆叠第一过渡金属氧化物层，第二过渡金属氧化物层和第三过渡金属氧化物层而形成的结构过渡金属氧化物层，第一过渡金属氧化物层具有以MOx表示的组成（其中M是过渡金属，O是氧），第二过渡金属氧化物层具有以MOy表示的组成（其中x> y ）和具有表示为MOz（其中y> z）的组成的第三过渡金属氧化物层。

3. 发明授权

US09184381B2 Nonvolatile storage element and method for manufacturing same 有权
标题翻译：非易失性存储元件及其制造方法
公开(公告)号：US09184381B2
公开(公告)日：2015-11-10
申请号：US13810800
申请日：2011-10-06
申请人： Takumi Mikawa , Yukio Hayakawa , Takeki Ninomiya , Yoshio Kawashima , Shinichi Yoneda
发明人： Takumi Mikawa , Yukio Hayakawa , Takeki Ninomiya , Yoshio Kawashima , Shinichi Yoneda
IPC分类号： H01L47/00 , H01L45/00 , H01L27/10
CPC分类号： H01L45/145 , H01L27/101 , H01L45/08 , H01L45/146 , H01L45/1608 , H01L45/1625
摘要： A variable resistance nonvolatile storage element includes: a first electrode; a second electrode; and a variable resistance layer having a resistance value that reversibly changes based on an electrical signal applied between the electrodes, wherein the variable resistance layer has a structure formed by stacking a first transition metal oxide layer, a second transition metal oxide layer, and a third transition metal oxide layer in this order, the first transition metal oxide layer having a composition expressed as MOx (where M is a transition metal and O is oxygen), the second transition metal oxide layer having a composition expressed as MOy (where x>y), and the third transition metal oxide layer having a composition expressed as MOz (where y>z).
摘要翻译：可变电阻非易失性存储元件包括：第一电极; 第二电极; 以及可变电阻层，其具有基于施加在所述电极之间的电信号而可逆地变化的电阻值，其中所述可变电阻层具有通过堆叠第一过渡金属氧化物层，第二过渡金属氧化物层和第三过渡金属氧化物层而形成的结构过渡金属氧化物层，第一过渡金属氧化物层具有以MOx表示的组成（其中M是过渡金属，O是氧），第二过渡金属氧化物层具有以MOy表示的组成（其中x> y ）和具有表示为MOz（其中y> z）的组成的第三过渡金属氧化物层。

4. 发明授权

US08889478B2 Method for manufacturing nonvolatile semiconductor memory element, and nonvolatile semiconductor memory element 有权
标题翻译：非易失性半导体存储元件的制造方法及非易失性半导体存储元件
公开(公告)号：US08889478B2
公开(公告)日：2014-11-18
申请号：US13637465
申请日：2011-11-18
申请人： Takumi Mikawa , Yukio Hayakawa , Yoshio Kawashima , Takeki Ninomiya
发明人： Takumi Mikawa , Yukio Hayakawa , Yoshio Kawashima , Takeki Ninomiya
IPC分类号： H01L45/00 , H01L21/8239 , H01L21/02 , H01L27/24 , H01L27/102
CPC分类号： H01L45/1233 , H01L27/1021 , H01L27/2409 , H01L45/08 , H01L45/146 , H01L45/1675
摘要： Provided is a method for manufacturing a variable resistance nonvolatile semiconductor memory element, and a nonvolatile semiconductor memory element which make it possible to operate at a low voltage and high speed when initial breakdown is caused, and exhibit favorable diode element characteristics. The method for manufacturing the nonvolatile semiconductor memory element includes, after forming a top electrode of a variable resistance element and at least before forming a top electrode of an MSM diode element, oxidizing to insulate a portion of a variable resistance film in a region around an end face of a variable resistance layer.
摘要翻译：提供一种用于制造可变电阻非易失性半导体存储元件的方法，以及使得可以在初始击穿时以低电压和高速操作的可变电阻非易失性半导体存储元件，并且表现出良好的二极管元件特性。制造非易失性半导体存储元件的方法包括：在形成可变电阻元件的顶部电极之后，并且至少在形成MSM二极管元件的顶部电极之前，氧化以使可变电阻膜的一部分在一个周围的区域中绝缘可变电阻层的端面。

5. 发明申请

US20140098595A1 NON-VOLATILE MEMORY DEVICE 有权
标题翻译：非易失性存储器件
公开(公告)号：US20140098595A1
公开(公告)日：2014-04-10
申请号：US14122708
申请日：2013-03-27
申请人： Yoshio Kawashima , Yukio Hayakawa , Takumi Mikawa
发明人： Yoshio Kawashima , Yukio Hayakawa , Takumi Mikawa
IPC分类号： H01L45/00 , G11C13/00
CPC分类号： H01L45/12 , G11C13/0002 , G11C13/0007 , G11C13/003 , G11C13/004 , G11C13/0069 , G11C2013/0054 , H01L27/101 , H01L27/2409 , H01L27/2463 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1675
摘要： A non-volatile memory device includes: a memory cell array including a plurality of memory cells each including a first variable resistance element and a first current steering element and a parameter generation circuit including a reference cell including a second variable resistance element and a second current steering element having the same current density-voltage characteristic as that of the first current steering element, wherein a conductive shorting layer for causing short-circuiting between the electrodes is formed on the side surfaces of the second variable resistance element.
摘要翻译：一种非易失性存储器件包括：存储单元阵列，包括多个存储单元，每个存储单元包括第一可变电阻元件和第一电流导引元件;以及参数产生电路，其包括具有第二可变电阻元件和第二电流元件所述转向元件具有与所述第一电流操舵元件相同的电流密度 - 电压特性，其中在所述第二可变电阻元件的侧表面上形成用于在所述电极之间引起短路的导电短路层。

6. 发明申请

US20120063201A1 NONVOLATILE MEMORY ELEMENT, PRODUCTION METHOD THEREFOR, DESIGN SUPPORT METHOD THEREFOR, AND NONVOLATILE MEMORY DEVICE 有权
标题翻译：非易失性存储元件，其生产方法，其设计支持方法和非易失性存储器件
公开(公告)号：US20120063201A1
公开(公告)日：2012-03-15
申请号：US13320654
申请日：2011-03-16
申请人： Yukio Hayakawa , Takumi Mikawa , Yoshio Kawashima , Takeki Ninomiya
发明人： Yukio Hayakawa , Takumi Mikawa , Yoshio Kawashima , Takeki Ninomiya
IPC分类号： G11C11/00 , H01L21/8239 , G06F17/50 , H01L45/00
CPC分类号： G11C13/004 , G11C13/0007 , G11C13/0069 , G11C2013/0083 , G11C2213/56 , G11C2213/79 , H01L27/2436 , H01L45/08 , H01L45/1233 , H01L45/1246 , H01L45/146 , H01L45/1625 , H01L45/1641 , H01L45/1675
摘要： A nonvolatile memory element which can be initialized at low voltage includes a variable resistance layer (116) located between a lower electrode (105) and an upper electrode (107) and having a resistance value that reversibly changes based on electrical signals applied between these electrodes. The variable resistance layer (116) includes at least two layers: a first variable resistance layer (1161) including a first transition metal oxide (116b); and a second variable resistance layer (1162) including a second transition metal oxide (116a) and a third transition metal oxide (116c). The second transition metal oxide (116a) has an oxygen deficiency higher than either oxygen deficiency of the first transition metal oxide (116b) or the third transition metal oxide (116c), and the second transition metal oxide (116a) and the third transition metal oxide (116c) are in contact with the first variable resistance layer (1161).
摘要翻译：可以以低电压初始化的非易失性存储元件包括位于下电极（105）和上电极（107）之间的可变电阻层（116），并且具有基于施加在这些电极之间的电信号而可逆地改变的电阻值。可变电阻层（116）包括至少两层：包括第一过渡金属氧化物（116b）的第一可变电阻层（1161）; 和包括第二过渡金属氧化物（116a）和第三过渡金属氧化物（116c）的第二可变电阻层（1162）。第二过渡金属氧化物（116a）的缺氧高于第一过渡金属氧化物（116b）或第三过渡金属氧化物（116c）的氧缺乏，第二过渡金属氧化物（116a）和第三过渡金属氧化物（116c）与第一可变电阻层（1161）相接触。

7. 发明授权

US08481990B2 Nonvolatile memory element 有权
标题翻译：非易失性存储元件
公开(公告)号：US08481990B2
公开(公告)日：2013-07-09
申请号：US13375027
申请日：2011-03-07
申请人： Yoshio Kawashima , Takumi Mikawa , Yukio Hayakawa
发明人： Yoshio Kawashima , Takumi Mikawa , Yukio Hayakawa
IPC分类号： H01L47/00
CPC分类号： H01L45/146 , H01L27/2436 , H01L45/08 , H01L45/1233 , H01L45/1625 , H01L45/1641 , H01L45/1675
摘要： A variable resistance nonvolatile memory element capable of suppressing a variation in resistance values is provided. A nonvolatile memory element according to the present invention includes: a silicon substrate (11); a lower electrode layer (102) formed on the silicon substrate (11); a variable resistance layer formed on the lower electrode layer (102); an upper electrode layer (104) formed on the variable resistance layer; a second interlayer insulating layer (19) formed to directly cover at least side surfaces of the lower electrode layer (102) and the variable resistance layer; a stress buffering region layer (105) for buffering a stress on the upper electrode layer (104), the stress buffering region layer being formed to directly cover at least an upper surface and side surfaces of the upper electrode layer (104) and comprising a material having a stress smaller than a stress of an insulating layer used as the second interlayer insulating layer (19); a second contact (16) extending to the upper electrode layer (104); and a wiring pattern (18) connected to the second contact (16).
摘要翻译：提供了能够抑制电阻值变化的可变电阻非易失性存储元件。根据本发明的非易失性存储元件包括：硅衬底（11）; 形成在所述硅衬底（11）上的下电极层（102）; 形成在所述下电极层（102）上的可变电阻层; 形成在所述可变电阻层上的上电极层（104）形成为直接覆盖下电极层（102）和可变电阻层的至少侧面的第二层间绝缘层（19）用于缓冲上电极层（104）上的应力的应力缓冲区层（105），所述应力缓冲区层形成为直接覆盖上电极层（104）的上表面和侧表面，并包括具有小于用作第二层间绝缘层（19）的绝缘层的应力的应力的材料; 延伸到上电极层（104）的第二触点（16）; 以及连接到第二触点（16）的布线图案（18）。

8. 发明申请

US20120068148A1 NONVOLATILE MEMORY ELEMENT AND FABRICATION METHOD FOR NONVOLATILE MEMORY ELEMENT 有权
标题翻译：非易失性存储元件的非易失性存储元件和制造方法
公开(公告)号：US20120068148A1
公开(公告)日：2012-03-22
申请号：US13375027
申请日：2011-03-07
申请人： Yoshio Kawashima , Takumi Mikawa , Yukio Hayakawa
发明人： Yoshio Kawashima , Takumi Mikawa , Yukio Hayakawa
IPC分类号： H01L47/00 , H01L21/02
CPC分类号： H01L45/146 , H01L27/2436 , H01L45/08 , H01L45/1233 , H01L45/1625 , H01L45/1641 , H01L45/1675
摘要： A variable resistance nonvolatile memory element capable of suppressing a variation in resistance values is provided. A nonvolatile memory element according to the present invention includes: a silicon substrate (11); a lower electrode layer (102) formed on the silicon substrate (11); a variable resistance layer formed on the lower electrode layer (102); an upper electrode layer (104) formed on the variable resistance layer; a second interlayer insulating layer (19) formed to directly cover at least side surfaces of the lower electrode layer (102) and the variable resistance layer; a stress buffering region layer (105) for buffering a stress on the upper electrode layer (104), the stress buffering region layer being formed to directly cover at least an upper surface and side surfaces of the upper electrode layer (104) and comprising a material having a stress smaller than a stress of an insulating layer used as the second interlayer insulating layer (19); a second contact (16) extending to the upper electrode layer (104); and a wiring pattern (18) connected to the second contact (16).
摘要翻译：提供了能够抑制电阻值变化的可变电阻非易失性存储元件。根据本发明的非易失性存储元件包括：硅衬底（11）; 形成在所述硅基板（11）上的下电极层（102）。形成在所述下电极层（102）上的可变电阻层; 形成在所述可变电阻层上的上电极层（104）形成为直接覆盖下电极层（102）和可变电阻层的至少侧面的第二层间绝缘层（19）用于缓冲上电极层（104）上的应力的应力缓冲区层（105），所述应力缓冲区层形成为直接覆盖上电极层（104）的上表面和侧表面，并包括具有小于用作第二层间绝缘层（19）的绝缘层的应力的应力的材料; 延伸到上电极层（104）的第二触点（16）; 以及连接到第二触点（16）的布线图案（18）。

9. 发明授权

US08574957B2 Method for manufacturing nonvolatile semiconductor memory element 有权
标题翻译：制造非易失性半导体存储元件的方法
公开(公告)号：US08574957B2
公开(公告)日：2013-11-05
申请号：US13502769
申请日：2011-11-10
申请人： Takumi Mikawa , Yukio Hayakawa , Takeki Ninomiya , Yoshio Kawashima
发明人： Takumi Mikawa , Yukio Hayakawa , Takeki Ninomiya , Yoshio Kawashima
IPC分类号： H01L21/00
CPC分类号： H01L27/101 , G11C13/0007 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1625 , H01L45/1641 , H01L45/1675
摘要： An object of the present invention is to provide a method for manufacturing a variable resistance nonvolatile semiconductor memory element which can operate at a low voltage and high speed when initial breakdown is caused, and inhibit oxidization of a contact plug. The method for manufacturing the variable resistance nonvolatile semiconductor memory element, which includes a bottom electrode, a variable resistance layer, and a top electrode which are formed above a contact plug, includes oxidizing to insulate an end portion of the variable resistance layer prior to forming a bottom electrode by patterning a first conductive film.
摘要翻译：本发明的目的是提供一种用于制造可变电阻非易失性半导体存储元件的方法，其可以在初始击穿时能够以低电压和高速工作，并且抑制接触插塞的氧化。制造可变电阻型非易失性半导体存储元件的方法，其包括形成在接触插塞上方的底电极，可变电阻层和顶电极，包括在形成之前进行氧化以使可变电阻层的端部绝缘通过图案化第一导电膜来形成底部电极。

10. 发明授权

US08437173B2 Nonvolatile memory element, manufacturing method thereof, design support method therefor, and nonvolatile memory device 有权
标题翻译：非易失性存储元件，其制造方法，设计支持方法和非易失性存储器件
公开(公告)号：US08437173B2
公开(公告)日：2013-05-07
申请号：US13320654
申请日：2011-03-16
申请人： Yukio Hayakawa , Takumi Mikawa , Yoshio Kawashima , Takeki Ninomiya
发明人： Yukio Hayakawa , Takumi Mikawa , Yoshio Kawashima , Takeki Ninomiya
IPC分类号： G11C11/00
CPC分类号： G11C13/004 , G11C13/0007 , G11C13/0069 , G11C2013/0083 , G11C2213/56 , G11C2213/79 , H01L27/2436 , H01L45/08 , H01L45/1233 , H01L45/1246 , H01L45/146 , H01L45/1625 , H01L45/1641 , H01L45/1675
摘要： A nonvolatile memory element which can be initialized at low voltage includes a variable resistance layer (116) located between a lower electrode (105) and an upper electrode (107) and having a resistance value that reversibly changes based on electrical signals applied between these electrodes. The variable resistance layer (116) includes at least two layers: a first variable resistance layer (1161) including a first transition metal oxide (116b); and a second variable resistance layer (1162) including a second transition metal oxide (116a) and a third transition metal oxide (116c). The second transition metal oxide (116a) has an oxygen deficiency higher than either oxygen deficiency of the first transition metal oxide (116b) or the third transition metal oxide (116c), and the second transition metal oxide (116a) and the third transition metal oxide (116c) are in contact with the first variable resistance layer (1161).
摘要翻译：可以以低电压初始化的非易失性存储元件包括位于下电极（105）和上电极（107）之间的可变电阻层（116），并且具有基于施加在这些电极之间的电信号而可逆地改变的电阻值。可变电阻层（116）包括至少两层：包括第一过渡金属氧化物（116b）的第一可变电阻层（1161）; 和包括第二过渡金属氧化物（116a）和第三过渡金属氧化物（116c）的第二可变电阻层（1162）。第二过渡金属氧化物（116a）的缺氧高于第一过渡金属氧化物（116b）或第三过渡金属氧化物（116c）的氧缺乏，第二过渡金属氧化物（116a）和第三过渡金属氧化物（116c）与第一可变电阻层（1161）接触。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式