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1. 发明授权

US06725449B1 Semiconductor test program debugging apparatus 失效
标题翻译：半导体测试程序调试装置
公开(公告)号：US06725449B1
公开(公告)日：2004-04-20
申请号：US09639480
申请日：2000-08-15
申请人： Yoshinori Maeda , Hironori Maeda , Tadashi Oda
发明人： Yoshinori Maeda , Hironori Maeda , Tadashi Oda
IPC分类号： G06F944
CPC分类号： G01R31/31705 , G01R31/318307
摘要： A semiconductor test program debugging apparatus is disclosed to which data concerning a packet input to and output from the packet transfer memory device is supplied, and which extracts a part corresponding to the packet from data input to and output from the memory device with response to a test signal generated by a tester simulator and displays the details of the part.
摘要翻译：公开了一种半导体测试程序调试装置，其中提供了关于从分组传送存储装置输入和输出的分组的数据，并且从数据输入到从存储装置输出的部分响应于由测试仪模拟器产生的测试信号，并显示零件的细节。

2. 发明授权

US07130218B2 Nonvolatile memory with controlled voltage boosting speed 有权
标题翻译：具有控制升压速度的非易失性存储器
公开(公告)号：US07130218B2
公开(公告)日：2006-10-31
申请号：US11041452
申请日：2005-01-25
申请人： Yuki Matsuda , Tadashi Oda
发明人： Yuki Matsuda , Tadashi Oda
IPC分类号： G11C16/04
CPC分类号： G11C16/08 , G11C8/08 , G11C16/12
摘要： In a nonvolatile memory in which a load on a boosting circuit changes according to the number of rewrite bytes, the boosting circuit is configured so as to perform voltage boosting at a relatively slow predetermined speed regardless of the number of rewrite bytes, whereby stress applied to each storage element is reduced and rewrite resistance is enhanced.
摘要翻译：在升压电路中的负载根据重写字节的数量而变化的非易失性存储器中，升压电路被配置为以相对慢的预定速度执行升压，而不管重写字节的数量如何，由此施加应力每个存储元件被减少并且改写电阻增强。

3. 发明授权

US06791884B2 Nonvolatile memory 有权
标题翻译：非易失性存储器
公开(公告)号：US06791884B2
公开(公告)日：2004-09-14
申请号：US10325907
申请日：2002-12-23
申请人： Yuki Matsuda , Tadashi Oda
发明人： Yuki Matsuda , Tadashi Oda
IPC分类号： G11C1604
CPC分类号： G11C16/08 , G11C8/08 , G11C16/12
摘要： In a nonvolatile memory in which a load on a boosting circuit changes according to the number of rewrite bytes, the boosting circuit is configured so as to perform voltage boosting at a relatively slow predetermined speed regardless of the number of rewrite bytes, whereby stress applied to each storage element is reduced and rewrite resistance is enhanced.
摘要翻译：在升压电路中的负载根据重写字节的数量而变化的非易失性存储器中，升压电路被配置为以相对慢的预定速度执行升压，而不管重写字节的数量如何，由此施加应力每个存储元件被减少并且改写电阻增强。

4. 发明申请

US20060279995A1 Nonvolatile memory 有权
公开(公告)号：US20060279995A1
公开(公告)日：2006-12-14
申请号：US11504017
申请日：2006-08-15
申请人： Yuki Matsuda , Tadashi Oda
发明人： Yuki Matsuda , Tadashi Oda
IPC分类号： G11C16/04
CPC分类号： G11C16/08 , G11C8/08 , G11C16/12
摘要： In a nonvolatile memory in which a load on a boosting circuit changes according to the number of rewrite bytes, the boosting circuit is configured so as to perform voltage boosting at a relatively slow predetermined speed regardless of the number of rewrite bytes, whereby stress applied to each storage element is reduced and rewrite resistance is enhanced.

5. 发明申请

US20050157556A1 Nonvolatile memory 有权
标题翻译：非易失性存储器
公开(公告)号：US20050157556A1
公开(公告)日：2005-07-21
申请号：US11041452
申请日：2005-01-25
申请人： Yuki Matsuda , Tadashi Oda
发明人： Yuki Matsuda , Tadashi Oda
IPC分类号： G11C8/08 , G11C11/34 , G11C16/12
CPC分类号： G11C16/08 , G11C8/08 , G11C16/12
摘要： In a nonvolatile memory in which a load on a boosting circuit changes according to the number of rewrite bytes, the boosting circuit is configured so as to perform voltage boosting at a relatively slow predetermined speed regardless of the number of rewrite bytes, whereby stress applied to each storage element is reduced and rewrite resistance is enhanced.
摘要翻译：在升压电路中的负载根据重写字节的数量而变化的非易失性存储器中，升压电路被配置为以相对慢的预定速度执行升压，而与重写字节数无关，由此施加应力每个存储元件被减少并且改写电阻增强。

6. 发明申请

US20150159801A1 Electrically Driven Support Base 审中-公开
标题翻译：电驱动支撑基座
公开(公告)号：US20150159801A1
公开(公告)日：2015-06-11
申请号：US14406845
申请日：2013-06-06
申请人： Tadashi Oda
发明人： Tadashi Oda
IPC分类号： F16M11/04 , F16M11/12 , G03B17/56 , F16M11/18
CPC分类号： F16M11/046 , F16M11/126 , F16M11/18 , G03B17/561
摘要： Provided is an electrically driven support base which is configured so as to prevent the rotation-induced shaking of a pole for supporting a camera mounting head and so as to enable the automatic adjustment of the position in height of a camera. One end of a flexible transmission belt (drive cord (12)) is connected to a multi-stage telescoping pole (2) having a mounting head (50) provided to the front end pole (46) of the multi-stage telescoping pole (2), and the drive cord (12) is engaged with a gear connected to an electric motor (23). The multi-stage telescoping pole (2) is extended or retracted by paying out or pulling in the drive cord (12). A camera means can be mounted on the mounting head (50), and the multi-stage telescoping pole (2) is provided with a rotation-induced shaking prevention means for each stage pole.
摘要翻译：提供一种电驱动支撑基座，其构造成防止用于支撑相机安装头的极的旋转引起的振动，并且能够自动调节相机的高度位置。柔性传动皮带（驱动绳（12））的一端连接到多级伸缩杆（2），该多级伸缩杆（2）具有设置在多级伸缩杆的前端杆（46）上的安装头（50）驱动线（12）与与电动机（23）连接的齿轮接合。多级伸缩杆（2）通过支付或拉动驱动绳（12）而延伸或缩回。相机装置可以安装在安装头（50）上，并且多级伸缩杆（2）为每个平台杆设置有旋转引起的防震装置。

7. 发明授权

US07317640B2 Nonvolatile memory with erasable parts 有权
标题翻译：具有可擦除部件的非易失性存储器
公开(公告)号：US07317640B2
公开(公告)日：2008-01-08
申请号：US11504017
申请日：2006-08-15
申请人： Yuki Matsuda , Tadashi Oda
发明人： Yuki Matsuda , Tadashi Oda
IPC分类号： G11C16/04
CPC分类号： G11C16/08 , G11C8/08 , G11C16/12
摘要： In a nonvolatile memory in which a load on a boosting circuit changes according to the number of rewrite bytes, the boosting circuit is configured so as to perform voltage boosting at a relatively slow predetermined speed regardless of the number of rewrite bytes, whereby stress applied to each storage element is reduced and rewrite resistance is enhanced.
摘要翻译：在升压电路中的负载根据重写字节的数量而变化的非易失性存储器中，升压电路被配置为以相对慢的预定速度执行升压，而不管重写字节的数量如何，由此施加应力每个存储元件被减少并且改写电阻增强。

8. 发明授权

US06853582B1 Nonvolatile memory with controlled voltage boosting speed 有权
标题翻译：具有控制升压速度的非易失性存储器
公开(公告)号：US06853582B1
公开(公告)日：2005-02-08
申请号：US10312014
申请日：2000-08-30
申请人： Yuki Matsuda , Tadashi Oda
发明人： Yuki Matsuda , Tadashi Oda
IPC分类号： G11C8/08 , G11C11/34 , G11C16/12 , G11C16/04
CPC分类号： G11C16/08 , G11C8/08 , G11C16/12
摘要： In a nonvolatile memory in which a load on a boosting circuit changes according to the number of rewrite bytes, the boosting circuit is configured so as to perform voltage boosting at a relatively slow predetermined speed regardless of the number of rewrite bytes, whereby stress applied to each storage element is reduced and rewrite resistance is enhanced.
摘要翻译：在升压电路中的负载根据重写字节的数量而变化的非易失性存储器中，升压电路被配置为以相对慢的预定速度执行升压，而不管重写字节的数量如何，由此施加应力每个存储元件被减少并且改写电阻增强。

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