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    • 3. 发明申请
    • Power supply controller having analog to digital converter
    • 电源控制器具有模数转换器
    • US20100052639A1
    • 2010-03-04
    • US12461655
    • 2009-08-19
    • Hideyuki TakahashiYoshimi Matsumoto
    • Hideyuki TakahashiYoshimi Matsumoto
    • G05F1/10
    • H02M3/157H02M1/36H02M2001/0012H03M1/182
    • A power supply controller includes an analog to digital (A/D) converter that performs analog-digital conversion of an output voltage and outputs a digital signal, a deviation signal generator unit that generates a deviation signal from the digital signal and a standard voltage value serving as an output voltage target value, and a power controller unit that controls the output voltage based on the deviation signal. The power supply controller includes a conversion range setting unit that sets a range of the reference voltage into the A/D converter based on a first signal as the digital signal in a power supply startup period, and sets the reference voltage range into the A/D converter based on a second signal as the deviation signal or as a signal corresponding to the deviation signal in a steady state period.
    • 电源控制器包括对输出电压执行模数转换并输出数字信号的模数(A / D)转换器,从数字信号产生偏差信号的偏差信号发生器单元和标准电压值 用作输出电压目标值,以及功率控制器单元,其基于偏差信号来控制输出电压。 电源控制器包括转换范围设置单元,其基于作为电源启动时段中的数字信号的第一信号将参考电压的范围设置为A / D转换器,并将参考电压范围设置为A / D转换器基于第二信号作为偏差信号,或者作为与稳定状态时段中的偏差信号相对应的信号。
    • 6. 发明申请
    • ANTIBACTERIAL AGENT
    • 抗菌剂
    • US20120136049A1
    • 2012-05-31
    • US13388015
    • 2010-07-30
    • Kunihiro KaihatsuYoshimi Matsumoto
    • Kunihiro KaihatsuYoshimi Matsumoto
    • A61K31/35A61P31/04C07D311/74
    • A61K31/353A01N43/16Y02A50/473Y02A50/478
    • The present invention provides an epigallocatechin gallate derivative (EGCG derivative) that has excellent safety and antibacterial properties. An epigallocatechin gallate derivative represented by the following chemical formula (1), an isomer thereof, or a salt thereof is used as an antibacterial agent. In the formula, R1 to R6 are each a hydrogen atom, halogen, sodium, potassium, or a straight-chain or branched, saturated or unsaturated acyl group and may be identical to or different from one another. The acyl group may be substituted further with one or more substituents. At least one of the R1 to R6 is the acyl group. R7 to R16 are each a hydrogen atom, halogen, sodium, or potassium and may be identical to or different from one another.
    • 本发明提供了具有优异的安全性和抗菌性的表没食子儿茶素没食子酸酯衍生物(EGCG衍生物)。 使用由以下化学式(1)表示的表没食子儿茶素没食子酸酯衍生物,其异构体或其盐作为抗菌剂。 在该式中,R 1至R 6各自为氢原子,卤素,钠,钾或直链或支链,饱和或不饱和的酰基,并且可以彼此相同或不同。 酰基可以进一步被一个或多个取代基取代。 R1至R6中的至少一个是酰基。 R 7至R 16各自为氢原子,卤素,钠或钾,并且可以彼此相同或不同。
    • 8. 发明授权
    • Power supply controller having analog to digital converter
    • 电源控制器具有模数转换器
    • US08564268B2
    • 2013-10-22
    • US13433184
    • 2012-03-28
    • Hideyuki TakahashiYoshimi Matsumoto
    • Hideyuki TakahashiYoshimi Matsumoto
    • G05F1/40
    • H02M3/157H02M1/36H02M2001/0012H03M1/182
    • A power supply controller includes a switching circuit which, in response to a control signal, transfers an analog signal to an output node as an outputted analog signal, the output node being coupled to an inductor and a capacitor, an analog to digital (A/D) converter which converts an outputted analog signal to a digital signal, a pulse width modulation (PWM) generator circuit which produces a PWM signal based on the digital signal, a driver which produces the control signal in response to the PWM signal, and a conversion range setting unit which sets a range data for the A/D converter based on the digital signal during a first period, and which sets the range data based on the PWM signal during a second period.
    • 电源控制器包括一个切换电路,响应控制信号将模拟信号作为输出的模拟信号传送到输出节点,输出节点耦合到电感和电容,模数(A / D)转换器,其将输出的模拟信号转换为数字信号,基于数字信号产生PWM信号的脉宽调制(PWM)发生器电路,响应于PWM信号产生控制信号的驱动器,以及 转换范围设置单元,其在第一时段期间基于数字信号设置用于A / D转换器的范围数据,并且在第二时段期间基于PWM信号设置范围数据。
    • 9. 发明申请
    • Sealed prismatic battery
    • 密封棱柱电池
    • US20070059586A1
    • 2007-03-15
    • US11518940
    • 2006-09-12
    • Yoshimi MatsumotoOsamu WatanabeYoshiki Somatomo
    • Yoshimi MatsumotoOsamu WatanabeYoshiki Somatomo
    • H01M2/12
    • H01M10/0436H01M2/1241H01M10/0525
    • A sealed prismatic battery according to the present invention comprises a laterally long cap sealing an opening of an upper surface of a battery can and a safety vent placed on the cap and having a thin-walled valve body which opens in an abnormal rise of a battery internal pressure. The safety vent has an oval-shaped circumferential groove formed inside an oval-shaped coining section provided on an outer surface of the cap and on one end side in a lateral direction of the cap and a thin-walled valve body surrounded thereby, and the oval-shaped circumferential groove is composed of lateral side sections parallel to the lateral direction of the cap and circular arc sections connecting these lateral side sections, with one lateral side section, other lateral side section, and the thin-walled valve body of the safety vent respectively having a thickness increased in this order.
    • 根据本发明的密封棱柱电池包括一个横向长的盖子,其密封电池罐的上表面的开口和安置在盖上的安全排气孔,并且具有在电池的异常上升中打开的薄壁阀体 内压。 该安全气囊具有椭圆形的圆周槽,该椭圆形周向凹槽形成在设置在盖的外表面上并且在盖的横向方向上的一个端侧上的椭圆形压印部分和由其包围的薄壁阀体内, 椭圆形周向槽由平行于盖的横向的侧边部分和连接这些横向侧部的圆弧部分组成,其中一个侧面部分,另一个侧面部分以及安全的薄壁阀体 分别具有按此顺序增加的厚度。
    • 10. 发明授权
    • Parallel-serial data converter
    • 并行串行数据转换器
    • US5379038A
    • 1995-01-03
    • US101922
    • 1993-08-04
    • Yoshimi Matsumoto
    • Yoshimi Matsumoto
    • H03M9/00
    • H03M9/00
    • A parallel-serial data converter according to the present invention comprises a n-th latch circuit which latches the sign bit at the most significant bit of parallel data, a n-1th selector which selects either of the n-1th bit or the ground level, a n-1th latch circuit which latches the output from the selector n-1, a i-th selector which selects either of the i-th bit (i=n-2, n-3, . . . , 2, 1) of the parallel data or the output from the i+1th latch circuit, a i-th latch circuit which latches the output from the i-th selector, a n-th selector which selects either of the output from the first inverter to reverse the output from the first latch circuit or the output from the first latch circuit, a n+1th selector which selects either of the output from a second inverter to reverse the output from the n-th selector or the output from the n-th selector for output as serial data in two's complement notation, a set latch circuit which is set according to the STORE signal and latches the output from the first AND circuit to take the logical AND the output form the n-th selector and the selection signal as well as a second AND circuit which takes the logical AND the output from the set latch circuit and the output from the n-th latch circuit for output as the selection signal.
    • 根据本发明的并行串行数据转换器包括第n个锁存电路,其锁存并行数据的最高有效位的符号位;第n个选择器,其选择第n-1位或地电平 锁存从选择器n-1的输出的第n-1锁存电路,第i个选择器,其选择第i个位(i = n-2,n-3,..., )和第i + 1锁存电路的输出,第i个锁存电路锁存第i个选择器的输出,第n个选择器选择第一个反相器的输出中的任何一个反相 来自第一锁存电路的输出或来自第一锁存电路的输出,第n + 1个选择器,其选择来自第二反相器的输出中的任一个以反转第n选择器的输出或第n选择器的输出 作为串行数据以二进制补码表示输出,设置锁存电路根据STORE信号设置并锁存outpu t从第一AND电路获取逻辑AND并输出第n选择器和选择信号,以及第二AND电路,其接收来自所设置的锁存电路的逻辑AND和来自第n个选择器的输出 锁存电路作为选择信号输出。