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    • 1. 发明授权
    • Charge-controlling semiconductor integrated circuit and charging apparatus
    • 充电控制半导体集成电路和充电装置
    • US08558516B2
    • 2013-10-15
    • US12467466
    • 2009-05-18
    • Yoshihiro TakahashiDaisuke SuzukiYoshihiro MotoichiGentaro Kurokawa
    • Yoshihiro TakahashiDaisuke SuzukiYoshihiro MotoichiGentaro Kurokawa
    • H02J7/06
    • H02J7/00
    • A charge-controlling semiconductor integrated circuit includes a current- controlling MOS transistor which is connected between a voltage input terminal and an output terminal and controls flowing current, a substratum voltage switching circuit connected between the voltage input/output terminal and a substratum to which an input/output voltage is applied, and a voltage comparison circuit to compare the input/output voltage. The charge-controlling semiconductor integrated circuit controls the substratum voltage switching circuit based on an output of the voltage comparison circuit, and the voltage comparison circuit includes an intentional offset in a first potential direction. A level shift circuit to shift the output voltage to a potential direction opposite to the first potential direction is provided in a preceding stage of a first input terminal of the voltage comparison circuit, and the input voltage is input to a second input terminal of the voltage comparison circuit.
    • 电荷控制半导体集成电路包括电流控制MOS晶体管,其连接在电压输入端子和输出端子之间并控制流动电流;基极电压开关电路,连接在电压输入/输出端子与基板之间, 施加输入/输出电压,以及比较输入/输出电压的电压比较电路。 电荷控制半导体集成电路基于电压比较电路的输出控制基极电压开关电路,电压比较电路包括在第一电位方向上的有意偏移。 在电压比较电路的第一输入端子的前级设置有将输出电压移位到与第一电位方向相反的电位方向的电平移位电路,输入电压输入到电压的第二输入端子 比较电路。
    • 2. 发明申请
    • CHARGE-CONTROLLING SEMICONDUCTOR INTEGRATED CIRCUIT AND CHARGING APPARATUS
    • 充电控制半导体集成电路和充电装置
    • US20090289605A1
    • 2009-11-26
    • US12467466
    • 2009-05-18
    • Yoshihiro TAKAHASHIDaisuke SuzukiYoshihiro MotoichiGentaro Kurokawa
    • Yoshihiro TAKAHASHIDaisuke SuzukiYoshihiro MotoichiGentaro Kurokawa
    • H02J7/06
    • H02J7/00
    • Disclosed a charge-controlling semiconductor integrated circuit comprising: a current-controlling MOS transistor connected between a voltage input terminal and an output terminal and controls flowing current; a substratum voltage switching circuit connected between the voltage input/output terminal and a substratum to which an input/output voltage is applied; and a voltage comparison circuit to compare the input/output voltage, wherein the charge-controlling semiconductor integrated circuit controls the substratum voltage switching circuit based on an output of the voltage comparison circuit, the voltage comparison circuit includes an intentional offset in a first potential direction, and in a preceding stage of a first input terminal of the voltage comparison circuit, a level shift circuit to shift the output voltage to an opposite potential direction is provided, and to a second input terminal of the voltage comparison circuit, the input voltage is input.
    • 公开了一种电荷控制半导体集成电路,包括:电流控制MOS晶体管,连接在电压输入端子和输出端子之间,并控制流动电流; 连接在电压输入/输出端子和施加了输入/输出电压的基板之间的基极电压开关电路; 以及用于比较输入/输出电压的电压比较电路,其中所述充电控制半导体集成电路基于所述电压比较电路的输出来控制所述基极电压开关电路,所述电压比较电路包括在第一电位方向上的有意偏移 ,并且在电压比较电路的第一输入端子的前级中,提供将输出电压移位到相反电位方向的电平移位电路,并且对于电压比较电路的第二输入端子,输入电压为 输入。
    • 3. 发明授权
    • Charge-controlling semiconductor integrated circuit
    • 充电控制半导体集成电路
    • US08035355B2
    • 2011-10-11
    • US12478065
    • 2009-06-04
    • Yoshihiro MotoichiDaisuke SuzukiYoshihiro TakahashiGentaro Kurokawa
    • Yoshihiro MotoichiDaisuke SuzukiYoshihiro TakahashiGentaro Kurokawa
    • H02J7/16H02J7/24
    • H02J7/0052G01R19/16519H03K17/0822
    • Disclosed is a charge-controlling semiconductor integrated circuit including: a current-controlling MOS transistor; a current detection circuit including a 1/N size current-detecting MOS transistor; and a gate voltage control circuit, wherein the current detection circuit includes an operational amplifier circuit, a bias condition of the current-detecting MOS transistor becomes same as the current-controlling MOS transistor based on an operational amplifier circuit output, voltage drops in lines from drain electrode to a corresponding input point of the operational amplifier circuit become the same by a parasitic resistance, and when the output of the operational amplifier circuit is applied to a control terminal of the bias condition controlling transistor, the drain voltages become the same potential, and the line from the drain electrode of the current-detecting MOS transistor to the input point is formed to be redundantly arranged inside the chip so that a parasitic resistance becomes a predetermined value.
    • 公开了一种电荷控制半导体集成电路,包括:电流控制MOS晶体管; 电流检测电路,包括1 / N尺寸电流检测MOS晶体管; 以及栅极电压控制电路,其中电流检测电路包括运算放大器电路,电流检测用MOS晶体管的偏置状态与基于运算放大器电路输出的电流控制用MOS晶体管相同, 漏电极到运算放大器电路的对应输入点变成相同的寄生电阻,并且当运算放大器电路的输出被施加到偏置条件控制晶体管的控制端时,漏极电压变为相同的电位, 形成从电流检测用MOS晶体管的漏极到输入点的线被冗余配置在芯片的内部,使寄生电阻成为规定值。