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1. 发明申请

US20060074145A1 Water-based ink for stencil printing and stencil printing method 审中-公开
标题翻译：水性油墨用于模版印刷和模版印刷法
公开(公告)号：US20060074145A1
公开(公告)日：2006-04-06
申请号：US11242931
申请日：2005-10-05
申请人： Hiroshi Hayashi , Yoshihiro Hayashi , Yoshifumi Watanabe
发明人： Hiroshi Hayashi , Yoshihiro Hayashi , Yoshifumi Watanabe
IPC分类号： C03C17/00 , C09D11/00
CPC分类号： C09D11/0235
摘要： A water-based ink for stencil printing, wherein the slope (S) of a graph generated by plotting spread meter values measured at 25° C. [x axis: natural logarithm of the time elapsed T (seconds), y axis: spread diameter D (mm)] is within a range from 1.0 to 4.5; a water-based ink for stencil printing that includes a water-soluble polymer thickener with a cross-linked structure, and a water-soluble polymer thickener with a straight-chain structure; and stencil printing methods that use these inks.
摘要翻译：用于模版印刷的水性油墨，其中通过绘制在25℃下测量的传播仪表值产生的曲线图的斜率（S）。[x轴：经过时间T（秒）的自然对数，y轴：展开直径 D（mm）]在1.0〜4.5的范围内; 包含具有交联结构的水溶性聚合物增稠剂的模版印刷水性油墨和具有直链结构的水溶性聚合物增稠剂; 和使用这些油墨的模版印刷方法。

2. 发明申请

US20060173095A1 Water-based ink for stencil printing and stencil printing method 审中-公开
标题翻译：水性油墨用于模版印刷和模版印刷法
公开(公告)号：US20060173095A1
公开(公告)日：2006-08-03
申请号：US11337512
申请日：2006-01-24
申请人： Yoshifumi Watanabe , Yoshihiro Hayashi , Hiroshi Hayashi
发明人： Yoshifumi Watanabe , Yoshihiro Hayashi , Hiroshi Hayashi
IPC分类号： C09D11/00
CPC分类号： B41M1/12 , C08L75/04 , C09D7/43 , C09D11/03
摘要： There is disclosed a water-based ink for stencil printing that includes an associative thickener that is liquid at 20° C. By using this ink, the blurring of the printed image that occurs on recommencing printing after the printing machine has been sitting in an unused state can be eliminated quickly.
摘要翻译：公开了一种用于模板印刷的水性油墨，其包括在20℃下为液体的缔合增稠剂。通过使用该油墨，在印刷机已经被置于未使用的位置之后，在重新印刷时出现的印刷图像模糊状态可以快速消除。

3. 发明申请

US20060216421A1 Aqueous ink for mimeograph printing and method for mimeograph printing 审中-公开
标题翻译：油墨印刷用水性油墨和油印印刷方法
公开(公告)号：US20060216421A1
公开(公告)日：2006-09-28
申请号：US10571759
申请日：2004-07-30
申请人： Yoshihiro Hayashi , Hiroshi Hayashi , Yoshifumi Watanabe
发明人： Yoshihiro Hayashi , Hiroshi Hayashi , Yoshifumi Watanabe
IPC分类号： B05D1/32 , C08K5/05
CPC分类号： C09D11/0235
摘要： A water-based ink for stencil printing, which comprises an unsaturated carboxylic acid-based water-soluble polymer and triethylene glycol. The ink preferably further comprises β-thiodiglycol as an optional component.
摘要翻译：一种用于模版印刷的水性油墨，其包含不饱和羧酸基水溶性聚合物和三甘醇。油墨优选还包含作为任选组分的β-硫二甘醇。

4. 发明申请

US20060074144A1 water-based ink for stencil printing and stencil printing method 审中-公开
标题翻译：水性油墨用于模版印刷和模版印刷法
公开(公告)号：US20060074144A1
公开(公告)日：2006-04-06
申请号：US11242930
申请日：2005-10-05
申请人： Yoshifumi Watanabe , Yoshihiro Hayashi , Hiroshi Hayashi
发明人： Yoshifumi Watanabe , Yoshihiro Hayashi , Hiroshi Hayashi
IPC分类号： C03C17/00 , C09D11/00
CPC分类号： C09D11/0235
摘要： A water-based ink for stencil printing that includes a copolymer of an unsaturated carboxylic acid as a first monomer, and a second monomer selected from the group consisting of vinyl amide-based monomers, vinyl ether-based monomers, and hydroxyl group-containing (meth)acrylate ester-based monomers, as well as a stencil printing method that uses such an ink.
摘要翻译：一种用于模版印刷的水性油墨，其包括不饱和羧酸作为第一单体的共聚物和选自乙烯基酰胺类单体，乙烯基醚类单体和含羟基的第二单体（甲基）丙烯酸酯类单体，以及使用这种油墨的模版印刷法。

5. 发明授权

US06699312B2 Emulsion ink for stencil printing 有权
标题翻译：乳胶油墨用于模版印刷
公开(公告)号：US06699312B2
公开(公告)日：2004-03-02
申请号：US10046140
申请日：2002-01-16
申请人： Yoshihiro Hayashi , Yoshifumi Watanabe
发明人： Yoshihiro Hayashi , Yoshifumi Watanabe
IPC分类号： C09D1100
CPC分类号： C09D11/0235
摘要： A W/O emulsion ink for stencil printing contains, in its water phase, a material which reacts with oxygen dissolved in the water phase and reduces the amount of oxygen dissolved in the water phase.
摘要翻译：用于模版印刷的W / O乳液油墨在其水相中含有与溶于水相中的氧气反应并减少溶解在水相中的氧气的量的材料。

6. 发明授权

US08937023B2 Method of manufacturing porous insulating film 有权
标题翻译：多孔绝缘膜的制造方法
公开(公告)号：US08937023B2
公开(公告)日：2015-01-20
申请号：US13363638
申请日：2012-02-01
申请人： Fuminori Ito , Yoshihiro Hayashi
发明人： Fuminori Ito , Yoshihiro Hayashi
IPC分类号： H01L23/48 , H01L21/316 , C23C16/40 , C23C18/12 , C23C18/14 , H01L21/02
CPC分类号： H01L21/31695 , C23C16/401 , C23C18/1212 , C23C18/122 , C23C18/14 , H01L21/02126 , H01L21/02203 , H01L21/02216 , H01L21/02274 , H01L21/02348 , H01L21/02362
摘要： A method includes forming an insulating film over a substrate by introducing a cyclic siloxane compound having a cyclic siloxane as a skeleton and having at least one volatile hydrocarbon group bonded to a side chain, and a silicon-containing compound into a plasma, and converting the insulating film to a porous insulating film by adding energy to the insulating film. The silicon-containing compound is decomposed using less energy as compared with the skeleton of the cyclic siloxane compound, the volatile hydrocarbon group, and the bond between the cyclic siloxane compound and the volatile hydrocarbon group.
摘要翻译：一种方法包括通过引入具有环状硅氧烷作为骨架并具有至少一个与侧链结合的挥发性烃基的环状硅氧烷化合物，将含硅化合物引入等离子体中，在基板上形成绝缘膜，通过向绝缘膜添加能量将绝缘膜与多孔绝缘膜接合。与环状硅氧烷化合物，挥发性烃基，环状硅氧烷化合物和挥发性烃基的键相比，含硅化合物的分解能力较少。

7. 发明授权

US08648441B2 Semiconductor device and method of manufacturing semiconductor device 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08648441B2
公开(公告)日：2014-02-11
申请号：US13106590
申请日：2011-05-12
申请人： Kenichiro Hijioka , Ippei Kume , Naoya Inoue , Hiroki Shirai , Jun Kawahara , Yoshihiro Hayashi
发明人： Kenichiro Hijioka , Ippei Kume , Naoya Inoue , Hiroki Shirai , Jun Kawahara , Yoshihiro Hayashi
IPC分类号： H01L21/02
CPC分类号： H01L27/10894 , H01L21/76811 , H01L23/5223 , H01L27/10852 , H01L28/75 , H01L28/91 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device has a substrate; a multi-layered interconnect formed on the substrate, and having a plurality of interconnect layers, each of which being configured by an interconnect and an insulating layer, stacked therein; a memory circuit formed in a memory circuit region on the substrate in a plan view, and having a peripheral circuit and at least one capacitor element embedded in the multi-layered interconnect; and a logic circuit formed in a logic circuit region on the substrate, wherein the capacitor element is configured by a lower electrode, a capacitor insulating film, an upper electrode, an embedded electrode and an upper interconnect; the top surface of the upper interconnect, and the top surface of the interconnect configuring the logic circuit formed in the same interconnect layer with the upper interconnect, are aligned to the same plane.
摘要翻译：半导体器件具有基板; 形成在所述基板上的多层互连，并且具有多个互连层，每个互连层由布置在其中的互连和绝缘层构成; 在平面图形成在基板上的存储器电路区域中的存储电路，并且具有外围电路和嵌入多层互连中的至少一个电容元件; 以及形成在所述基板上的逻辑电路区域中的逻辑电路，其中所述电容器元件由下电极，电容器绝缘膜，上电极，嵌入电极和上互连构成; 上互连的顶表面和构成与上互连的同一互连层中形成的逻辑电路的互连的顶表面与同一平面对准。

8. 发明授权

US08629529B2 Semiconductor device and its manufacturing method 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US08629529B2
公开(公告)日：2014-01-14
申请号：US12519706
申请日：2007-12-25
申请人： Naoya Inoue , Ippei Kume , Jun Kawahara , Yoshihiro Hayashi
发明人： Naoya Inoue , Ippei Kume , Jun Kawahara , Yoshihiro Hayashi
IPC分类号： H01L27/06
CPC分类号： H01L23/5228 , H01L23/5223 , H01L23/53238 , H01L27/0688 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A semiconductor device is produced by fabricating a capacitor element including a lower electrode, a capacitor insulating film, and an upper electrode, and a thin-film resistor element, in the same step. As the lower electrode of the capacitor element is lined with a lower layer wiring layer (Cu wiring), the lower electrode has extremely low resistance substantially. As such, even if the film thickness of the lower electrode becomes thinner, parasitic resistance does not increased. The resistor element is formed to have the same film thickness as that of the lower electrode of the capacitor element. Since the film thickness of the lower electrode is thin, it works as a resistor having high resistance. In the top layer of the passive element, a passive element cap insulating film is provided, which works as an etching stop layer when etching a contact of the upper electrode of the capacitor element.
摘要翻译：通过在同一步骤中制造包括下电极，电容器绝缘膜和上电极的电容器元件和薄膜电阻器元件来制造半导体器件。由于电容器元件的下电极衬有下层布线层（Cu布线），所以下电极具有极低的电阻。因此，即使下电极的膜厚变薄，寄生电阻也不会增加。电阻元件形成为具有与电容器元件的下电极相同的膜厚度。由于下部电极的膜厚薄，所以作为具有高电阻的电阻器。在无源元件的顶层中，设置无源元件帽绝缘膜，当蚀刻电容器元件的上电极的接触时，其被用作蚀刻停止层。

9. 发明授权

US08624328B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08624328B2
公开(公告)日：2014-01-07
申请号：US12591089
申请日：2009-11-06
申请人： Jun Kawahara , Yoshihiro Hayashi , Ippei Kume
发明人： Jun Kawahara , Yoshihiro Hayashi , Ippei Kume
IPC分类号： H01L27/06
CPC分类号： H01L27/0207 , H01L23/522 , H01L23/5223 , H01L23/53238 , H01L23/53295 , H01L27/10814 , H01L27/10852 , H01L27/10894 , H01L28/91 , H01L2924/0002 , H01L2924/00
摘要： Provided is a semiconductor device including: a semiconductor substrate; a multi-layered wiring structure which is formed over the semiconductor substrate and in which a plurality of wiring layers, each of which is formed by a wiring and an insulating layer, are laminated; and a capacitive element having a lower electrode, a capacitor insulating layer, and an upper electrode which is embedded in the multi-layered wiring structure, wherein at least two or more of the wiring layers are provided between a lower capacitor wiring connected to the lower electrode and an upper capacitor wiring connected to the upper electrode.
摘要翻译：提供一种半导体器件，包括：半导体衬底; 形成在半导体衬底上并且其中由布线和绝缘层形成的多个布线层被层叠的多层布线结构; 以及具有嵌入在所述多层布线结构中的下电极，电容绝缘层和上电极的电容元件，其特征在于，所述布线层中的至少两个以上设置在与所述下层电极电极和连接到上电极的上电容器布线。

10. 发明授权

US08618537B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08618537B2
公开(公告)日：2013-12-31
申请号：US13067386
申请日：2011-05-27
申请人： Kishou Kaneko , Naoya Inoue , Yoshihiro Hayashi
发明人： Kishou Kaneko , Naoya Inoue , Yoshihiro Hayashi
IPC分类号： H01L29/10
CPC分类号： H01L29/7869 , H01L27/0688 , H01L27/1225 , H01L27/124 , H01L27/1248 , H01L29/45 , H01L29/458
摘要： A semiconductor device includes, in a first region over a semiconductor substrate, a first insulating layer, a first wiring, a second insulating layer, a third insulating layer, and a via and a second wiring embedded in the second insulating layer and the third insulating layer through a barrier metal, and includes, in a second region, the first insulating layer, a gate electrode, the second insulating layer, a semiconductor layer located, the third insulating layer, and a first electric conductor and a second electric conductor embedded in the third insulating layer so as to sandwich the gate electrode in a position overlapped with the semiconductor layer in a plan view through a barrier metal and coupled to the semiconductor layer through the barrier metal.
摘要翻译：半导体器件包括在半导体衬底上的第一区域中，第一绝缘层，第一布线，第二绝缘层，第三绝缘层以及嵌入第二绝缘层中的通孔和第二布线，以及第三绝缘层并且在第二区域中包括第一绝缘层，栅电极，第二绝缘层，位于第三绝缘层和第一导电体中的半导体层，以及嵌入在第二绝缘层中的第二导电体第三绝缘层，以通过势垒金属在平面图中将栅电极夹在与半导体层重叠的位置，并通过阻挡金属耦合到半导体层。

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