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1. 发明申请

US20050051855A1 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US20050051855A1
公开(公告)日：2005-03-10
申请号：US10910574
申请日：2004-08-04
申请人： Yoshiharu Kanegae , Tomio Iwasaki , Hiroshi Moriya
发明人： Yoshiharu Kanegae , Tomio Iwasaki , Hiroshi Moriya
IPC分类号： H01L21/283 , H01L21/28 , H01L21/314 , H01L21/3205 , H01L21/8234 , H01L21/8238 , H01L21/8247 , H01L23/52 , H01L27/04 , H01L27/088 , H01L27/115 , H01L29/417 , H01L29/51 , H01L29/76 , H01L29/78 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11521 , H01L21/28035 , H01L21/28202 , H01L21/823456 , H01L21/823462 , H01L21/82385 , H01L21/823857 , H01L27/115 , H01L29/518 , H01L29/7842 , H01L29/7845 , H01L29/7881
摘要： A semiconductor device constitutes an electric field effect type transistor having a semiconductor substrate, a gate insulating layer formed on the substrate and a gate electrode formed on the gate insulating layer. The gate insulating layer is mainly formed of silicon oxynitride (SiON) and a strain state of the gate insulating layer is a compressed strain state.
摘要翻译：半导体器件构成具有半导体衬底，形成在衬底上的栅极绝缘层和形成在栅极绝缘层上的栅电极的电场效应型晶体管。栅极绝缘层主要由氮氧化硅（SiON）形成，并且栅极绝缘层的应变状态是压缩应变状态。

2. 发明授权

US07180143B2 Semiconductor device having a gate insulating layer being mainly made of silicon oxynitride (SiON) having a compression strain state as its strain state 失效
标题翻译：具有主要由具有压缩应变状态的氮氧化硅（SiON）制成的栅极绝缘层作为其应变状态的半导体器件
公开(公告)号：US07180143B2
公开(公告)日：2007-02-20
申请号：US10910574
申请日：2004-08-04
申请人： Yoshiharu Kanegae , Tomio Iwasaki , Hiroshi Moriya
发明人： Yoshiharu Kanegae , Tomio Iwasaki , Hiroshi Moriya
IPC分类号： H01L29/94
CPC分类号： H01L27/11521 , H01L21/28035 , H01L21/28202 , H01L21/823456 , H01L21/823462 , H01L21/82385 , H01L21/823857 , H01L27/115 , H01L29/518 , H01L29/7842 , H01L29/7845 , H01L29/7881
摘要： A semiconductor device constitutes an electric field effect type transistor having a semiconductor substrate, a gate insulating layer formed on the substrate and a gate electrode formed on the gate insulating layer. The gate insulating layer is mainly formed of silicon oxynitride (SiON) and a strain state of the gate insulating layer is a compressed strain state.
摘要翻译：半导体器件构成具有半导体衬底，形成在衬底上的栅极绝缘层和形成在栅极绝缘层上的栅电极的电场效应型晶体管。栅极绝缘层主要由氮氧化硅（SiON）形成，并且栅极绝缘层的应变状态是压缩应变状态。

3. 发明申请

US20080061384A1 Semiconductor Device 有权
标题翻译：半导体器件
公开(公告)号：US20080061384A1
公开(公告)日：2008-03-13
申请号：US11936443
申请日：2007-11-07
申请人： Tomio Iwasaki , Hiroshi Moriya , Hideo Miura , Shuji Ikeda
发明人： Tomio Iwasaki , Hiroshi Moriya , Hideo Miura , Shuji Ikeda
IPC分类号： H01L29/78
CPC分类号： H01L21/823462 , H01L21/28097 , H01L21/28185 , H01L21/28194 , H01L21/28518 , H01L21/31604 , H01L21/823412 , H01L27/1085 , H01L27/10873 , H01L29/045 , H01L29/4908 , H01L29/4975 , H01L29/513 , H01L29/516 , H01L29/517 , H01L29/78696
摘要： Diffusion layers 2-5 are formed on a silicon substrate 1, and gate dielectric films 6, 7 and gate electrodes 8, 9 are formed on these diffusion layers 2-5 so as to be MOS transistors. Zirconium oxide or hafnium oxide is used as a major component of gate dielectric films 6, 7. Gate dielectric films 6, 7 are formed, for example, by CVD. As substrate 1, there is used one of which the surface is (111) crystal face so as to prevent diffusion of oxygen into silicon substrate 1 or gate electrodes 8, 9. In case of using a substrate of which the surface is (111) crystal face, diffusion coefficient of oxygen is less than 1/100 of the case in which a silicon substrate of which the surface is (001) crystal face is used, and oxygen diffusion is controlled. Thus, oxygen diffusion is controlled, generation of leakage current is prevented and properties are improved. There is realized a semiconductor device having high reliability and capable of preventing deterioration of characteristics concomitant to miniaturization.
摘要翻译：在硅衬底1上形成扩散层2-5，并且在这些扩散层2-5上形成栅电介质膜6,7和栅电极8，以便成为MOS晶体管。氧化锆或氧化铪被用作栅极电介质膜6,7的主要成分。例如通过CVD形成栅极绝缘膜6,7。作为基板1，使用表面为（111）晶面的其中之一，以防止氧扩散到硅基板1或栅电极8,9中。在使用其表面为（111）的基板的情况下，在使用表面为（001）晶面的硅衬底的情况下，氧的扩散系数小于氧的扩散系数的1/100，并且控制氧扩散。因此，控制氧扩散，防止漏电流的产生，提高性能。实现了具有高可靠性并且能够防止伴随小型化的特性劣化的半导体器件。

4. 发明申请

US20080006851A1 Non-volatile phase-change memory and manufacturing method thereof 审中-公开
标题翻译：非易失性相变存储器及其制造方法
公开(公告)号：US20080006851A1
公开(公告)日：2008-01-10
申请号：US11825401
申请日：2007-07-06
申请人： Hiroshi Moriya , Tomio Iwasaki
发明人： Hiroshi Moriya , Tomio Iwasaki
IPC分类号： G11C11/00
CPC分类号： G11C13/0004 , H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1675
摘要： In a non-volatile phase-change memory comprising: an interlayer dielectric film and a plug formed on one main surface side of a silicon substrate; a phase-change film which can take a different electric resistivity depending on a phase change and is provided on surfaces of the interlayer dielectric film and the plug; and an upper electrode film formed on an upper surface of the phase-change film, a relation between a film thickness of the phase-change film and an amount of protrusion of the upper electrode film from the plug is set to 0.3≦L/T≦1. Thus, a density of current flowing through the phase-change film near the outer periphery of the plug is reduced, thereby suppressing migration and enabling rewriting with low energy. Accordingly, a reliable non-volatile phase-change memory can be achieved.
摘要翻译：一种非易失性相变存储器，包括：层间电介质膜和形成在硅衬底的一个主表面侧上的插塞; 可以根据相变取得不同的电阻率并设置在层间绝缘膜和插头的表面上的相变膜; 以及形成在相变膜的上表面上的上电极膜，相变膜的膜厚与上电极膜与插塞的突出量之间的关系设定为0.3 <= L / T <= 1。因此，流过插塞外周附近的相变膜的电流密度降低，从而抑制迁移并能够以低能量进行重写。因此，可以实现可靠的非易失性相变存储器。

5. 发明授权

US06943076B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US06943076B2
公开(公告)日：2005-09-13
申请号：US09943843
申请日：2001-08-30
申请人： Tomio Iwasaki , Hideo Miura , Hiroyuki Ohta , Hiroshi Moriya
发明人： Tomio Iwasaki , Hideo Miura , Hiroyuki Ohta , Hiroshi Moriya
IPC分类号： H01L29/43 , H01L21/28 , H01L21/316 , H01L21/8242 , H01L21/8246 , H01L27/105 , H01L27/108 , H01L29/423 , H01L29/49 , H01L29/51 , H01L29/78 , H01L21/336
CPC分类号： H01L29/517 , H01L21/28088 , H01L21/28185 , H01L21/28194 , H01L21/31604 , H01L27/10814 , H01L27/10873 , H01L27/10882 , H01L29/4966 , H01L29/513
摘要： Gate insulation films each containing titanium oxide as a primary constituent material are formed on one major surface of a semiconductor substrate. Gate electrode films are formed in contact with the gate insulation films. The gate electrode films contain ruthenium oxide or alternatively iridium oxide as a primary constituent material. In order to prevent electrically conductive elements from diffusing into titanium oxide of the gate insulation films, ruthenium oxide or iridium oxide is effectively used as a primary constituent material of the gate electrodes. A semiconductor device can be realized in which occurrence of a leak current is suppressed by increasing a physical film thickness while sustaining desired dielectric characteristic.
摘要翻译：在半导体衬底的一个主表面上形成各自含有氧化钛作为主要构成材料的栅极绝缘膜。形成与栅极绝缘膜接触的栅极电极膜。栅极电极膜含有氧化钌或氧化铱作为主要构成材料。为了防止导电元件扩散到栅极绝缘膜的氧化钛中，氧化钌或氧化铱被有效地用作栅电极的主要构成材料。可以实现半导体器件，其中通过在保持期望的介电特性的同时增加物理膜厚度来抑制泄漏电流的发生。

6. 发明申请

US20050179133A1 Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：US20050179133A1
公开(公告)日：2005-08-18
申请号：US10975448
申请日：2004-10-29
申请人： Tomio Iwasaki , Hiroshi Moriya
发明人： Tomio Iwasaki , Hiroshi Moriya
IPC分类号： H01L27/10 , H01L21/8246 , H01L23/48 , H01L27/112
CPC分类号： H01L27/11206 , H01L27/112
摘要： A semiconductor device provided with a mechanism for recording information is intended to provide a highly reliable one time programmable memory and to provide one time programmable memories at a high yield. In a one time programmable memory, a state in which the electrical resistance is high is varied to another state in which it is low by silicifying a metal with silicon and matching the high resistance state (a metal/silicon separated state) and the low resistance state (a silicide state) to 0 and 1, respectively, wherein there is used an underlayer material which reduces the interfacial energy in the interface with the silicide layer, which constitutes the low resistance state.
摘要翻译：设置有用于记录信息的机构的半导体器件旨在提供高度可靠的一次可编程存储器，并以高产量提供一次可编程存储器。在一次可编程存储器中，电阻高的状态通过用硅硅化硅并匹配高电阻状态（金属/硅分离状态）和低电阻而变化到另一个低电位的状态状态（硅化物状态）分别为0和1，其中使用降低与构成低电阻状态的硅化物层的界面中的界面能的底层材料。

7. 发明授权

US07608899B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07608899B2
公开(公告)日：2009-10-27
申请号：US11936443
申请日：2007-11-07
申请人： Tomio Iwasaki , Hiroshi Moriya , Hideo Miura , Shuji Ikeda
发明人： Tomio Iwasaki , Hiroshi Moriya , Hideo Miura , Shuji Ikeda
IPC分类号： H01L29/76 , H01L29/94
CPC分类号： H01L21/823462 , H01L21/28097 , H01L21/28185 , H01L21/28194 , H01L21/28518 , H01L21/31604 , H01L21/823412 , H01L27/1085 , H01L27/10873 , H01L29/045 , H01L29/4908 , H01L29/4975 , H01L29/513 , H01L29/516 , H01L29/517 , H01L29/78696
摘要： Diffusion layers 2-5 are formed on a silicon substrate 1, and gate dielectric films 6, 7 and gate lectrodes 8, 9 are formed on these diffusion layers 2-5 so as to be MOS transistors. Zirconium oxide or hafnium oxide is used as a major component of gate dielectric films 6, 7. Gate dielectric films 6, 7 are formed, for example, by CVD. As substrate 1, there is used one of which the surface is (111) crystal face so as to prevent diffusion of oxygen into silicon substrate 1 or gate electrodes 8, 9. In case of using a substrate of which the surface is (111) crystal face, diffusion coefficient of oxygen is less than 1/100 of the case in which a silicon substrate of which the surface is (001) crystal face is used, and oxygen diffusion is controlled. Thus, oxygen diffusion is controlled, generation of leakage current is prevented and properties are improved. There is realized a semiconductor device having high reliability and capable of preventing deterioration of characteristics concomitant to miniaturization.
摘要翻译：在硅衬底1上形成扩散层2-5，并且在这些扩散层2-5上形成栅极电介质膜6,7和栅极放电层8,9作为MOS晶体管。氧化锆或氧化铪被用作栅极电介质膜6,7的主要成分。例如通过CVD形成栅极绝缘膜6,7。作为基板1，使用表面为（111）晶面的其中之一，以防止氧扩散到硅基板1或栅电极8,9中。在使用其表面为（111）的基板的情况下，在使用表面为（001）晶面的硅衬底的情况下，氧的扩散系数小于氧的扩散系数的1/100，并且控制氧扩散。因此，控制氧扩散，防止漏电流的产生，提高性能。实现了具有高可靠性并且能够防止伴随小型化的特性劣化的半导体器件。

8. 发明授权

US07358578B2 Field effect transistor on a substrate with (111) orientation having zirconium oxide gate insulation and cobalt or nickel silicide wiring 有权
标题翻译：具有（111）取向的衬底上的场效应晶体管具有氧化锆栅极绝缘体和钴或镍硅化物布线
公开(公告)号：US07358578B2
公开(公告)日：2008-04-15
申请号：US10155833
申请日：2002-05-22
申请人： Tomio Iwasaki , Hiroshi Moriya , Hideo Miura , Shuji Ikeda
发明人： Tomio Iwasaki , Hiroshi Moriya , Hideo Miura , Shuji Ikeda
IPC分类号： H01L29/76 , H01L29/94 , H01L31/00
CPC分类号： H01L21/823462 , H01L21/28097 , H01L21/28185 , H01L21/28194 , H01L21/28518 , H01L21/31604 , H01L21/823412 , H01L27/1085 , H01L27/10873 , H01L29/045 , H01L29/4908 , H01L29/4975 , H01L29/513 , H01L29/516 , H01L29/517 , H01L29/78696
摘要： Diffusion layers 2-5 are formed on a silicon substrate 1, and gate dielectric films 6, 7 and gate electrodes 8, 9 are formed on these diffusion layers 2-5 so as to be MOS transistors. Zirconium oxide or hafnium oxide is used as a major component of gate dielectric films 6, 7. Gate dielectric films 6, 7 are formed, for example, by CVD. As substrate 1, there is used one of which the surface is (111) crystal face so as to prevent diffusion of oxygen into silicon substrate 1 or gate electrodes 8, 9. In case of using a substrate of which the surface is (111) crystal face, diffusion coefficient of oxygen is less than 1/100 of the case in which a silicon substrate of which the surface is (001) crystal face is used, and oxygen diffusion is controlled. Thus, oxygen diffusion is controlled, generation of leakage current is prevented and properties are improved. There is realized a semiconductor device having high reliability and capable of preventing deterioration of characteristics concomitant to miniaturization.
摘要翻译：在硅衬底1上形成扩散层2-5，并且在这些扩散层2-5上形成栅电介质膜6,7和栅电极8，以便成为MOS晶体管。氧化锆或氧化铪被用作栅介质膜6,7的主要成分。栅介质膜6,7例如通过CVD形成。作为基板1，使用表面为（111）晶面的其中之一，以防止氧扩散到硅基板1或栅电极8,9中。在使用表面为（111）晶面的基板的情况下，在使用表面为（001）晶面的硅基板的情况下，氧的扩散系数小于1/100，氧气扩散被控制。因此，控制氧扩散，防止漏电流的产生，提高性能。实现了具有高可靠性并且能够防止伴随小型化的特性劣化的半导体器件。

9. 发明申请

US20070096189A1 Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：US20070096189A1
公开(公告)日：2007-05-03
申请号：US11594780
申请日：2006-11-09
申请人： Tomio Iwasaki , Hiroshi Moriya , Hideo Miura , Shuji Ikeda
发明人： Tomio Iwasaki , Hiroshi Moriya , Hideo Miura , Shuji Ikeda
IPC分类号： H01L29/94 , H01L21/8242
CPC分类号： H01L29/517 , H01L21/28185 , H01L21/28194 , H01L21/31604 , H01L27/10814 , H01L28/40 , H01L28/60 , H01L29/513
摘要： In order to supply a semiconductor device having high-reliability, there are used a first capacitor electrode, a capacitor insulating film formed in contact with the first capacitor electrode and mainly composed of titanium oxide, and a second capacitor electrode formed in contact with the capacitor insulating film, and there is used a conductive oxide film mainly composed of ruthenium oxide or iridium oxide for the first capacitor electrode and the second capacitor electrode. Alternatively, there is used a gate insulating film having a titanium silicate film and titanium oxide which suppress leakage current.
摘要翻译：为了提供具有高可靠性的半导体器件，使用第一电容器电极，形成为与第一电容器电极接触并主要由氧化钛构成的电容器绝缘膜，以及形成为与电容器接触的第二电容器电极并且使用主要由氧化钌或氧化铱构成的导电氧化物膜用于第一电容器电极和第二电容器电极。或者，使用具有抑制漏电流的钛硅酸盐膜和氧化钛的栅极绝缘膜。

10. 发明申请

US20060223268A1 Phase-change random access memory and process for producing same 审中-公开
标题翻译：相变随机存取存储器及其生产过程
公开(公告)号：US20060223268A1
公开(公告)日：2006-10-05
申请号：US11329990
申请日：2006-01-10
申请人： Hiroshi Moriya , Tomio Iwasaki
发明人： Hiroshi Moriya , Tomio Iwasaki
IPC分类号： H01L21/336 , H01L27/12 , H01L21/4763 , H01L27/01 , H01L31/0392
CPC分类号： H01L45/06 , H01L27/2436 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/1675
摘要： An object of the present invention is to provide a phase-change random access memory which hardly causes the peeling of a phase-change film in a production process. In the present invention, the surface of an insulating film around the phase-change film is positioned to a more substrate side than an interface between the insulating film and the phase-change film on the insulating film is.
摘要翻译：本发明的目的是提供一种在生产过程中几乎不引起相变膜剥离的相变随机存取存储器。在本发明中，相变膜周围的绝缘膜的表面位于比绝缘膜上的绝缘膜和相变膜之间的界面更多的基板侧。

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