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    • 2. 发明授权
      US07551491B2 Unit cell of a non-volatile memory device, a non-volatile memory device and method thereof 有权
    • Unit cell of a non-volatile memory device, a non-volatile memory device and method thereof
    • 非易失性存储器件的单元，非易失性存储器件及其方法
    • US07551491B2
    • 2009-06-23
    • US11715404
    • 2007-03-08
    • Won-joo Kim , Suk-pil Kim , Jae-woong Hyun , Yoon-dong Park , June-mo Koo
    • Won-joo Kim , Suk-pil Kim , Jae-woong Hyun , Yoon-dong Park , June-mo Koo
    • G11C11/34
    • G11C16/0433 , G11C16/0491 , G11C16/10 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L27/11568
    • Unit cells of a non-volatile memory device and a method thereof are provided. In an example, the unit cell may include a first memory transistor and a second memory transistor connected to each other in series and further connected in common to a word line, the first and second memory transistors including first and second storage nodes, respectively, the first and second storage nodes configured to execute concurrent memory operations. In another example, the unit cell may include a semiconductor substrate in which first and second bit line regions are defined, first and second storage node layers respectively formed on the semiconductor substrate between the first and second bit line regions, a first pass gate electrode formed on the semiconductor substrate between the first bit line region and the first storage node layer, a second pass gate electrode formed on the semiconductor substrate between the second bit line region and the second storage node layer, a third pass gate electrode formed on the semiconductor substrate between the first and second storage node layers, a third bit line region formed in a portion of the semiconductor substrate under the third pass gate electrode and a control gate electrode extending across the first and second storage node layers. The example unit cells may be implemented within a non-volatile memory device (e.g., a flash memory device), such that the non-volatile memory device may include a plurality of example unit cells.
    • 提供非易失性存储器件的单元电池及其方法。 在一个示例中，单元可以包括串联连接并进一步连接到字线的第一存储晶体管和第二存储晶体管，第一和第二存储晶体管分别包括第一和第二存储节点， 配置为执行并发存储器操作的第一和第二存储节点。 在另一示例中，单元可以包括其中限定了第一和第二位线区域的半导体衬底，分别形成在第一和第二位线区域之间的半导体衬底上的第一和第二存储节点层，形成的第一遍栅极电极 在第一位线区域和第一存储节点层之间的半导体衬底上，形成在第二位线区域和第二存储节点层之间的半导体衬底上的第二遍栅极电极，形成在半导体衬底上的第三栅极电极 在所述第一和第二存储节点层之间形成第三位线区域，所述第三位线区域形成在所述第三栅极电极下方的所述半导体衬底的一部分中，以及跨越所述第一和第二存储节点层延伸的控制栅电极。 示例性单元单元可以在非易失性存储器件（例如，闪存器件）内实现，使得非易失性存储器件可以包括多个示例单位单元。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Espacenet 法律信息 同族专利 专利引用
    • 3. 发明申请
      US20070296033A1 Non-volatile memory device having four storage node films and methods of operating and manufacturing the same 审中-公开
    • Non-volatile memory device having four storage node films and methods of operating and manufacturing the same
    • 具有四个存储节点膜的非易失性存储器件及其操作和制造方法
    • US20070296033A1
    • 2007-12-27
    • US11704363
    • 2007-02-09
    • Yoon-dong Park , Suk-pil Kim , Jae-woong Hyun
    • Yoon-dong Park , Suk-pil Kim , Jae-woong Hyun
    • H01L27/12 , G11C11/34 , H01L21/84
    • H01L29/7887 , H01L29/42332 , H01L29/7851 , H01L29/7923
    • A nonvolatile memory device that may operate in a multi-bit mode and a method of operating and manufacturing the nonvolatile memory device are provided. The nonvolatile memory device may include a first source region and a first drain region that are respectively in first fin portions on both sides of a control gate electrode and respectively separated from the control gate electrode, a second source region and a second drain region that are respectively formed in second fin portions on both sides of the control gate electrode and respectively separated from the control gate electrode, first and second storage node layers that are formed with the control gate electrode therebetween and on the side of the first fin opposite to a buried insulating layer between first and second fins, and third and fourth storage node layers that are formed with the control gate electrode therebetween and on the side of the second fin opposite to the buried insulating layer. The nonvolatile memory device may further include a semiconductor substrate including the first and second fins, a control gate electrode on the sides of the first and second fins opposite to the buried insulating layer and extending onto the buried insulating layer and a gate insulating layer between the first and second fins and the control gate electrode.
    • 提供了可以以多位模式操作的非易失性存储器件以及操作和制造非易失性存储器件的方法。 非易失性存储器件可以包括第一源极区域和第一漏极区域，其分别位于控制栅极电极的两侧的第一鳍片部分中，并且分别与控制栅极电极，第二源极区域和第二漏极区域分离 分别形成在控制栅电极的两侧的第二鳍部分中，并分别与控制栅电极分离，第一和第二存储节点层在其间形成有控制栅极电极，并且在第一鳍片的与掩埋 在第一和第二散热片之间的绝缘层，以及在其间形成有控制栅极电极的第三和第四存储节点层，以及在第二鳍片与掩埋绝缘层相对的一侧。 非易失性存储器件还可以包括：包括第一和第二鳍片的半导体衬底;在第一和第二鳍片的与掩埋绝缘层相对并且延伸到掩埋绝缘层上的侧面上的控制栅极电极和位于掩模绝缘层之间的栅极绝缘层 第一和第二鳍片和控制栅电极。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Global Dossier Espacenet 法律信息 同族专利 专利引用
    • 6. 发明申请
      US20080025106A1 Unit cell of a non-volatile memory device, a non-volatile memory device and method thereof 有权
    • Unit cell of a non-volatile memory device, a non-volatile memory device and method thereof
    • 非易失性存储器件的单元，非易失性存储器件及其方法
    • US20080025106A1
    • 2008-01-31
    • US11715404
    • 2007-03-08
    • Won-joo Kim , Suk-pil Kim , Jae-woong Hyun , Yoon-dong Park , June-mo Koo
    • Won-joo Kim , Suk-pil Kim , Jae-woong Hyun , Yoon-dong Park , June-mo Koo
    • G11C11/34
    • G11C16/0433 , G11C16/0491 , G11C16/10 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L27/11568
    • Unit cells of a non-volatile memory device and a method thereof are provided. In an example, the unit cell may include a first memory transistor and a second memory transistor connected to each other in series and further connected in common to a word line, the first and second memory transistors including first and second storage nodes, respectively, the first and second storage nodes configured to execute concurrent memory operations. In another example, the unit cell may include a semiconductor substrate in which first and second bit line regions are defined. first and second storage node layers respectively formed on the semiconductor substrate between the first and second bit line regions, a first pass gate electrode formed on the semiconductor substrate between the first bit line region and the first storage node layer, a second pass gate electrode formed on the semiconductor substrate between the second bit line region and the second storage node layer, a third pass gate electrode formed on the semiconductor substrate between the first and second storage node layers, a third bit line region formed in a portion of the semiconductor substrate under the third pass gate electrode and a control gate electrode extending across the first and second storage node layers. The example unit cells may be implemented within a non-volatile memory device (e.g., a flash memory device), such that the non-volatile memory device may include a plurality of example unit cells.
    • 提供非易失性存储器件的单元电池及其方法。 在一个示例中，单元可以包括串联连接并进一步连接到字线的第一存储晶体管和第二存储晶体管，第一和第二存储晶体管分别包括第一和第二存储节点， 配置为执行并发存储器操作的第一和第二存储节点。 在另一示例中，单元可以包括其中限定了第一和第二位线区域的半导体衬底。 分别形成在第一和第二位线区域之间的半导体衬底上的第一和第二存储节点层，形成在第一位线区域和第一存储节点层之间的半导体衬底上的第一遍栅极电极，形成的第二遍栅极电极 在第二位线区域和第二存储节点层之间的半导体衬底上，形成在第一和第二存储节点层之间的半导体衬底上的第三遍栅极电极，形成在半导体衬底的一部分中的第三位线区域 所述第三通道栅极电极和跨越所述第一和第二存储节点层延伸的控制栅极电极。 示例性单元单元可以在非易失性存储器件（例如，闪存器件）内实现，使得非易失性存储器件可以包括多个示例单位单元。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Global Dossier Espacenet 法律信息 同族专利 专利引用
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