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1. 发明授权

US08618538B2 Thin film transistor array panel and manufacturing method thereof 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US08618538B2
公开(公告)日：2013-12-31
申请号：US13099108
申请日：2011-05-02
申请人： Yoon Ho Khang , Se Hwan Yu , Chong Sup Chang , Sang Ho Park , Su-Hyoung Kang
发明人： Yoon Ho Khang , Se Hwan Yu , Chong Sup Chang , Sang Ho Park , Su-Hyoung Kang
IPC分类号： H01L29/12 , H01L29/45 , H01L29/786 , H01L21/336
CPC分类号： H01L27/1225 , H01L29/7869
摘要： A thin film transistor array panel is provided that includes: a gate electrode that is disposed on an insulating substrate; a gate insulating layer that is disposed on the gate electrode; an oxide semiconductor that is disposed on the gate insulating layer; a blocking layer that is disposed on the oxide semiconductor; a source electrode and a drain electrode that are disposed on the blocking layer; a passivation layer that is disposed on the source electrode and drain electrode; and a pixel electrode that is disposed on the passivation layer. The blocking layer includes a first portion that is covered by the source electrode and drain electrode and a second portion that is not covered by the source electrode and drain electrode, and the first portion and the second portion include different materials.
摘要翻译：提供薄膜晶体管阵列面板，其包括：设置在绝缘基板上的栅电极; 栅极绝缘层，设置在栅电极上; 设置在所述栅极绝缘层上的氧化物半导体; 设置在所述氧化物半导体上的阻挡层; 设置在所述阻挡层上的源电极和漏电极; 钝化层，其设置在所述源电极和所述漏电极上; 以及设置在钝化层上的像素电极。阻挡层包括由源电极和漏电极覆盖的第一部分和未被源电极和漏电极覆盖的第二部分，并且第一部分和第二部分包括不同的材料。

2. 发明授权

US09025118B2 Display substrate and method of manufacturing the same 有权
标题翻译：显示基板及其制造方法
公开(公告)号：US09025118B2
公开(公告)日：2015-05-05
申请号：US13619120
申请日：2012-09-14
申请人： Jung-Kyu Lee , Yoon-Ho Khang , Se-Hwan Yu , Cheol-Kyu Kim , Yong-Su Lee , Chong-Sup Chang , Sang-Ho Park , Su-Hyoung Kang , Hyun-Jae Na , Young-Ki Shin
发明人： Jung-Kyu Lee , Yoon-Ho Khang , Se-Hwan Yu , Cheol-Kyu Kim , Yong-Su Lee , Chong-Sup Chang , Sang-Ho Park , Su-Hyoung Kang , Hyun-Jae Na , Young-Ki Shin
IPC分类号： G02F1/136 , H01L27/12 , G02F1/1362
CPC分类号： H01L27/124 , G02F1/136286 , G02F2001/13629 , H01L27/1288
摘要： A display substrate includes a base substrate, a switching element, a gate line, a data line and a pixel electrode. Each of the gate line and the data line includes a first metal layer, and a second metal layer directly on the first metal layer. The switching element is on the base substrate, and includes a control electrode and an input electrode or an output electrode. The control electrode includes the first metal layer and excludes the second metal layer, and extends from the gate line. The input electrode or the output electrode includes a second metal layer and excludes the first metal layer. The input electrode extends from the data line. The pixel electrode is electrically connected to the output electrode of the switching element through a first contact hole, and includes a transparent conductive layer.
摘要翻译：显示基板包括基底基板，开关元件，栅极线，数据线和像素电极。栅极线和数据线中的每一个包括第一金属层和直接在第一金属层上的第二金属层。开关元件在基底基板上，并且包括控制电极和输入电极或输出电极。控制电极包括第一金属层，并且不包括第二金属层，并且从栅极线延伸。输入电极或输出电极包括第二金属层，并且不包括第一金属层。输入电极从数据线延伸。像素电极通过第一接触孔电连接到开关元件的输出电极，并且包括透明导电层。

3. 发明申请

US20130105826A1 DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：显示基板及其制造方法
公开(公告)号：US20130105826A1
公开(公告)日：2013-05-02
申请号：US13619120
申请日：2012-09-14
申请人： Jung-Kyu Lee , Yoon-Ho Khang , Se-Hwan Yu , Cheol-Kyu Kim , Yong-Su Lee , Chong-Sup Chang , Sang-Ho Park , Su-Hyoung Kang , Hyun-Jae Na , Young-Ki Shin
发明人： Jung-Kyu Lee , Yoon-Ho Khang , Se-Hwan Yu , Cheol-Kyu Kim , Yong-Su Lee , Chong-Sup Chang , Sang-Ho Park , Su-Hyoung Kang , Hyun-Jae Na , Young-Ki Shin
IPC分类号： H01L33/08
CPC分类号： H01L27/124 , G02F1/136286 , G02F2001/13629 , H01L27/1288
摘要： A display substrate includes a base substrate, a switching element, a gate line, a data line and a pixel electrode. Each of the gate line and the data line includes a first metal layer, and a second metal layer directly on the first metal layer. The switching element is on the base substrate, and includes a control electrode and an input electrode or an output electrode. The control electrode includes the first metal layer and excludes the second metal layer, and extends from the gate line. The input electrode or the output electrode includes a second metal layer and excludes the first metal layer. The input electrode extends from the data line. The pixel electrode is electrically connected to the output electrode of the switching element through a first contact hole, and includes a transparent conductive layer.
摘要翻译：显示基板包括基底基板，开关元件，栅极线，数据线和像素电极。栅极线和数据线中的每一个包括第一金属层和直接在第一金属层上的第二金属层。开关元件在基底基板上，并且包括控制电极和输入电极或输出电极。控制电极包括第一金属层，并且不包括第二金属层，并且从栅极线延伸。输入电极或输出电极包括第二金属层，并且不包括第一金属层。输入电极从数据线延伸。像素电极通过第一接触孔电连接到开关元件的输出电极，并且包括透明导电层。

4. 发明授权

US08614781B2 Liquid crystal display and manufacturing method thereof having particular capping layer 有权
标题翻译：具有特定盖层的液晶显示器及其制造方法
公开(公告)号：US08614781B2
公开(公告)日：2013-12-24
申请号：US13409910
申请日：2012-03-01
申请人： Su-Hyoung Kang , Yoon Ho Khang , Se Hwan Yu , Yong Su Lee , Chong Sup Chang
发明人： Su-Hyoung Kang , Yoon Ho Khang , Se Hwan Yu , Yong Su Lee , Chong Sup Chang
IPC分类号： G02F1/1339 , G02F1/1333 , G02F1/1335
CPC分类号： G02F1/133377 , G02F1/1339 , G02F1/1341
摘要： A liquid crystal display is provided. The liquid crystal display includes a substrate. A thin film transistor is disposed on the substrate. A passivation layer is disposed on the thin film transistor. A pixel electrode is disposed on the passivation layer. A minute space layer is disposed on the pixel electrode and includes a liquid crystal injection hole. A first overcoat is disposed on the minute space layer. A common electrode is disposed on the first overcoat. A capping layer covers the liquid crystal injection hole. The capping layer includes graphene.
摘要翻译：提供液晶显示器。液晶显示器包括基板。薄膜晶体管设置在基板上。钝化层设置在薄膜晶体管上。像素电极设置在钝化层上。在像素电极上设置有微小的空间层，并且包括液晶注入孔。第一外涂层设置在微小空间层上。公共电极设置在第一外涂层上。盖层覆盖液晶注入孔。封盖层包括石墨烯。

5. 发明授权

US08884291B2 Thin film transistor display panel and manufacturing method thereof 有权
标题翻译：薄膜晶体管显示面板及其制造方法
公开(公告)号：US08884291B2
公开(公告)日：2014-11-11
申请号：US13172200
申请日：2011-06-29
申请人： Su-Hyoung Kang , Yoon Ho Khang , Dong Jo Kim , Hyun Jae Na
发明人： Su-Hyoung Kang , Yoon Ho Khang , Dong Jo Kim , Hyun Jae Na
IPC分类号： H01L29/04 , H01L29/786 , H01L29/417 , H01L29/45
CPC分类号： H01L27/1248 , H01L23/291 , H01L23/3171 , H01L29/41733 , H01L29/45 , H01L29/78606 , H01L29/7869 , H01L2924/0002 , H01L2924/00
摘要： A thin film transistor array panel and a manufacturing method capable of forming an insulating layer made of different materials for a portion contacting an oxide semiconductor and a second portion without an additional process. The thin film transistor array panel includes: a gate electrode; a source electrode and a drain electrode spaced apart from each other, each of the source and drain electrodes comprising a lower layer and an upper layer; an insulating layer disposed between the gate electrode and the source and drain electrodes; a semiconductor, the source electrode and the drain electrode being electrically connected to the semiconductor; a first passivation layer contacting the lower layer of the source and drain electrodes but not contacting the upper layer of the source and drain electrodes; and a second passivation layer disposed on the upper layer of the source and drain electrodes. The first passivation layer may be made of silicon oxide, and the second passivation may be made of silicon nitride.
摘要翻译：一种薄膜晶体管阵列面板和能够形成由不同材料制成的绝缘层的制造方法，用于与氧化物半导体和第二部分接触的部分，而不需要额外的工艺。薄膜晶体管阵列面板包括：栅电极; 源电极和漏电极彼此间隔开，源极和漏极中的每一个包括下层和上层; 绝缘层，设置在所述栅极电极和所述源极和漏极之间; 半导体，源电极和漏极电连接到半导体; 第一钝化层接触源极和漏极的下层，但不接触源极和漏极的上层; 以及设置在源电极和漏电极的上层上的第二钝化层。第一钝化层可以由氧化硅制成，并且第二钝化可以由氮化硅制成。

6. 发明授权

US09057923B2 Wire, method of manufacture, and related apparatus 有权
标题翻译：电线，制造方法和相关装置
公开(公告)号：US09057923B2
公开(公告)日：2015-06-16
申请号：US13163528
申请日：2011-06-17
申请人： Chong Sup Chang , Yoonho Khang , Changoh Jeong , Sehwan Yu , Sangho Park , Su-Hyoung Kang , Hyungjun Kim , Honglong Ning , Jinho Hwang , Myounggeun Cha , Youngki Shin
发明人： Chong Sup Chang , Yoonho Khang , Changoh Jeong , Sehwan Yu , Sangho Park , Su-Hyoung Kang , Hyungjun Kim , Honglong Ning , Jinho Hwang , Myounggeun Cha , Youngki Shin
IPC分类号： G02F1/136 , G02F1/1343 , G02F1/1362
CPC分类号： G02F1/136286 , G02F2001/136236 , G02F2001/136295 , G02F2201/123 , Y10T29/49155
摘要： A wire is provided on an insulating substrate to have a first thickness in a first area and a second thickness smaller than the first thickness in a second area except for the first area. A display apparatus includes the wire. The wire is formed by forming a first conductive layer and a second conductive layer on the insulating substrate and etching the first and second conductive layers using photoresist layer patterns having different thicknesses.
摘要翻译：在除了第一区域之外的第二区域中，在绝缘基板上设置有具有在第一区域中的第一厚度和小于第一厚度的第二厚度的布线。显示装置包括线。通过在绝缘基板上形成第一导电层和第二导电层并使用具有不同厚度的光致抗蚀剂层图案蚀刻第一和第二导电层来形成导线。

7. 发明申请

US20120086678A1 WIRE, METHOD OF MANUFACTURE, AND RELATED APPARATUS 有权
标题翻译：电线，制造方法和相关装置
公开(公告)号：US20120086678A1
公开(公告)日：2012-04-12
申请号：US13163528
申请日：2011-06-17
申请人： Chong Sup CHANG , Yoonho Khang , Changoh Jeong , Sehwan Yu , Sangho Park , Su-Hyoung Kang , Hyungjun Kim , Honglong Ning , Jinho Hwang , Myounggeun Cha , Youngki Shin
发明人： Chong Sup CHANG , Yoonho Khang , Changoh Jeong , Sehwan Yu , Sangho Park , Su-Hyoung Kang , Hyungjun Kim , Honglong Ning , Jinho Hwang , Myounggeun Cha , Youngki Shin
IPC分类号： G09G5/00 , H05K3/10
CPC分类号： G02F1/136286 , G02F2001/136236 , G02F2001/136295 , G02F2201/123 , Y10T29/49155
摘要： A wire is provided on an insulating substrate to have a first thickness in a first area and a second thickness smaller than the first thickness in a second area except for the first area. A display apparatus includes the wire. The wire is formed by forming a first conductive layer and a second conductive layer on the insulating substrate and etching the first and second conductive layers using photoresist layer patterns having different thicknesses.
摘要翻译：在除了第一区域之外的第二区域中，在绝缘基板上设置有具有在第一区域中的第一厚度和小于第一厚度的第二厚度的布线。显示装置包括线。通过在绝缘基板上形成第一导电层和第二导电层并使用具有不同厚度的光致抗蚀剂层图案蚀刻第一和第二导电层来形成导线。

8. 发明授权

US09484420B2 Thin film transistor substrate, liquid crystal display having same, and method of manufacturing the same 有权
标题翻译：薄膜晶体管基板，具有相同的液晶显示器及其制造方法
公开(公告)号：US09484420B2
公开(公告)日：2016-11-01
申请号：US13544751
申请日：2012-07-09
申请人： Su-Hyoung Kang , Yoonho Khang , Sangho Park , Jungkyu Lee , Chong Sup Chang
发明人： Su-Hyoung Kang , Yoonho Khang , Sangho Park , Jungkyu Lee , Chong Sup Chang
IPC分类号： G02F1/136 , H01L29/786 , H01L21/336 , H01L29/417 , H01L27/12 , G02F1/1368
CPC分类号： H01L29/41733 , G02F1/1368 , H01L27/124 , H01L29/78642 , H01L29/78696
摘要： A display apparatus includes a thin film transistor substrate, a substrate facing the thin film transistor substrate, and a liquid crystal layer. The thin film transistor substrate includes an insulating substrate, a gate electrode disposed on a surface of the insulating substrate, a gate insulating layer covering the gate electrode, a semiconductor layer disposed on the gate insulating layer, a source electrode disposed on the semiconductor layer, and a drain electrode disposed on the semiconductor layer and spaced apart from the source electrode. One of the source electrode and the drain electrode is spaced apart from the gate electrode in a plan view. The gate electrode includes a side surface inclined with respect to the surface of the insulating substrate and is partially overlapped with a portion of the source electrode or the drain electrode in a direction perpendicular to the side surface of the gate electrode.
摘要翻译：显示装置包括薄膜晶体管基板，面向薄膜晶体管基板的基板和液晶层。薄膜晶体管基板包括绝缘基板，设置在绝缘基板的表面上的栅极电极，覆盖栅电极的栅极绝缘层，设置在栅极绝缘层上的半导体层，设置在半导体层上的源电极，以及设置在半导体层上并与源电极间隔开的漏电极。在平面图中，源电极和漏极之一与栅电极间隔开。栅极包括相对于绝缘基板的表面倾斜的侧表面，并且在与栅电极的侧表面垂直的方向上与源电极或漏电极的一部分重叠。

9. 发明授权

US08841668B2 Array substrate and method of manufacturing the same 有权
标题翻译：阵列基板及其制造方法
公开(公告)号：US08841668B2
公开(公告)日：2014-09-23
申请号：US12415002
申请日：2009-03-31
申请人： Byung-Duk Yang , Eun-Guk Lee , Se-Hwan Yu , Kyoung-Tai Han , Su-Hyoung Kang , Kyung-Sook Jeon
发明人： Byung-Duk Yang , Eun-Guk Lee , Se-Hwan Yu , Kyoung-Tai Han , Su-Hyoung Kang , Kyung-Sook Jeon
IPC分类号： H01L29/04 , H01L21/00 , H01L27/12 , H01L29/786
CPC分类号： G02F1/133516 , H01L27/1214 , H01L27/1259 , H01L27/1288 , H01L29/78633
摘要： An array substrate includes; a substrate, a gate line and a data line disposed on the substrate, a thin film transistor (“TFT”) electrically connected to the gate line and the data line, a light blocking member disposed on the substrate and a first color filter and a second color filter disposed on the substrate. The light blocking member covers a portion of the first color filter and the second color filter covers a portion of the light blocking member.
摘要翻译：阵列基板包括：设置在基板上的基板，栅极线和数据线，与栅极线和数据线电连接的薄膜晶体管（“TFT”），设置在基板上的遮光部件和第一滤色器第二滤色器设置在基板上。遮光构件覆盖第一滤色器的一部分，并且第二滤色器覆盖遮光构件的一部分。

10. 发明授权

US08427623B2 Thin film transistor substrate including disconnection prevention member 有权
标题翻译：薄膜晶体管基板，包括防断断部件
公开(公告)号：US08427623B2
公开(公告)日：2013-04-23
申请号：US12816591
申请日：2010-06-16
申请人： Se-Hwan Yu , Hyang-Shik Kong , Su-Hyoung Kang
发明人： Se-Hwan Yu , Hyang-Shik Kong , Su-Hyoung Kang
IPC分类号： G02F1/1333 , G02F1/1343 , G02F1/1345
CPC分类号： G02F1/136286 , G02F2001/13629
摘要： A thin film transistor array panel including a display area having a gate line, a data line insulated from and intersecting the gate line, a thin film transistor connected to the gate line and the data line, and a pixel electrode connected to the thin film transistor, and a peripheral area formed on the circumference of the display area, according to an exemplary embodiment of the present invention, includes: a driving signal line formed with the same layer as the gate line in the peripheral area and receiving an external signal; a connection signal line formed with the same layer as the data line in the peripheral area; a disconnection prevention member overlapping the side surface of the connection signal line on the connection signal line; and a connection assistance member formed on the disconnection prevention member and connecting the driving signal line and the connection signal line.
摘要翻译：一种薄膜晶体管阵列面板，包括具有栅极线的显示区域，与栅极线绝缘并与之相交的数据线，连接到栅极线和数据线的薄膜晶体管，以及连接到薄膜晶体管的像素电极以及形成在显示区域的圆周上的周边区域，根据本发明的示例性实施例，包括：形成与周边区域中的栅极线相同层并且接收外部信号的驱动信号线; 连接信号线，其与周边区域中的数据线形成相同的层; 断开防止部件与连接信号线上的连接信号线的侧面重叠; 以及连接辅助构件，其形成在所述防止断开构件上并且连接所述驱动信号线和所述连接信号线。

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