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    • 1. 发明授权
    • N/P configurable LDMOS subcircuit macro model
    • N / P可配置LDMOS子电路宏模型
    • US08429592B2
    • 2013-04-23
    • US13277932
    • 2011-10-20
    • Yong LiuKeith R. GreenMarie DenisonYizhong Xie
    • Yong LiuKeith R. GreenMarie DenisonYizhong Xie
    • G06F17/50
    • G06F17/5022G06F17/5054
    • A process of operating a computer system to create a subcircuit model of an N/P configurable extended drain MOS transistor in which the subcircuit model includes an npn bipolar transistor and a pnp bipolar transistor which correspond to current paths through n-channel drift lanes and p-channel drift lanes during dual mode operation. A process of operating a computer system to simulate the behavior of an electronic circuit including a N/P configurable extended drain MOS transistor in which a subcircuit model of the N/P configurable extended drain MOS transistor includes an npn bipolar transistor and a pnp bipolar transistor which correspond to current paths through n-channel drift lanes and p-channel drift lanes during dual mode operation. A computer readable medium storing an electronic circuit simulation program that generates a simulation output of the behavior of an electronic circuit including a N/P configurable extended drain MOS transistor.
    • 一种操作计算机系统以创建N / P可配置扩展漏极MOS晶体管的分支电路模型的过程,其中子电路模型包括npn双极晶体管和pnp双极晶体管,其对应于通过n沟道漂移通道的电流路径和p - 双通道行车道。 一种操作计算机系统以模拟包括N / P可配置扩展漏极MOS晶体管的电子电路的行为的过程,其中N / P可配置扩展漏极MOS晶体管的子电路模型包括npn双极晶体管和pnp双极晶体管 其对应于在双模式操作期间通过n沟道漂移通道和p沟道漂移通道的电流路径。 一种存储电子电路仿真程序的计算机可读介质,其生成包括N / P可配置扩展漏极MOS晶体管的电子电路的行为的模拟输出。