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1. 发明申请

US20050104123A1 High voltage transistor 有权
标题翻译：高压晶体管
公开(公告)号：US20050104123A1
公开(公告)日：2005-05-19
申请号：US10878273
申请日：2004-06-28
申请人： Yong Kim , Dong Lee , Hee Chang
发明人： Yong Kim , Dong Lee , Hee Chang
IPC分类号： H01L21/8247 , H01L27/105 , H01L27/115 , H01L29/78 , H01L29/788 , H01L29/792 , H01L29/94 , H01L31/072
CPC分类号： H01L29/7833 , H01L27/105
摘要： Provided is a high voltage transistor in a flash memory device comprising: a source/drain junction of a DDD structure consisting of a high-concentration impurity region and a low-concentration impurity region surrounding the high-concentration impurity region, the high-concentration impurity region being formed in parallel with a gate electrode at a distance spaced by a location in which a contact hole is formed, and having a rectangular shape whose width is the same as or wider than that of the contact hole and whose length is the same as or narrower than that of an active region through which the gate electrode passes. Accordingly, a current density to pass the gate electrode neighboring the contact hole portion and a current density to pass the gate electrode at a portion where the contact hole cannot be formed become uniform. A uniform and constant saturation current can be obtained regardless of the number of the contact hole.
摘要翻译：提供一种闪速存储器件中的高压晶体管，包括：由高浓度杂质区域和围绕高浓度杂质区域的低浓度杂质区域构成的DDD结构的源极/漏极结，高浓度杂质区域与栅电极平行地形成在与形成接触孔的位置隔开的距离处，并且具有与接触孔的宽度相同或更宽的矩形形状，并且其长度与或比栅电极通过的有源区的窄。因此，与接触孔部相邻的栅电极的电流密度以及在不能形成接触孔的部分通过栅电极的电流密度变得均匀。无论接触孔的数量如何，都可以获得均匀和恒定的饱和电流。

2. 发明申请

US20050048723A1 Method of forming gate oxide layer in semiconductor device 失效
标题翻译：在半导体器件中形成栅氧化层的方法
公开(公告)号：US20050048723A1
公开(公告)日：2005-03-03
申请号：US10880691
申请日：2004-06-30
申请人： Min Lee , Hee Chang , Jum Kim , Jung Ahn
发明人： Min Lee , Hee Chang , Jum Kim , Jung Ahn
IPC分类号： H01L21/336 , H01L21/316 , H01L21/8234 , H01L21/8247 , H01L27/088 , H01L27/105
CPC分类号： H01L27/11526 , H01L21/823462 , H01L27/105 , H01L27/11534 , Y10S438/981
摘要： Provided is related to a method of forming a semiconductor device comprises steps of: providing a semiconductor substrate having a low voltage region and a high voltage region; forming a pad oxide layer and a pad nitride layer in sequence on the semiconductor substrate; removing the pad nitride layer and the pad oxide layer on the semiconductor substrate of the high voltage region, wherein a surface of the semiconductor substrate of the high voltage region is exposed and recessed; forming a sacrificial oxide layer on the surface of the semiconductor substrate of the high voltage region; removing the sacrificial layer; forming a first gate oxide layer on the surface of the semiconductor substrate of the high voltage region; removing the pad oxide layer and the pad nitride layer left on the semiconductor substrate of the low voltage region, wherein a surface of the semiconductor substrate of the low voltage region is exposed and recessed; and forming a second gate oxide layer on the first gate oxide layer and the surface of the semiconductor substrate of the low voltage region.
摘要翻译：提供一种形成半导体器件的方法，包括以下步骤：提供具有低电压区域和高电压区域的半导体衬底; 在半导体衬底上依次形成焊盘氧化物层和焊盘氮化物层; 去除高电压区域的半导体衬底上的衬垫氮化物层和衬垫氧化物层，其中高压区域的半导体衬底的表面被暴露和凹陷; 在高电压区域的半导体衬底的表面上形成牺牲氧化物层; 去除牺牲层; 在所述高电压区域的半导体衬底的表面上形成第一栅氧化层; 去除低电压区域的半导体衬底上留下的衬垫氧化物层和衬垫氮化物层，其中低电压区域的半导体衬底的表面露出并凹陷; 以及在所述第一栅极氧化物层和所述低电压区域的所述半导体衬底的表面上形成第二栅极氧化物层。

3. 发明申请

US20120156263A1 Ursodeoxycholic Acid-Synthetic Hydrotalcite-Eudragit Hybrid, Pharmaceutical Composition Containing the Same and Method for Preparing the Same 审中-公开
标题翻译：熊去氧胆酸 - 合成水滑石 - Eudragit混合物，含有其的药物组合物及其制备方法
公开(公告)号：US20120156263A1
公开(公告)日：2012-06-21
申请号：US13392770
申请日：2010-09-10
申请人： Jin Ho Choy , Go Eun Choi , Myung Chul Park , Hee Chang
发明人： Jin Ho Choy , Go Eun Choi , Myung Chul Park , Hee Chang
IPC分类号： A61K9/00 , A61P1/16 , B29B9/12 , A61K31/575
CPC分类号： A61K31/575 , C07J9/005
摘要： The present invention relates to an ursodeoxycholic acid-synthetic hydrotalcite-Eudragit hybrid, a pharmaceutical composition containing the same and a method for preparing the same. The ursodeoxycholic acid-synthetic hydrotalcite-Eudragit hybrid according to the present invention is very useful as an active ingredient of a pharmaceutical composition because of its bitter-taste-blocking effect and improved body absorption rate with high solubility.
摘要翻译：本发明涉及熊去氧胆酸 - 合成水滑石-Eudragit杂交体，含有它们的药物组合物及其制备方法。根据本发明的熊去氧胆酸 - 合成水滑石 - Eudragit杂交物作为药物组合物的活性成分是非常有用的，因为它具有苦味阻滞作用和改善的身体吸收速率和高溶解度。

4. 发明申请

US20070196500A1 Composition for oral administration of tamsulosin hydrochloride and controlled release granule formulation comprising same 审中-公开
标题翻译：用于口服盐酸坦洛新组合物和包含其的控释颗粒制剂的组合物
公开(公告)号：US20070196500A1
公开(公告)日：2007-08-23
申请号：US10597947
申请日：2005-02-16
申请人： Jong Woo , Hee Chang
发明人： Jong Woo , Hee Chang
IPC分类号： A61K9/16 , A61K31/135
CPC分类号： A61K31/18 , A61K9/1611 , A61K9/1623 , A61K9/1635 , A61K9/1652 , A61K9/5026 , A61K9/5042 , A61K9/5047
摘要： A composition for oral administration of tamsulosin hydrochloride and a controlled release granule formulation comprising the same exhibited excellent stability and sustained release characteristics of tamsulosin hydrochloride regardless of pH changes for an extended period of time.
摘要翻译：用于口服盐酸坦洛新的组合物和含有该组合物的控释颗粒制剂表现出优异的稳定性和缓释特性，不管pH变化是否延长。

5. 发明申请

US20080061353A1 Flash Memory Device 有权
标题翻译：闪存设备
公开(公告)号：US20080061353A1
公开(公告)日：2008-03-13
申请号：US11942227
申请日：2007-11-19
申请人： Sang Oh , Hee Chang , Hee Lee
发明人： Sang Oh , Hee Chang , Hee Lee
IPC分类号： H01L29/788
CPC分类号： H01L21/28273 , H01L27/11521 , H01L27/11551 , H01L29/42324 , H01L29/66825 , H01L29/7881
摘要： A flash memory device and method of fabricating the same, wherein a width at the top of a floating gate is narrower than that at the bottom of the floating gate. The area of the floating gate can be reduced while maintaining the overlap area between the control gate and the floating gate. Therefore, inter-cell interference can be reduced without lowering program speed.
摘要翻译：一种闪存器件及其制造方法，其中浮置栅极顶部的宽度比浮置栅极底部处的宽度窄。可以减小浮动栅极的面积，同时保持控制栅极和浮动栅极之间的重叠区域。因此，可以降低小区间干扰而不降低程序速度。

6. 发明申请

US20080013372A1 Program Control Circuit of Flash Memory Device Having MLC and Method Thereof 有权
标题翻译：具有MLC及其方法的闪存器件的程序控制电路
公开(公告)号：US20080013372A1
公开(公告)日：2008-01-17
申请号：US11776844
申请日：2007-07-12
申请人： Hee Lee , Hee Chang
发明人： Hee Lee , Hee Chang
IPC分类号： G11C16/04
CPC分类号： G11C16/08 , G11C8/08 , G11C16/0483 , G11C16/12 , G11C16/3459 , G11C16/3468 , G11C16/3481
摘要： A program control circuit and method thereof selectively controls a supply time of a word line bias voltage depending on the number of program cycles being in progress. Therefore, over-programming of MLCs can be prevented and an overall program time can be shortened.
摘要翻译：程序控制电路及其方法根据正在进行的程序周期的数量有选择地控制字线偏置电压的供给时间。因此，可以防止MLC的过度编程，并且可以缩短整个程序时间。

7. 发明申请

US20070004137A1 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20070004137A1
公开(公告)日：2007-01-04
申请号：US11297917
申请日：2005-12-09
申请人： Sang Oh , Hee Chang , Hee Lee
发明人： Sang Oh , Hee Chang , Hee Lee
IPC分类号： H01L21/336 , H01L29/76
CPC分类号： H01L21/28273 , H01L27/11521 , H01L27/11551 , H01L29/42324 , H01L29/66825 , H01L29/7881
摘要： A flash memory device and method of fabricating the same, wherein a width at the top of a floating gate is narrower than that at the bottom of the floating gate. The area of the floating gate can be reduced while maintaining the overlap area between the control gate and the floating gate. Therefore, inter-cell interference can be reduced without lowering program speed.
摘要翻译：一种闪存器件及其制造方法，其中浮置栅极顶部的宽度比浮置栅极底部处的宽度窄。可以减小浮动栅极的面积，同时保持控制栅极和浮动栅极之间的重叠区域。因此，可以降低小区间干扰而不降低程序速度。

8. 发明申请

US20070002629A1 Program Control Circuit of Flash Memory Device Having MLC and Method Thereof 有权
标题翻译：具有MLC及其方法的闪存器件的程序控制电路
公开(公告)号：US20070002629A1
公开(公告)日：2007-01-04
申请号：US11275281
申请日：2005-12-21
申请人： Hee Lee , Hee Chang
发明人： Hee Lee , Hee Chang
IPC分类号： G11C11/34
CPC分类号： G11C16/08 , G11C8/08 , G11C16/0483 , G11C16/12 , G11C16/3459 , G11C16/3468 , G11C16/3481
摘要： A program control circuit and method thereof selectively controls a supply time of a word line bias voltage depending on the number of program cycles being in progress. Therefore, over-programming of MLCs can be prevented and an overall program time can be shortened.
摘要翻译：程序控制电路及其方法根据正在进行的程序周期的数量有选择地控制字线偏置电压的供给时间。因此，可以防止MLC的过度编程，并且可以缩短整个程序时间。

9. 发明申请

US20050140016A1 Contact plug in semiconductor device and method of forming the same 有权
标题翻译：半导体器件的接触插头及其形成方法
公开(公告)号：US20050140016A1
公开(公告)日：2005-06-30
申请号：US10887944
申请日：2004-07-09
申请人： Sung Shim , Hee Chang
发明人： Sung Shim , Hee Chang
IPC分类号： H01L29/41 , H01L21/283 , H01L21/768 , H01L23/485 , H01L23/522 , H01L21/4763 , H01L21/44 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L21/76838 , H01L23/485 , H01L2924/0002 , H01L2924/00
摘要： Disclosed are a contact plug in a semiconductor device and method of forming the same. After a junction region where a contact plug is formed upwardly up to the bottom of a metal wire, the raised junction region and the metal wire are connected by a contact plug. Or after a first contact plug of the same area is formed on the junction region up to the bottom of the metal wires, the first contact plug is connected by a second contact plug. Thus, the width of the contact plug except for some portions is increased by maximum. It is thus possible to prevent an electric field from being concentrated and prohibit on-current from reduced, thus improving the electrical properties of devices.
摘要翻译：公开了一种半导体器件中的接触插塞及其形成方法。在接触插塞向上形成到金属线的底部的接合区域之后，凸起的接合区域和金属线通过接触插塞连接。或者在同一区域的第一接触插塞形成在金属线的底部的接合区域上之后，第一接触插头通过第二接触插塞连接。因此，除了一些部分之外，接触塞的宽度增加最多。因此可以防止电场集中，并且阻止电流减小，从而提高器件的电气性能。

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