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1. 发明申请

US20060000797A1 Methods and apparatus for the optimization of etch resistance in a plasma processing system 有权
标题翻译：用于优化等离子体处理系统中的耐蚀刻性的方法和装置
公开(公告)号：US20060000797A1
公开(公告)日：2006-01-05
申请号：US10883282
申请日：2004-06-30
申请人： Yoko Adams , George Stojakovic , Alan Miller
发明人： Yoko Adams , George Stojakovic , Alan Miller
IPC分类号： B44C1/22 , H01L21/311
CPC分类号： H01J37/32862 , H01J37/32082 , H01L21/3065
摘要： In a plasma processing system, including a plasma processing chamber, a method of optimizing the etch resistance of a substrate material is described. The method includes flowing pre-coat gas mixture into the plasma processing chamber, wherein the pre-coat gas mixture has an affinity for a etchant gas flow mixture; striking a first plasma from the pre-coat gas mixture; and introducing a substrate comprising the substrate material. The method also includes flowing the etchant gas mixture into the plasma processing chamber; striking a second plasma from the etchant gas mixture; and etching the substrate with the second plasma. Wherein the first plasma creates a pre-coat residual on a set of exposed surfaces in the plasma processing chamber, and the etch resistance of the substrate material is maintained.
摘要翻译：在包括等离子体处理室的等离子体处理系统中，描述了优化衬底材料的耐蚀刻性的方法。该方法包括将预涂气体混合物流入等离子体处理室，其中预涂气体混合物对蚀刻剂气流混合物具有亲和性; 从预涂气体混合物中冲出第一个等离子体; 以及引入包括所述基板材料的基板。该方法还包括使蚀刻剂气体混合物流入等离子体处理室; 从蚀刻剂气体混合物中冲击第二个等离子体; 并用第二等离子体蚀刻衬底。其中第一等离子体在等离子体处理室中的一组暴露表面上产生预涂层残留物，并且保持基材材料的耐蚀刻性。

2. 发明申请

US20080087639A1 LINE END SHORTENING REDUCTION DURING ETCH 有权
标题翻译：在ETCH期间的线端缩短
公开(公告)号：US20080087639A1
公开(公告)日：2008-04-17
申请号：US11621902
申请日：2007-01-10
申请人： Yoko Adams , Gowri Kota , Frank Lin , Qinghua Zhong
发明人： Yoko Adams , Gowri Kota , Frank Lin , Qinghua Zhong
IPC分类号： C03C25/68
CPC分类号： H01L21/31144 , H01L21/0212 , H01L21/02274 , H01L21/0228 , H01L21/0234 , H01L21/0273 , H01L21/31058 , H01L21/312 , H01L21/3127 , H01L21/32139
摘要： A method for etching features in an etch layer is provided. A patterned photoresist mask is provided over the etch layer, the photoresist mask having at least one photoresist line having a pair of sidewalls ending at a line end is provided. A polymer layer is placed over the at least one photoresist line, wherein a thickness of the polymer layer at the line end of the photoresist line is greater than a thickness of the polymer layer on the sidewalls of the photoresist line. Features are etched into the etch layer through the photoresist mask, wherein a line end shortening (LES) ratio is less than or equal to 1.
摘要翻译：提供了一种用于蚀刻蚀刻层中的特征的方法。提供了图案化的光致抗蚀剂掩模在蚀刻层之上，光刻胶掩模具有至少一个光致抗蚀剂线，其具有在线端终止的一对侧壁。聚合物层放置在至少一个光致抗蚀剂线之上，其中在光致抗蚀剂线的线端处的聚合物层的厚度大于光致抗蚀剂线的侧壁上的聚合物层的厚度。通过光致抗蚀剂掩模将特征蚀刻到蚀刻层中，其中线端缩短（LES）比小于或等于1。

3. 发明申请

US20050205862A1 Dual doped polysilicon and silicon germanium etch 失效
标题翻译：双掺杂多晶硅和硅锗蚀刻
公开(公告)号：US20050205862A1
公开(公告)日：2005-09-22
申请号：US10803342
申请日：2004-03-17
申请人： C. Koemtzopoulos , Yoko Adams , Yoshinori Miyamoto , Yousun Taylor
发明人： C. Koemtzopoulos , Yoko Adams , Yoshinori Miyamoto , Yousun Taylor
IPC分类号： H01L21/3065 , H01L21/308 , H01L21/311 , H01L21/3213 , H01L21/8234 , H01L21/8238 , H01L29/08 , H01L35/24
CPC分类号： H01L21/32137 , H01L21/32139 , H01L21/82345 , H01L21/823842
摘要： A method for etching a stack with at least one silicon germanium layer over a substrate in a processing chamber is provided. A silicon germanium etch is provided. An etchant gas is provided into the processing chamber, wherein the etchant gas comprises HBr, an inert diluent, and at least one of O2 and N2. The substrate is cooled to a temperature below 40° C. The etching gas is transformed to a plasma to etch the silicon germanium layer.
摘要翻译：提供了一种用于在处理室中的衬底上蚀刻具有至少一个硅锗层的堆叠的方法。提供硅锗蚀刻。蚀刻剂气体被提供到处理室中，其中蚀刻剂气体包括HBr，惰性稀释剂和O 2 N 2和N 2 N 2中的至少一种。将衬底冷却至低于40℃的温度。将蚀刻气体转化为等离子体以蚀刻硅锗层。

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