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1. 发明授权

US5982032A Electronic device having FETs on a low dielectric constant GaAs base member and passive elements on a high dielectric constant base member 失效
标题翻译：在低介电常数GaAs基底元件上具有FET的电子器件和高介电常数基底元件上的无源元件
公开(公告)号：US5982032A
公开(公告)日：1999-11-09
申请号：US905151
申请日：1997-08-01
申请人： Yohei Ishikawa , Koichi Sakamoto , Hiroaki Tanaka
发明人： Yohei Ishikawa , Koichi Sakamoto , Hiroaki Tanaka
IPC分类号： H01L25/18 , H01L21/8232 , H01L25/04 , H01L25/16 , H01L27/06 , H01L27/095 , H01P5/08 , H03H9/05 , H01L23/34
CPC分类号： H03H9/0542 , H01L25/16 , H01L2224/48137 , H01L2924/01068 , H01L2924/14 , H01L2924/1423 , H01L2924/19011
摘要： An electronic device includes one or more GaAs integrated circuits having a plurality of mutually independent field-effect transistors formed on a GaAs base-member; and one or more high-dielectric-constant base-members including a passive element on a surface thereof or therein.
摘要翻译：一种电子器件包括一个或多个GaAs集成电路，其具有形成在GaAs基底上的多个相互独立的场效应晶体管; 以及包括其表面上或其中的无源元件的一个或多个高介电常数基体元件。

2. 发明授权

US06175335B1 Dielectric lens antenna having heating body and radio equipment including the same 有权
标题翻译：具有加热体的电介质透镜天线和包括其的无线电设备
公开(公告)号：US06175335B1
公开(公告)日：2001-01-16
申请号：US09342582
申请日：1999-06-29
申请人： Yohei Ishikawa , Koichi Sakamoto , Hideaki Yamada , Fuminori Nakamura
发明人： Yohei Ishikawa , Koichi Sakamoto , Hideaki Yamada , Fuminori Nakamura
IPC分类号： H01Q102
CPC分类号： H01Q15/08 , G01S2013/9389 , H01Q1/02
摘要： A dielectric lens antenna having a lens comprising a dielectric material and a heating body disposed on a surface of the lens. The dielectric lens antenna has a snow-melting function, which prevents degradation in lens-efficiency.
摘要翻译：一种电介质透镜天线，具有透镜，该透镜包括设置在透镜表面上的电介质材料和加热体。介电透镜天线具有融雪功能，防止透镜效率降低。

3. 发明授权

US6087912A High frequency multi-layer module comprising a dielectric resonator 失效
标题翻译：包括介质谐振器的高频多层模块
公开(公告)号：US6087912A
公开(公告)日：2000-07-11
申请号：US060190
申请日：1998-04-14
申请人： Koichi Sakamoto , Kenichi Iio , Sadao Yamashita , Yohei Ishikawa
发明人： Koichi Sakamoto , Kenichi Iio , Sadao Yamashita , Yohei Ishikawa
IPC分类号： H01L23/12 , H01L23/66 , H01L25/04 , H01L25/18 , H01P1/00 , H01P1/30 , H01P5/08 , H01P7/10 , H03B5/18 , H05K1/02 , H05K1/18
CPC分类号： H01L23/66 , H01L2224/48091 , H01L2224/48227 , H01L2224/49111 , H01L24/48 , H01L24/49 , H01L2924/00014 , H01L2924/01019 , H01L2924/12034 , H01L2924/15153 , H01L2924/1517 , H01L2924/19041 , H05K1/0237 , H05K1/183
摘要： An electronic module, comprising: a dielectric base plate having first and second opposing surfaces on which respective electrodes are disposed such that respective areas at the first and second surfaces are free of electrode material and aligned relative to one another to form a dielectric resonator; a first electronic component coupled to the base plate; and a first circuit sheet having first and second opposing surfaces, at least one aperture between the surfaces, and a conductor pattern disposed on the first surface, the first circuit sheet being disposed on the base plate such that: (i) the first electronic component is at least partially received within the aperture; and (ii) at least part of the conductor pattern is coupled to the dielectric resonator.
摘要翻译：一种电子模块，包括：具有第一和第二相对表面的介电基板，各相应的电极设置在其上，使得第一表面和第二表面处的相应区域不含电极材料并相对于彼此对准以形成介质谐振器; 耦合到所述基板的第一电子部件; 以及第一电路板，其具有第一和第二相对表面，所述表面之间的至少一个孔和布置在所述第一表面上的导体图案，所述第一电路板设置在所述基板上，使得：（i）所述第一电子部件至少部分地接收在所述孔内; 和（ii）至少部分导体图案耦合到介质谐振器。

4. 发明授权

US5912484A High-frequency semiconductor device 失效
公开(公告)号：US5912484A
公开(公告)日：1999-06-15
申请号：US879534
申请日：1997-06-20
申请人： Yohei Ishikawa , Koichi Sakamoto
发明人： Yohei Ishikawa , Koichi Sakamoto
IPC分类号： H01L29/772 , H01L21/338 , H01L23/66 , H01L29/417 , H01L29/423 , H01L29/76 , H01L29/812 , H01L29/80 , H01L31/112
CPC分类号： H01L29/8122 , H01L23/66 , H01L29/41725 , H01L29/42316 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： An intrinsic device section is provided by laminating a drain area, an intermediate area, and a source area above a GaAs substrate and by forming a channel area at one oblique surface thereof. A drain electrode ohmic connected to the drain area extends toward the output side, a source electrode ohmic connected to the source area extends above the drain electrode with a dielectric layer placed therebetween, and thereby an output micro-wave transmission line is formed. A gate electrode Schottky connected to the channel area extends toward the input side, the source electrode extends above the drain electrode with the dielectric layer placed therebetween, and thereby an input micro-wave transmission line formed.

5. 发明授权

US5889297A High frequency semiconductor device with slots 失效
标题翻译：具有插槽的高频半导体器件
公开(公告)号：US5889297A
公开(公告)日：1999-03-30
申请号：US884357
申请日：1997-06-27
申请人： Koichi Sakamoto , Yohei Ishikawa
发明人： Koichi Sakamoto , Yohei Ishikawa
IPC分类号： H01L29/772 , H01L21/338 , H01L29/417 , H01L29/423 , H01L29/76 , H01L29/778 , H01L29/812 , H03F3/60 , H01L29/80 , H01L31/112
CPC分类号： H01L29/41725 , H01L29/4175 , H01L29/41758 , H01L29/42316 , H01L2924/0002
摘要： On two active areas formed in a semiconductor substrate, source electrodes, gate electrodes, and drain electrodes are disposed symmetrically to each other. A gate pad section electrically connected to both gate electrodes is disposed at one side of the active areas, and a drain pad section electrically connected to both drain electrodes is disposed at the other side of the active areas. A source pad section electrically connected to one source electrode is disposed at one side of the gate pad section and the drain pad section, and a source pad section electrically connected to the other source electrode is disposed at the other side of the gate pad section and the drain pad section. An input slot line is formed between the gate pad section and the source pad sections, and an output slot line is formed between the drain pad section and the source pad sections.
摘要翻译：在形成在半导体衬底中的两个有源区上，源电极，栅电极和漏极彼此对称地设置。电连接到两个栅电极的栅极焊盘部分设置在有源区的一侧，并且在两个漏电极电连接的漏极焊盘部分设置在有源区的另一侧。电连接到一个源电极的源极焊盘部分设置在栅极焊盘部分和漏极焊盘部分的一侧，并且与另一个源电极电连接的源极焊盘部分设置在栅极焊盘部分的另一侧，漏极焊盘部分。在栅极焊盘部分和源极焊盘部分之间形成输入缝线，并且在漏极焊盘部分和源极焊盘部分之间形成输出缝隙线。

6. 发明授权

US5872485A Dielectric line waveguide which forms electronic circuits 失效
标题翻译：形成电子线路的介质线波导
公开(公告)号：US5872485A
公开(公告)日：1999-02-16
申请号：US901149
申请日：1997-07-28
申请人： Yohei Ishikawa , Koichi Sakamoto , Sadao Yamashita , Takehisa Kajikawa
发明人： Yohei Ishikawa , Koichi Sakamoto , Sadao Yamashita , Takehisa Kajikawa
IPC分类号： H05K1/16 , H01L21/822 , H01L27/04 , H01P3/16 , H01P5/02 , H01P5/08 , H01P5/12 , H03F3/60 , H03F3/68 , H01P5/00 , H03B5/12 , H04B1/26
CPC分类号： H01P5/087
摘要： An amplifying circuit is formed by a combination of a dielectric line waveguide and a semiconductor device. Two electrically conductive plates are provided substantially parallel to each other. Two dielectric strips are disposed between the two conductive plates, and a dielectric plate is further inserted between the dielectric strips. Ground conductors are formed on the dielectric plate. The ground conductors have an area which equals an amount required for blocking a RF signal propagating in the dielectric line waveguide. A slot line is formed between the ground conductors in a position intermediate opposed sides of the dielectric strips. Line-switching conductor patterns are provided at both sides of the ends of the slot line. A field-effect transistor is mounted on the slot line such that it bridges over the slot line. Accordingly, losses and distortion of an RF signal, which would occur in an input/output circuit, are suppressed, and the generation of parasitic coupling is eliminated. Further, the dielectric line waveguide is miniaturized free from an external circuit, and accordingly, the manufacturing cost is reduced as well.
摘要翻译：放大电路由介质线波导和半导体器件的组合形成。两个导电板基本上彼此平行地设置。在两个导电板之间设置两个介质条，并且介质板进一步插入介质条之间。接地导体形成在电介质板上。接地导体具有等于阻挡在介质线波导中传播的RF信号所需的量的面积。在介质条的相对两侧的位置上，在接地导体之间形成槽线。线路切换导体图案设置在槽线的两端的两侧。场效应晶体管安装在槽线上，使得其跨越槽线。因此，抑制了在输入/输出电路中发生的RF信号的损耗和失真，消除了寄生耦合的产生。此外，介电线路波导小型化而没有外部电路，因此也降低了制造成本。

7. 发明申请

US20070046402A1 Planar dielectric line, high-frequency active circuit, and transmitter-receiver 审中-公开
标题翻译：平面介质线，高频有源电路和发射机 - 接收机
公开(公告)号：US20070046402A1
公开(公告)日：2007-03-01
申请号：US10568187
申请日：2004-07-29
申请人： Kazutaka Mukaiyama , Shigeyuki Mikami , Koichi Sakamoto , Yohei Ishikawa
发明人： Kazutaka Mukaiyama , Shigeyuki Mikami , Koichi Sakamoto , Yohei Ishikawa
IPC分类号： H01P3/08
CPC分类号： H01P3/023
摘要： A planar dielectric line having a first slot sandwiched between first and second electrodes is provided on a surface of a dielectric substrate. A second slot is positioned so as to face the first slot and is sandwiched between third and fourth electrodes on the rear face of the dielectric substrate. The width of the first slot is narrower than the width of the second slot so that the electromagnetic field energy of a high-frequency signal is concentrated in the first slot.
摘要翻译：具有夹在第一和第二电极之间的第一狭缝的平面介质线设置在电介质基板的表面上。第二槽被定位为面对第一槽，并且被夹在电介质基板的背面上的第三和第四电极之间。第一槽的宽度比第二槽的宽度窄，使得高频信号的电磁场能量集中在第一槽中。

8. 发明授权

US06717492B2 Planar dielectric integrated circuit with line conversion conductor patterns 失效
标题翻译：具有线路转换导体图案的平面介质集成电路
公开(公告)号：US06717492B2
公开(公告)日：2004-04-06
申请号：US10072533
申请日：2002-02-08
申请人： Yohei Ishikawa , Koichi Sakamoto , Sadao Yamashita , Kenichi Iio
发明人： Yohei Ishikawa , Koichi Sakamoto , Sadao Yamashita , Kenichi Iio
IPC分类号： H01P710
CPC分类号： H01P3/165 , H01L23/66 , H01L2924/0002 , H01L2924/3011 , H01P3/16 , H01L2924/00
摘要： A planar dielectric integrated circuit is provided such that energy conversion loss between a planar dielectric line and electronic components is small and that impedance matching between them can be easily obtained. A planar dielectric line is provided by causing two slots to oppose each other with a dielectric plate interposed in between, a slot line and line-conversion conductor patterns are provided in the end portions of the planar dielectric line, and an FET is disposed in such a manner as to be extended over the slot line.
摘要翻译：提供了平面介质集成电路，使得平面介质线和电子部件之间的能量转换损耗小，并且可以容易地获得它们之间的阻抗匹配。通过使两个槽彼此相对地插入介质板来提供平面介质线，在平面介质线的端部设置槽线和线转换导体图案，并且将FET布置在其中一种在槽线上延伸的方式。

9. 发明授权

US06515554B2 High-frequency circuit device and communication apparatus 失效
公开(公告)号：US06515554B2
公开(公告)日：2003-02-04
申请号：US09963248
申请日：2001-09-26
申请人： Yohei Ishikawa , Kenichi Iio , Takatoshi Kato , Koichi Sakamoto
发明人： Yohei Ishikawa , Kenichi Iio , Takatoshi Kato , Koichi Sakamoto
IPC分类号： H01P308
CPC分类号： H01P5/187 , H01P1/16 , H01P3/003 , H01P3/006 , H01P3/023 , H01P3/165 , H01P5/107 , H01P5/184 , H01P7/10
摘要： Electrodes are formed on both top and bottom surfaces of a dielectric plate and grounded coplanar lines, as transmission lines, are formed on the top surface of the dielectric plate. A plurality of micro-strip lines, each composed of high-impedance lines and low-impedance lines alternately connected in series, is arranged at a pitch shorter than the wavelength of a wave traveling along the grounded coplanar lines. A spurious mode propagation blocking circuit thus constructed prevents a spurious mode wave, such as a parallel-plate mode, from traveling.

10. 发明授权

US06445255B1 Planar dielectric integrated circuit 失效
公开(公告)号：US06445255B1
公开(公告)日：2002-09-03
申请号：US09031981
申请日：1998-02-26
申请人： Yohei Ishikawa , Koichi Sakamoto , Sadao Yamashita , Kenichi Iio
发明人： Yohei Ishikawa , Koichi Sakamoto , Sadao Yamashita , Kenichi Iio
IPC分类号： H03B714
CPC分类号： H01P3/165 , H01L23/66 , H01L2924/0002 , H01L2924/3011 , H01P3/16 , H01L2924/00
摘要： A planar dielectric integrated circuit is provided such that energy conversion loss between a planar dielectric line and electronic components is small and that impedance matching between them can be easily obtained. A planar dielectric line is provided by causing two slots to oppose each other with a dielectric plate interposed in between, a slot line and line-conversion conductor patterns are provided in the end portions of the planar dielectric line, and an FET is disposed in such a manner as to be extended over the slot line.

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