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1. 发明申请

US20050025008A1 Method for generating header and transition flags using DPD technology and optical device using the same 审中-公开
标题翻译：使用DPD技术生成报头和转换标志的方法以及使用其的光学设备
公开(公告)号：US20050025008A1
公开(公告)日：2005-02-03
申请号：US10928088
申请日：2004-08-30
申请人： Ying-Tzung Wang , Chien-Ming Chen
发明人： Ying-Tzung Wang , Chien-Ming Chen
IPC分类号： G11B7/005 , G11B7/007 , G11B27/19 , G11B27/24 , G11B5/09
CPC分类号： G11B7/005 , G11B7/007 , G11B7/00718 , G11B27/24 , G11B2220/216 , G11B2220/2575
摘要： A method for generating header and groove/land transition flags using the DPD technology and an apparatus using the same are disclosed. The method first sets a first and a second threshold levels. Then, the method generates a phase difference signal. The method generates a first transition flag signal and a second transition flag signal, wherein the first transition flag signal is enabled when the phase difference signal is greater than the first threshold level and the second transition flag signal is enabled when the phase difference signal is smaller than the second threshold level. The method then generates a header flag signal according to the first and the second transition flag signal.
摘要翻译：公开了一种使用DPD技术产生报头和凹槽/平台转换标记的方法及使用其的装置。该方法首先设置第一和第二阈值水平。然后，该方法产生相位差信号。该方法产生第一转变标志信号和第二转变标志信号，其中当相位差信号大于第一阈值电平时第一转变标志信号被使能，并且当相位差信号较小时第二转变标志信号被使能比第二阈值水平高。该方法然后根据第一和第二转变标志信号产生报头标志信号。

2. 发明授权

US06801484B2 Method for generating header and transition flags using DPD technology and optical device using the same 失效
标题翻译：使用DPD技术生成报头和转换标志的方法以及使用其的光学设备
公开(公告)号：US06801484B2
公开(公告)日：2004-10-05
申请号：US09949748
申请日：2001-09-12
申请人： Ying-Tzung Wang , Chien-Ming Chen
发明人： Ying-Tzung Wang , Chien-Ming Chen
IPC分类号： G11B700
CPC分类号： G11B27/24 , G11B7/005 , G11B7/007 , G11B7/00718 , G11B2220/216 , G11B2220/2575
摘要： A method for generating header and transition flags using the DPD technology and an optical device using the same are disclosed. The method first sets a first and a second threshold levels. Then, the method generates a phase difference signal, i.e. starting a phase detection function to generate a phase difference signal. The method generates a first transition flag signal and a second transition flag signal, wherein the first transition flag signal is enable if the phase difference signal is greater than a first threshold level and the second transition flag signal is enable if the phase difference signal is smaller than the second threshold level. The method then generates a first header flag signal and a second header flag signal according to the transition flag signal. The first header flag signal is enable if the first transition flag signal becomes enable before the second transition flag does, and the second header flag signal is enable if the second transition flag signal becomes enable before the first transition flag does.
摘要翻译：公开了一种使用DPD技术产生报头和转换标志的方法以及使用其的光学装置。该方法首先设置第一和第二阈值水平。然后，该方法产生相位差信号，即开始相位检测功能以产生相位差信号。该方法产生第一转变标志信号和第二转变标志信号，其中如果相位差信号大于第一阈值电平，则第一转变标志信号被使能，并且如果相位差信号较小则第二转变标志信号被使能比第二阈值水平高。该方法然后根据转换标志信号产生第一标题标志信号和第二标题标志信号。如果第一转变标志信号在第二转变标志执行之前变为使能，则第一标题标志信号被使能，并且如果第二转变标志信号在第一转换标志有效之前变为使能，则第二报头标志信号被使能。

3. 发明授权

US5635878A Differential-type voltage-controlled oscillator with low-frequency stability compensation 失效
标题翻译：具有低频稳定补偿的差分式压控振荡器
公开(公告)号：US5635878A
公开(公告)日：1997-06-03
申请号：US546406
申请日：1995-10-20
申请人： Ding-Jen Liu , Ying-Tzung Wang
发明人： Ding-Jen Liu , Ying-Tzung Wang
IPC分类号： H03B1/00 , H03B1/04 , H03B5/24 , H03K3/0231 , H03L7/099
CPC分类号： H03B5/24 , H03K3/0231 , H03B2201/02 , H03B2202/042
摘要： A differential-type voltage-controlled oscillator (VCO) with low-frequency stability compensation is disclosed. The differential-type VCO comprises a voltage-to-current converter for converting an input voltage signal into a biasing current signal to control the frequency of the VCO output. The VCO further comprises a number of stages of differential amplifiers connected in cascade. Each of the stages of differential amplifiers includes a pair of differential input PMOS transistors, with each of the PMOS transistors connected to a pair of NMOS load transistors. Each of the pair of NMOS load transistors are connected in parallel. The VCO further comprises a number of stages of bias circuits connected in cascade. Each of the bias circuits is connected to a corresponding stage of the differential amplifiers for receiving the bias current generated by the voltage-to-current converter. Each of the stages of bias circuits comprises a current source for supplying a constant current to maintain the low-frequency voltage-frequency linearity of the output of the VCO, and a biasing PMOS transistor connected in parallel with said current source.
摘要翻译：公开了一种具有低频稳定性补偿的差分型压控振荡器（VCO）。差分型VCO包括电压 - 电流转换器，用于将输入电压信号转换成偏置电流信号以控制VCO输出的频率。 VCO还包括级联连接的多级差分放大器。差分放大器的每个级包括一对差分输入PMOS晶体管，每个PMOS晶体管连接到一对NMOS负载晶体管。一对NMOS负载晶体管中的每一个并联连接。 VCO还包括级联连接的多级偏置电路。每个偏置电路连接到差分放大器的相应级，用于接收由电压 - 电流转换器产生的偏置电流。偏置电路的每个级包括用于提供恒定电流以维持VCO的输出的低频电压 - 频率线性度的电流源和与所述电流源并联连接的偏置PMOS晶体管。

4. 发明授权

US5489541A Process of fabricating a bipolar junction transistor 失效
标题翻译：制造双极结型晶体管的工艺
公开(公告)号：US5489541A
公开(公告)日：1996-02-06
申请号：US422568
申请日：1995-04-14
申请人： Sheng-Hsing Yang , Ying-Tzung Wang
发明人： Sheng-Hsing Yang , Ying-Tzung Wang
IPC分类号： H01L21/331 , H01L21/8222
CPC分类号： H01L29/66272 , Y10S148/01
摘要： A process of fabricating a bipolar junction transistor forms, on the substrate, a masking layer including an opening, an intermediate masking portion surrounded by the opening and an outer masking portion. The masking layer consists of a pad oxide and a silicon nitride. A photoresist is then formed on the outer masking portion. A first ion implantation process at a relatively low dose and a relatively high energy is performed to form a base region underlying the intermediate masking portion, and a second ion implantation process at a relatively high dose and a relatively low energy is performed to form a base contact region underlying the opening. Then, the photoresist is removed. A field oxide is grown in the opening of the masking layer, followed by removing the masking layer. A highly-doped polysilicon layer is deposited over the structure, and a rapid thermal annealing process is performed to diffuse the impurities within the polysilicon layer into the substrate to form an emitter region in the base region and to form a collector contact region, by using the field oxide as a mask.
摘要翻译：制造双极结型晶体管的工艺在衬底上形成包括开口的掩模层，由开口包围的中间掩蔽部分和外部掩蔽部分。掩模层由衬垫氧化物和氮化硅组成。然后在外掩蔽部分上形成光致抗蚀剂。以相对低的剂量和相对高的能量进行第一离子注入工艺以形成中间掩蔽部分下面的基底区域，并且以较高的剂量和较低的能量执行第二离子注入工艺以形成基底接触区域开放的底层。然后，去除光致抗蚀剂。在掩模层的开口中生长场氧化物，然后除去掩模层。在结构上沉积高度掺杂的多晶硅层，并且执行快速热退火工艺以将多晶硅层内的杂质扩散到衬底中，以在基极区域中形成发射极区域并通过使用场氧化物作为掩模。

5. 发明授权

US5449627A Lateral bipolar transistor and FET compatible process for making it 失效
标题翻译：侧面双极晶体管和FET兼容的制程
公开(公告)号：US5449627A
公开(公告)日：1995-09-12
申请号：US355478
申请日：1994-12-14
申请人： Ying-Tzung Wang , Sheng-Hsing Yang
发明人： Ying-Tzung Wang , Sheng-Hsing Yang
IPC分类号： H01L21/331 , H01L21/8249 , H01L27/06 , H01L29/735 , H01L21/8248
CPC分类号： H01L29/6625 , H01L21/8249 , H01L27/0623 , H01L29/735 , Y10S148/009
摘要： A lateral bipolar transistor and method of making the transistor are disclosed. The device is made by etching a trench around a central region of a semiconductor body. An emitter is buried beneath the surface of this central area and contact to it is made via a self-alignment technique. The collector region of the transistor is contacted through the floor of the trench while the base region of the transistor is contacted in a region that surrounds the trench. The described method is compatible with the simultaneous manufacture of FET devices on the same chip.
摘要翻译：公开了一种横向双极晶体管及其制造方法。该器件通过在半导体本体的中心区域附近蚀刻沟槽而制成。发射器被埋在该中心区域的表面之下，并通过自对准技术与其接触。晶体管的集电极区域通过沟槽的底部接触，同时晶体管的基极区域在围绕沟槽的区域中接触。所描述的方法与在同一芯片上同时制造FET器件兼容。

6. 发明授权

US5801653A Current cell of a digital-to-analog converter 失效
标题翻译：数模转换器的当前单元
公开(公告)号：US5801653A
公开(公告)日：1998-09-01
申请号：US728561
申请日：1996-10-10
申请人： Ding-Jeng Liu , Ying-Tzung Wang , Wen-Hsin Cheng
发明人： Ding-Jeng Liu , Ying-Tzung Wang , Wen-Hsin Cheng
IPC分类号： H03M1/66
CPC分类号： H03M1/0863 , H03M1/742
摘要： A current cell for converting a digital signal to an analog current signal is disclosed. The current cell includes a first PMOS transistor which receives the digital signal from a pre-stage processor by the gate. A drain of the first PMOS transistor is grounded. A second PMOS transistor has a source which is connected to the source of the first PMOS transistor, a gate which receives an inverse signal of the digital signal from the pre-stage processor, and a drain for providing the analog current signal. A third PMOS transistor is connected between a voltage source and the source of the first PMOS transistor. The third PMOS transistor has a gate to which a first reference voltage is applied.
摘要翻译：公开了一种用于将数字信号转换为模拟电流信号的电流单元。当前单元包括第一PMOS晶体管，其通过门接收来自前级处理器的数字信号。第一PMOS晶体管的漏极接地。第二PMOS晶体管具有连接到第一PMOS晶体管的源极的源极，接收来自前级处理器的数字信号的反相信号的栅极和用于提供模拟电流信号的漏极。第三PMOS晶体管连接在电压源和第一PMOS晶体管的源极之间。第三PMOS晶体管具有施加第一参考电压的栅极。

7. 发明授权

US5574306A Lateral bipolar transistor and FET 失效
标题翻译：侧面双极晶体管和FET
公开(公告)号：US5574306A
公开(公告)日：1996-11-12
申请号：US500470
申请日：1995-07-10
申请人： Ying-Tzung Wang , Sheng-Hsing Yang
发明人： Ying-Tzung Wang , Sheng-Hsing Yang
IPC分类号： H01L21/331 , H01L21/8249 , H01L27/06 , H01L29/735 , H01L29/00 , H01L27/082 , H01L27/102
CPC分类号： H01L29/6625 , H01L21/8249 , H01L27/0623 , H01L29/735 , Y10S148/009
摘要： A lateral bipolar transistor and method of making the transistor are disclosed. The device is made by etching a trench around a central region of a semiconductor body. An emitter is buried beneath the surface of this central area and contact to it is made via a self-alignment technique. The collector region of the transistor is contacted through the floor of the trench while the base region of the transistor is contacted in a region that surrounds the trench. The described method is compatible with the simultaneous manufacture of FET devices on the same chip.
摘要翻译：公开了一种横向双极晶体管及其制造方法。该器件通过在半导体本体的中心区域附近蚀刻沟槽而制成。发射器被埋在该中心区域的表面之下，并通过自对准技术与其接触。晶体管的集电极区域通过沟槽的底部接触，同时晶体管的基极区域在围绕沟槽的区域中接触。所描述的方法与在同一芯片上同时制造FET器件兼容。

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