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    • 1. 发明授权
    • Post chemical mechanical polish (CMP) planarizing substrate cleaning method employing enhanced substrate hydrophilicity
    • 后化学机械抛光(CMP)平面化基板清洗方法采用增强的基板亲水性
    • US06376377B1
    • 2002-04-23
    • US09541487
    • 2000-04-03
    • Weng ChangYing-Ho ChenJih-Churng TwuSyun-Ming Jang
    • Weng ChangYing-Ho ChenJih-Churng TwuSyun-Ming Jang
    • H01L21302
    • H01L21/76826H01L21/02074H01L21/3212H01L21/76801H01L21/76807H01L21/76825H01L21/76888
    • Within a method for removing from over a substrate a chemical mechanical polish (CMP) residue layer there is first provided a substrate. There is then formed over the substrate: (1) a chemical mechanical polish (CMP) substrate layer having an aperture formed therein; (2) a chemical mechanical polish (CMP) planarized patterned layer formed within the aperture within the chemical mechanical polish (CMP) substrate layer; and (3) a chemical mechanical polish (CMP) residue layer formed upon at least one of the chemical mechanical polish substrate layer and the chemical mechanical polish (CMP) planarized patterned layer, where at least one of the chemical mechanical polish (CMP) substrate layer and the chemical mechanical polish (CMP) planarized patterned layer has a first aqueous contact angle. There is then treated the at least one of the chemical mechanical polish (CMP) substrate layer and the chemical mechanical polish (CMP) planarized patterned layer having the first aqueous contact angle to provide at least one of a hydrophilic chemical mechanical polish (CMP) substrate layer and a hydrophilic chemical mechanical polish (CMP) planarized patterned layer having a second aqueous contact angle less than the first aqueous contact angle. Finally, there is then removed the chemical mechanical polish (CMP) residue layer from the at least one of the hydrophilic chemical mechanical polish (CMP) substrate layer and the hydrophilic chemical mechanical polish (CMP) planarized patterned layer with an aqueous cleaner composition.
    • 在用于从衬底上除去化学机械抛光(CMP)残留层的方法中,首先提供衬底。 然后在衬底上形成:(1)其中形成有孔的化学机械抛光(CMP)衬底层; (2)化学机械抛光(CMP)平面化图案层,其形成在化学机械抛光(CMP)衬底层内的孔内; 化学机械抛光(CMP)残留层形成在至少一个化学机械抛光衬底层和化学机械抛光(CMP)平面化图案层上,其中化学机械抛光(CMP)衬底 层和化学机械抛光(CMP)平面化图案层具有第一水接触角。 然后,处理具有第一水接触角的化学机械抛光(CMP)衬底层和化学机械抛光(CMP)平坦化图案化层中的至少一个以提供亲水化学机械抛光(CMP)衬底中的至少一个 层和亲水化学机械抛光(CMP)平面化图案层,其具有小于第一水接触角的第二水接触角。 最后,用水性清洁剂组合物从亲水化学机械抛光(CMP)衬底层和亲水化学机械抛光(CMP)平坦化图案化层中的至少一个去除化学机械抛光(CMP)残留层。
    • 2. 发明授权
    • Multilayer interface in copper CMP for low K dielectric
    • 用于低K电介质的铜CMP中的多层界面
    • US06753249B1
    • 2004-06-22
    • US09759908
    • 2001-01-16
    • Ying-Ho ChenJih-Churng TwuWeng Chang
    • Ying-Ho ChenJih-Churng TwuWeng Chang
    • H01L214763
    • H01L21/7684
    • An improved and new process, used for the elimination of copper line damage, copper defects, non-uniformity improvement, with low dishing and erosion, in damacene processing, is disclosed. This invention relates to a method of fabrication used for semiconductor integrated circuit devices, and more specifically to the elimination of copper line damage for damascene processing, by depositing a multilayer interface material, consisting of a mechanically hard film and a soft film, over a low dielectric constant, interlevel metal dielectric (IMD), and subsequently chemical mechanical polishing (CMP) back the excess material to planarize the surface.
    • 公开了一种改进的新工艺,用于消除铜线损伤,铜缺陷,不均匀性改进,具有较低的凹陷和侵蚀。 本发明涉及一种用于半导体集成电路器件的制造方法,更具体地说,涉及通过在低温下沉积由机械硬膜和软膜组成的多层界面材料来消除镶嵌加工中的铜线损伤 介电常数,层间金属电介质(IMD)和随后的化学机械抛光(CMP)回退多余的材料以使表面平坦化。
    • 7. 发明授权
    • Method to prevent copper CMP dishing
    • 防止铜CMP凹陷的方法
    • US06391780B1
    • 2002-05-21
    • US09378949
    • 1999-08-23
    • Tsu ShihYing-Ho ChenJih-Churng Twu
    • Tsu ShihYing-Ho ChenJih-Churng Twu
    • H01L21302
    • H01L21/3212
    • A process for manufacturing damascene wiring in integrated circuits is described. Trenches in the top most layer are first over-filled with a soft metal (such as copper) and then a relatively thin layer of a hard material such as tantalum, tantalum nitride, titanium, titanium nitride etc is deposited on the copper surface Under a first set of control conditions CMP is then applied for just long enough to selectively remove this hard material layer from peaks in the copper surface while leaving it intact in the valleys. The control conditions for CMP are then adjusted so that CMP can proceed with material at the peaks being removed at a significantly faster rate than in the valleys. Thus, when the point is reached that all copper outside the trenches has been removed, the trenches are found to be just filled with a flat layer that has no dishing.
    • 描述了在集成电路中制造镶嵌线的工艺。 首先用软金属(例如铜)填充最顶层的沟槽,然后在铜表面上沉积相对薄的硬质材料如钽,氮化钽,钛,氮化钛等层 第一组控制条件CMP然后施加足够长的时间以从铜表面的峰中选择性地去除该硬质材料层,同时将其完整地留在谷中。 然后调整CMP的控制条件,使得CMP可以以比在谷中明显更快的速率除去峰值处的材料继续进行。 因此,当达到沟槽外部的所有铜已经被去除的地方时,发现沟槽刚好填充有没有凹陷的平坦层。
    • 8. 发明授权
    • Method for forming a self-aligned copper structure with improved
planarity
    • 用于形成具有改善的平面度的自对准铜结构的方法
    • US6080656A
    • 2000-06-27
    • US387436
    • 1999-09-01
    • Tsu ShihYing-Ho ChenJih-Churng TwuSyun-Ming Jang
    • Tsu ShihYing-Ho ChenJih-Churng TwuSyun-Ming Jang
    • H01L21/768H01L21/4763H01L21/44
    • H01L21/7684H01L21/76879
    • A method for forming a copper structure with reduced dishing, using a self-aligned copper electroplating process. The process begins by providing a semiconductor structure having a dielectric layer thereover, wherein the dielectric layer has a trench therein. A barrier layer is formed over the dielectric layer, a seed layer is formed on the barrier layer, and an insulating layer is formed on the seed layer. The insulating layer is patterned so as to expose the seed layer on the bottom and sidewalls of the trench, preferably using the trench photo mask. A copper layer is selectively electroplated onto the exposed seed layer on the bottom and sidewalls of the trench, while the insulating layer prevents copper deposition outside of the trench. The copper layer, the insulating layer, and the seed layer are planarized, stopping at the dielectric layer. Because of the self-aligned copper geometry, the copper suffers reduced dishing.
    • 一种使用自对准铜电镀工艺形成具有减少凹陷的铜结构的方法。 该过程开始于提供其上具有介电层的半导体结构,其中介电层在其中具有沟槽。 在电介质层上形成阻挡层,在阻挡层上形成种子层,在籽晶层上形成绝缘层。 图案化绝缘层,以便优选地使用沟槽光掩模来暴露沟槽的底部和侧壁上的晶种层。 选择性地将铜层电镀到沟槽的底部和侧壁上的暴露种子层上,同时绝缘层防止在该沟槽外部的铜沉积。 铜层,绝缘层和种子层被平坦化,停留在电介质层。 由于自对准的铜几何形状,铜损坏了凹陷。
    • 9. 发明授权
    • Reduction of Cu line damage by two-step CMP
    • 通过两步CMP减少Cu线损伤
    • US06620725B1
    • 2003-09-16
    • US09395287
    • 1999-09-13
    • Shau-Lin ShueMing-Hsing TsaiWen-Jye TsaiYing-Ho ChenTsu ShihJih-Churng TwuSyun-Ming Jang
    • Shau-Lin ShueMing-Hsing TsaiWen-Jye TsaiYing-Ho ChenTsu ShihJih-Churng TwuSyun-Ming Jang
    • H01L214763
    • H01L21/7684H01L21/3212
    • A process for performing CMP in two steps is described. After trenches have been formed and over-filled with copper, in a first embodiment of the invention a hard pad is used initially to remove most of the copper until a point is reached where dishing effects would begin to appear. A soft pad is then substituted and CMP continued until all copper has been removed, except in the trenches. In a second embodiment, CMP is initiated using a pad to which high-pressure is applied and which rotates relatively slowly. As before, this combination is used until the point is reached where dishing effects would begin to appear. Then, relatively low pressure in combination with relatively high rotational speed is used until all copper has been removed, except in the trenches. Both of these embodiments result in trenches which are just-filled with copper, with little or no dishing effects, and with all traces of copper removed everywhere except in the trenches themselves.
    • 描述用于在两个步骤中执行CMP的过程。 在沟槽已经形成并且用铜过度填充之后,在本发明的第一实施例中,最初使用硬焊盘去除大部分铜,直到达到一个点,其中凹陷效应将开始出现。 然后取代软焊盘,继续CMP直到除了沟槽中除去所有的铜。 在第二实施例中,使用施加高压并且相对缓慢地旋转的衬垫来启动CMP。 如前所述,使用这种组合,直到达到点,其中凹陷效应将开始出现。 然后,除了沟槽之外,使用相对较低的压力结合相对高的转速直到除去所有的铜。 这两个实施例都导致刚好填充铜的沟槽,几乎没有凹陷效应,并且除了沟槽本身之外,所有痕迹的铜都被去除。